aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-powerpc/immap_qe.h
diff options
context:
space:
mode:
authorTimur Tabi <timur@freescale.com>2008-01-08 11:30:58 -0500
committerKumar Gala <galak@kernel.crashing.org>2008-01-23 20:34:06 -0500
commitbc556ba940085e46e0ab1b5ed7c31428dc86dd03 (patch)
tree68d8aada0531c5d5070c3e7327de606894584971 /include/asm-powerpc/immap_qe.h
parenta21e282a124f4679c040087ab73aa5b147d4275f (diff)
[POWERPC] QE: Add ability to upload QE firmware
Define the layout of a binary blob that contains a QE firmware and instructions on how to upload it. Add function qe_upload_firmware() to parse the blob and perform the actual upload. Fully define 'struct rsp' in immap_qe.h to include the actual RISC Special Registers. Added description of a new QE firmware node to booting-without-of.txt. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc/immap_qe.h')
-rw-r--r--include/asm-powerpc/immap_qe.h34
1 files changed, 32 insertions, 2 deletions
diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h
index aba9806b31c9..82a452615097 100644
--- a/include/asm-powerpc/immap_qe.h
+++ b/include/asm-powerpc/immap_qe.h
@@ -393,9 +393,39 @@ struct dbg {
393 u8 res2[0x48]; 393 u8 res2[0x48];
394} __attribute__ ((packed)); 394} __attribute__ ((packed));
395 395
396/* RISC Special Registers (Trap and Breakpoint) */ 396/*
397 * RISC Special Registers (Trap and Breakpoint). These are described in
398 * the QE Developer's Handbook.
399 */
397struct rsp { 400struct rsp {
398 u32 reg[0x40]; /* 64 32-bit registers */ 401 __be32 tibcr[16]; /* Trap/instruction breakpoint control regs */
402 u8 res0[64];
403 __be32 ibcr0;
404 __be32 ibs0;
405 __be32 ibcnr0;
406 u8 res1[4];
407 __be32 ibcr1;
408 __be32 ibs1;
409 __be32 ibcnr1;
410 __be32 npcr;
411 __be32 dbcr;
412 __be32 dbar;
413 __be32 dbamr;
414 __be32 dbsr;
415 __be32 dbcnr;
416 u8 res2[12];
417 __be32 dbdr_h;
418 __be32 dbdr_l;
419 __be32 dbdmr_h;
420 __be32 dbdmr_l;
421 __be32 bsr;
422 __be32 bor;
423 __be32 bior;
424 u8 res3[4];
425 __be32 iatr[4];
426 __be32 eccr; /* Exception control configuration register */
427 __be32 eicr;
428 u8 res4[0x100-0xf8];
399} __attribute__ ((packed)); 429} __attribute__ ((packed));
400 430
401struct qe_immap { 431struct qe_immap {