powerpc/mm: Add SAO Feature bit to the cputable

Add the CPU feature bit for the new Strong Access Ordering
facility of Power7

Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Joel Schopp <jschopp@austin.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 2 insertions, 1 deletions

diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 3171ac904b91..4fd76898975b 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -186,6 +186,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
 #define CPU_FTR_1T_SEGMENT              LONG_ASM_CONST(0x0004000000000000)
 #define CPU_FTR_NO_SLBIE_B              LONG_ASM_CONST(0x0008000000000000)
 #define CPU_FTR_VSX                     LONG_ASM_CONST(0x0010000000000000)
+#define CPU_FTR_SAO                     LONG_ASM_CONST(0x0020000000000000)
 
 #ifndef __ASSEMBLY__
 
@@ -401,7 +402,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
             CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
             CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
-            CPU_FTR_DSCR)
+            CPU_FTR_DSCR | CPU_FTR_SAO)
 #define CPU_FTRS_CELL   (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
             CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \