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authorMatt LaPlante <kernel1@cyberdogtech.com>2006-11-29 23:24:39 -0500
committerAdrian Bunk <bunk@stusta.de>2006-11-29 23:24:39 -0500
commit0779bf2d2ecc4d9b1e9437ae659f50e6776a7666 (patch)
treedbcc9735ab63a833056572c8f4f0efe911246562 /include/asm-parisc
parent3cb2fccc5f48a4d6269dfd00b4db570fca2a04d5 (diff)
Fix misc .c/.h comment typos
Fix various .c/.h typos in comments (no code changes). Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'include/asm-parisc')
-rw-r--r--include/asm-parisc/dma.h6
-rw-r--r--include/asm-parisc/pci.h2
-rw-r--r--include/asm-parisc/ropes.h2
3 files changed, 5 insertions, 5 deletions
diff --git a/include/asm-parisc/dma.h b/include/asm-parisc/dma.h
index da2cf373e31c..31ad0f05af3d 100644
--- a/include/asm-parisc/dma.h
+++ b/include/asm-parisc/dma.h
@@ -17,10 +17,10 @@
17 17
18/* 18/*
19** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up 19** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
20** (or rather not merge) DMA's into managable chunks. 20** (or rather not merge) DMAs into manageable chunks.
21** On parisc, this is more of the software/tuning constraint 21** On parisc, this is more of the software/tuning constraint
22** rather than the HW. I/O MMU allocation alogorithms can be 22** rather than the HW. I/O MMU allocation algorithms can be
23** faster with smaller size is (to some degree). 23** faster with smaller sizes (to some degree).
24*/ 24*/
25#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE) 25#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE)
26 26
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
index 7b8ad118d2fe..7b3be9ac0dda 100644
--- a/include/asm-parisc/pci.h
+++ b/include/asm-parisc/pci.h
@@ -149,7 +149,7 @@ extern int parisc_bus_is_phys; /* in arch/parisc/kernel/setup.c */
149/* 149/*
150** Most PCI devices (eg Tulip, NCR720) also export the same registers 150** Most PCI devices (eg Tulip, NCR720) also export the same registers
151** to both MMIO and I/O port space. Due to poor performance of I/O Port 151** to both MMIO and I/O port space. Due to poor performance of I/O Port
152** access under HP PCI bus adapters, strongly reccomend use of MMIO 152** access under HP PCI bus adapters, strongly recommend the use of MMIO
153** address space. 153** address space.
154** 154**
155** While I'm at it more PA programming notes: 155** While I'm at it more PA programming notes:
diff --git a/include/asm-parisc/ropes.h b/include/asm-parisc/ropes.h
index 5542dd00472b..007a880615eb 100644
--- a/include/asm-parisc/ropes.h
+++ b/include/asm-parisc/ropes.h
@@ -14,7 +14,7 @@
14#endif 14#endif
15 15
16/* 16/*
17** The number of pdir entries to "free" before issueing 17** The number of pdir entries to "free" before issuing
18** a read to PCOM register to flush out PCOM writes. 18** a read to PCOM register to flush out PCOM writes.
19** Interacts with allocation granularity (ie 4 or 8 entries 19** Interacts with allocation granularity (ie 4 or 8 entries
20** allocated and free'd/purged at a time might make this 20** allocated and free'd/purged at a time might make this