diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-23 12:44:10 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-23 12:44:10 -0400 |
commit | 6b426e785cb81e53dc2fc4dcf997661472b470ef (patch) | |
tree | 3dbde895f120e78f66b32ddd9c9cbe3d83a59637 /include/asm-parisc/io.h | |
parent | cb6aef2879b769644b35cffe9844c81c63809c8e (diff) | |
parent | 223232de068593b40d267e340f24c017d31c018a (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
[PARISC] MAINTAINERS
[PARISC] Make ioremap default to _nocache
[PARISC] Add new entries to the syscall table
[PARISC] Further work for multiple page sizes
[PARISC] Fix up hil_kbd.c mismerge
[PARISC] defconfig updates
[PARISC] Document that we tolerate "Relaxed Ordering"
[PARISC] Misc. janitorial work
[PARISC] EISA regions must be mapped NO_CACHE
[PARISC] OSS ad1889: Match register names with ALSA driver
Diffstat (limited to 'include/asm-parisc/io.h')
-rw-r--r-- | include/asm-parisc/io.h | 17 |
1 files changed, 5 insertions, 12 deletions
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h index 29da31194b91..244f6b8883f4 100644 --- a/include/asm-parisc/io.h +++ b/include/asm-parisc/io.h | |||
@@ -126,24 +126,17 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr) | |||
126 | 126 | ||
127 | extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); | 127 | extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); |
128 | 128 | ||
129 | extern inline void __iomem * ioremap(unsigned long offset, unsigned long size) | 129 | /* Most machines react poorly to I/O-space being cacheable... Instead let's |
130 | { | 130 | * define ioremap() in terms of ioremap_nocache(). |
131 | return __ioremap(offset, size, 0); | ||
132 | } | ||
133 | |||
134 | /* | ||
135 | * This one maps high address device memory and turns off caching for that area. | ||
136 | * it's useful if some control registers are in such an area and write combining | ||
137 | * or read caching is not desirable: | ||
138 | */ | 131 | */ |
139 | extern inline void * ioremap_nocache(unsigned long offset, unsigned long size) | 132 | extern inline void __iomem * ioremap(unsigned long offset, unsigned long size) |
140 | { | 133 | { |
141 | return __ioremap(offset, size, _PAGE_NO_CACHE /* _PAGE_PCD */); | 134 | return __ioremap(offset, size, _PAGE_NO_CACHE); |
142 | } | 135 | } |
136 | #define ioremap_nocache(off, sz) ioremap((off), (sz)) | ||
143 | 137 | ||
144 | extern void iounmap(void __iomem *addr); | 138 | extern void iounmap(void __iomem *addr); |
145 | 139 | ||
146 | |||
147 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) | 140 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
148 | { | 141 | { |
149 | return (*(volatile unsigned char __force *) (addr)); | 142 | return (*(volatile unsigned char __force *) (addr)); |