diff options
author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2006-07-13 04:33:03 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-07-13 16:26:19 -0400 |
commit | 66151bbd20c6c62dbe5b131484c885086e3a8d29 (patch) | |
tree | 7ffdb72ca1f74dda598d1023098ef9bc0f7268c1 /include/asm-mips | |
parent | 5fd326573876e466c7693cbf06e9c88ecf86135d (diff) |
[MIPS] vr41xx: Move IRQ numbers to asm-mips/vr41xx/irq.h
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/vr41xx/capcella.h | 2 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/cmbvr4133.h | 3 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/irq.h | 101 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/mpc30x.h | 2 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/tb0219.h | 2 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/tb0226.h | 2 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/tb0287.h | 2 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/vr41xx.h | 53 | ||||
-rw-r--r-- | include/asm-mips/vr41xx/vrc4173.h | 20 |
9 files changed, 107 insertions, 80 deletions
diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h index d10ffda50de7..e0ee05a3dfcc 100644 --- a/include/asm-mips/vr41xx/capcella.h +++ b/include/asm-mips/vr41xx/capcella.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #ifndef __ZAO_CAPCELLA_H | 20 | #ifndef __ZAO_CAPCELLA_H |
21 | #define __ZAO_CAPCELLA_H | 21 | #define __ZAO_CAPCELLA_H |
22 | 22 | ||
23 | #include <asm/vr41xx/vr41xx.h> | 23 | #include <asm/vr41xx/irq.h> |
24 | 24 | ||
25 | /* | 25 | /* |
26 | * General-Purpose I/O Pin Number | 26 | * General-Purpose I/O Pin Number |
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h index 3fbfde19c80c..9490ade58b46 100644 --- a/include/asm-mips/vr41xx/cmbvr4133.h +++ b/include/asm-mips/vr41xx/cmbvr4133.h | |||
@@ -15,8 +15,7 @@ | |||
15 | #ifndef __NEC_CMBVR4133_H | 15 | #ifndef __NEC_CMBVR4133_H |
16 | #define __NEC_CMBVR4133_H | 16 | #define __NEC_CMBVR4133_H |
17 | 17 | ||
18 | #include <asm/addrspace.h> | 18 | #include <asm/vr41xx/irq.h> |
19 | #include <asm/vr41xx/vr41xx.h> | ||
20 | 19 | ||
21 | /* | 20 | /* |
22 | * General-Purpose I/O Pin Number | 21 | * General-Purpose I/O Pin Number |
diff --git a/include/asm-mips/vr41xx/irq.h b/include/asm-mips/vr41xx/irq.h new file mode 100644 index 000000000000..d315dfbc08f2 --- /dev/null +++ b/include/asm-mips/vr41xx/irq.h | |||
@@ -0,0 +1,101 @@ | |||
1 | /* | ||
2 | * include/asm-mips/vr41xx/irq.h | ||
3 | * | ||
4 | * Interrupt numbers for NEC VR4100 series. | ||
5 | * | ||
6 | * Copyright (C) 1999 Michael Klar | ||
7 | * Copyright (C) 2001, 2002 Paul Mundt | ||
8 | * Copyright (C) 2002 MontaVista Software, Inc. | ||
9 | * Copyright (C) 2002 TimeSys Corp. | ||
10 | * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify it | ||
13 | * under the terms of the GNU General Public License as published by the | ||
14 | * Free Software Foundation; either version 2 of the License, or (at your | ||
15 | * option) any later version. | ||
16 | */ | ||
17 | #ifndef __NEC_VR41XX_IRQ_H | ||
18 | #define __NEC_VR41XX_IRQ_H | ||
19 | |||
20 | /* | ||
21 | * CPU core Interrupt Numbers | ||
22 | */ | ||
23 | #define MIPS_CPU_IRQ_BASE 0 | ||
24 | #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) | ||
25 | #define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) | ||
26 | #define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) | ||
27 | #define INT0_IRQ MIPS_CPU_IRQ(2) | ||
28 | #define INT1_IRQ MIPS_CPU_IRQ(3) | ||
29 | #define INT2_IRQ MIPS_CPU_IRQ(4) | ||
30 | #define INT3_IRQ MIPS_CPU_IRQ(5) | ||
31 | #define INT4_IRQ MIPS_CPU_IRQ(6) | ||
32 | #define TIMER_IRQ MIPS_CPU_IRQ(7) | ||
33 | |||
34 | /* | ||
35 | * SYINT1 Interrupt Numbers | ||
36 | */ | ||
37 | #define SYSINT1_IRQ_BASE 8 | ||
38 | #define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) | ||
39 | #define BATTRY_IRQ SYSINT1_IRQ(0) | ||
40 | #define POWER_IRQ SYSINT1_IRQ(1) | ||
41 | #define RTCLONG1_IRQ SYSINT1_IRQ(2) | ||
42 | #define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) | ||
43 | /* RFU */ | ||
44 | #define PIU_IRQ SYSINT1_IRQ(5) | ||
45 | #define AIU_IRQ SYSINT1_IRQ(6) | ||
46 | #define KIU_IRQ SYSINT1_IRQ(7) | ||
47 | #define GIUINT_IRQ SYSINT1_IRQ(8) | ||
48 | #define SIU_IRQ SYSINT1_IRQ(9) | ||
49 | #define BUSERR_IRQ SYSINT1_IRQ(10) | ||
50 | #define SOFTINT_IRQ SYSINT1_IRQ(11) | ||
51 | #define CLKRUN_IRQ SYSINT1_IRQ(12) | ||
52 | #define DOZEPIU_IRQ SYSINT1_IRQ(13) | ||
53 | #define SYSINT1_IRQ_LAST DOZEPIU_IRQ | ||
54 | |||
55 | /* | ||
56 | * SYSINT2 Interrupt Numbers | ||
57 | */ | ||
58 | #define SYSINT2_IRQ_BASE 24 | ||
59 | #define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) | ||
60 | #define RTCLONG2_IRQ SYSINT2_IRQ(0) | ||
61 | #define LED_IRQ SYSINT2_IRQ(1) | ||
62 | #define HSP_IRQ SYSINT2_IRQ(2) | ||
63 | #define TCLOCK_IRQ SYSINT2_IRQ(3) | ||
64 | #define FIR_IRQ SYSINT2_IRQ(4) | ||
65 | #define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */ | ||
66 | #define DSIU_IRQ SYSINT2_IRQ(5) | ||
67 | #define PCI_IRQ SYSINT2_IRQ(6) | ||
68 | #define SCU_IRQ SYSINT2_IRQ(7) | ||
69 | #define CSI_IRQ SYSINT2_IRQ(8) | ||
70 | #define BCU_IRQ SYSINT2_IRQ(9) | ||
71 | #define ETHERNET_IRQ SYSINT2_IRQ(10) | ||
72 | #define SYSINT2_IRQ_LAST ETHERNET_IRQ | ||
73 | |||
74 | /* | ||
75 | * GIU Interrupt Numbers | ||
76 | */ | ||
77 | #define GIU_IRQ_BASE 40 | ||
78 | #define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ | ||
79 | #define GIU_IRQ_LAST GIU_IRQ(31) | ||
80 | |||
81 | /* | ||
82 | * VRC4173 Interrupt Numbers | ||
83 | */ | ||
84 | #define VRC4173_IRQ_BASE 72 | ||
85 | #define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) | ||
86 | #define VRC4173_USB_IRQ VRC4173_IRQ(0) | ||
87 | #define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1) | ||
88 | #define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2) | ||
89 | #define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3) | ||
90 | #define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4) | ||
91 | #define VRC4173_PIU_IRQ VRC4173_IRQ(5) | ||
92 | #define VRC4173_AIU_IRQ VRC4173_IRQ(6) | ||
93 | #define VRC4173_KIU_IRQ VRC4173_IRQ(7) | ||
94 | #define VRC4173_GIU_IRQ VRC4173_IRQ(8) | ||
95 | #define VRC4173_AC97_IRQ VRC4173_IRQ(9) | ||
96 | #define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10) | ||
97 | /* RFU */ | ||
98 | #define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13) | ||
99 | #define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ | ||
100 | |||
101 | #endif /* __NEC_VR41XX_IRQ_H */ | ||
diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h index a6cbe4da6667..1d67df843dc3 100644 --- a/include/asm-mips/vr41xx/mpc30x.h +++ b/include/asm-mips/vr41xx/mpc30x.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #ifndef __VICTOR_MPC30X_H | 20 | #ifndef __VICTOR_MPC30X_H |
21 | #define __VICTOR_MPC30X_H | 21 | #define __VICTOR_MPC30X_H |
22 | 22 | ||
23 | #include <asm/vr41xx/vr41xx.h> | 23 | #include <asm/vr41xx/irq.h> |
24 | 24 | ||
25 | /* | 25 | /* |
26 | * General-Purpose I/O Pin Number | 26 | * General-Purpose I/O Pin Number |
diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h index b318b9612a83..dc981b4be0a4 100644 --- a/include/asm-mips/vr41xx/tb0219.h +++ b/include/asm-mips/vr41xx/tb0219.h | |||
@@ -23,7 +23,7 @@ | |||
23 | #ifndef __TANBAC_TB0219_H | 23 | #ifndef __TANBAC_TB0219_H |
24 | #define __TANBAC_TB0219_H | 24 | #define __TANBAC_TB0219_H |
25 | 25 | ||
26 | #include <asm/vr41xx/vr41xx.h> | 26 | #include <asm/vr41xx/irq.h> |
27 | 27 | ||
28 | /* | 28 | /* |
29 | * General-Purpose I/O Pin Number | 29 | * General-Purpose I/O Pin Number |
diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h index 2513f450e2d6..de527dcfa5f3 100644 --- a/include/asm-mips/vr41xx/tb0226.h +++ b/include/asm-mips/vr41xx/tb0226.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #ifndef __TANBAC_TB0226_H | 20 | #ifndef __TANBAC_TB0226_H |
21 | #define __TANBAC_TB0226_H | 21 | #define __TANBAC_TB0226_H |
22 | 22 | ||
23 | #include <asm/vr41xx/vr41xx.h> | 23 | #include <asm/vr41xx/irq.h> |
24 | 24 | ||
25 | /* | 25 | /* |
26 | * General-Purpose I/O Pin Number | 26 | * General-Purpose I/O Pin Number |
diff --git a/include/asm-mips/vr41xx/tb0287.h b/include/asm-mips/vr41xx/tb0287.h index dd9832313afe..61bead68abf0 100644 --- a/include/asm-mips/vr41xx/tb0287.h +++ b/include/asm-mips/vr41xx/tb0287.h | |||
@@ -22,7 +22,7 @@ | |||
22 | #ifndef __TANBAC_TB0287_H | 22 | #ifndef __TANBAC_TB0287_H |
23 | #define __TANBAC_TB0287_H | 23 | #define __TANBAC_TB0287_H |
24 | 24 | ||
25 | #include <asm/vr41xx/vr41xx.h> | 25 | #include <asm/vr41xx/irq.h> |
26 | 26 | ||
27 | /* | 27 | /* |
28 | * General-Purpose I/O Pin Number | 28 | * General-Purpose I/O Pin Number |
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h index 70828d5fae9c..dd3eb3dc5886 100644 --- a/include/asm-mips/vr41xx/vr41xx.h +++ b/include/asm-mips/vr41xx/vr41xx.h | |||
@@ -74,59 +74,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock); | |||
74 | /* | 74 | /* |
75 | * Interrupt Control Unit | 75 | * Interrupt Control Unit |
76 | */ | 76 | */ |
77 | /* CPU core Interrupt Numbers */ | ||
78 | #define MIPS_CPU_IRQ_BASE 0 | ||
79 | #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) | ||
80 | #define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) | ||
81 | #define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) | ||
82 | #define INT0_IRQ MIPS_CPU_IRQ(2) | ||
83 | #define INT1_IRQ MIPS_CPU_IRQ(3) | ||
84 | #define INT2_IRQ MIPS_CPU_IRQ(4) | ||
85 | #define INT3_IRQ MIPS_CPU_IRQ(5) | ||
86 | #define INT4_IRQ MIPS_CPU_IRQ(6) | ||
87 | #define TIMER_IRQ MIPS_CPU_IRQ(7) | ||
88 | |||
89 | /* SYINT1 Interrupt Numbers */ | ||
90 | #define SYSINT1_IRQ_BASE 8 | ||
91 | #define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) | ||
92 | #define BATTRY_IRQ SYSINT1_IRQ(0) | ||
93 | #define POWER_IRQ SYSINT1_IRQ(1) | ||
94 | #define RTCLONG1_IRQ SYSINT1_IRQ(2) | ||
95 | #define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) | ||
96 | /* RFU */ | ||
97 | #define PIU_IRQ SYSINT1_IRQ(5) | ||
98 | #define AIU_IRQ SYSINT1_IRQ(6) | ||
99 | #define KIU_IRQ SYSINT1_IRQ(7) | ||
100 | #define GIUINT_IRQ SYSINT1_IRQ(8) | ||
101 | #define SIU_IRQ SYSINT1_IRQ(9) | ||
102 | #define BUSERR_IRQ SYSINT1_IRQ(10) | ||
103 | #define SOFTINT_IRQ SYSINT1_IRQ(11) | ||
104 | #define CLKRUN_IRQ SYSINT1_IRQ(12) | ||
105 | #define DOZEPIU_IRQ SYSINT1_IRQ(13) | ||
106 | #define SYSINT1_IRQ_LAST DOZEPIU_IRQ | ||
107 | |||
108 | /* SYSINT2 Interrupt Numbers */ | ||
109 | #define SYSINT2_IRQ_BASE 24 | ||
110 | #define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) | ||
111 | #define RTCLONG2_IRQ SYSINT2_IRQ(0) | ||
112 | #define LED_IRQ SYSINT2_IRQ(1) | ||
113 | #define HSP_IRQ SYSINT2_IRQ(2) | ||
114 | #define TCLOCK_IRQ SYSINT2_IRQ(3) | ||
115 | #define FIR_IRQ SYSINT2_IRQ(4) | ||
116 | #define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */ | ||
117 | #define DSIU_IRQ SYSINT2_IRQ(5) | ||
118 | #define PCI_IRQ SYSINT2_IRQ(6) | ||
119 | #define SCU_IRQ SYSINT2_IRQ(7) | ||
120 | #define CSI_IRQ SYSINT2_IRQ(8) | ||
121 | #define BCU_IRQ SYSINT2_IRQ(9) | ||
122 | #define ETHERNET_IRQ SYSINT2_IRQ(10) | ||
123 | #define SYSINT2_IRQ_LAST ETHERNET_IRQ | ||
124 | |||
125 | /* GIU Interrupt Numbers */ | ||
126 | #define GIU_IRQ_BASE 40 | ||
127 | #define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ | ||
128 | #define GIU_IRQ_LAST GIU_IRQ(31) | ||
129 | |||
130 | extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); | 77 | extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); |
131 | extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *)); | 78 | extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *)); |
132 | 79 | ||
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h index 96fdcd54cec7..e5e6ad1d2f86 100644 --- a/include/asm-mips/vr41xx/vrc4173.h +++ b/include/asm-mips/vr41xx/vrc4173.h | |||
@@ -27,26 +27,6 @@ | |||
27 | #include <asm/io.h> | 27 | #include <asm/io.h> |
28 | 28 | ||
29 | /* | 29 | /* |
30 | * Interrupt Number | ||
31 | */ | ||
32 | #define VRC4173_IRQ_BASE 72 | ||
33 | #define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) | ||
34 | #define VRC4173_USB_IRQ VRC4173_IRQ(0) | ||
35 | #define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1) | ||
36 | #define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2) | ||
37 | #define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3) | ||
38 | #define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4) | ||
39 | #define VRC4173_PIU_IRQ VRC4173_IRQ(5) | ||
40 | #define VRC4173_AIU_IRQ VRC4173_IRQ(6) | ||
41 | #define VRC4173_KIU_IRQ VRC4173_IRQ(7) | ||
42 | #define VRC4173_GIU_IRQ VRC4173_IRQ(8) | ||
43 | #define VRC4173_AC97_IRQ VRC4173_IRQ(9) | ||
44 | #define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10) | ||
45 | /* RFU */ | ||
46 | #define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13) | ||
47 | #define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ | ||
48 | |||
49 | /* | ||
50 | * PCI I/O accesses | 30 | * PCI I/O accesses |
51 | */ | 31 | */ |
52 | #ifdef CONFIG_VRC4173 | 32 | #ifdef CONFIG_VRC4173 |