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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2006-12-05 11:05:44 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-12-08 20:03:58 -0500
commit14b36af46a1d3652aff6734ea24816995dff8123 (patch)
tree35dc1c975faab9c25783b337155ea4df65448fb5 /include/asm-mips/mach-rm
parent88032b322a38b37335c8cb2e3473a45c81d280eb (diff)
[MIPS] Rename SNI_RM200_PCI to just SNI_RM preparing for more RM machines
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-rm')
-rw-r--r--include/asm-mips/mach-rm/cpu-feature-overrides.h46
-rw-r--r--include/asm-mips/mach-rm/mc146818rtc.h17
-rw-r--r--include/asm-mips/mach-rm/timex.h13
3 files changed, 76 insertions, 0 deletions
diff --git a/include/asm-mips/mach-rm/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h
new file mode 100644
index 000000000000..11410ae10d36
--- /dev/null
+++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h
@@ -0,0 +1,46 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2004 Ralf Baechle
7 *
8 * SNI RM200 C apparently was only shipped with R4600 V2.0 and R5000 processors.
9 */
10#ifndef __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
11#define __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
12
13#include <cpu-feature-overrides.h>
14
15#define cpu_has_tlb 1
16#define cpu_has_4kex 1
17#define cpu_has_4k_cache 1
18#define cpu_has_fpu 1
19#define cpu_has_32fpr 1
20#define cpu_has_counter 1
21#define cpu_has_watch 0
22#define cpu_has_mips16 0
23#define cpu_has_divec 0
24#define cpu_has_vce 0
25#define cpu_has_cache_cdex_p 1
26#define cpu_has_cache_cdex_s 0
27#define cpu_has_prefetch 0
28#define cpu_has_mcheck 0
29#define cpu_has_ejtag 0
30#define cpu_has_llsc 1
31#define cpu_has_vtag_icache 0
32#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
33#define cpu_has_ic_fills_f_dc 0
34#define cpu_has_dsp 0
35#define cpu_has_nofpuex 0
36#define cpu_has_64bits 1
37
38#define cpu_dcache_line_size() 32
39#define cpu_icache_line_size() 32
40
41#define cpu_has_mips32r1 0
42#define cpu_has_mips32r2 0
43#define cpu_has_mips64r1 0
44#define cpu_has_mips64r2 0
45
46#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-rm/mc146818rtc.h b/include/asm-mips/mach-rm/mc146818rtc.h
new file mode 100644
index 000000000000..d37ae68dc6a3
--- /dev/null
+++ b/include/asm-mips/mach-rm/mc146818rtc.h
@@ -0,0 +1,17 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004 by Ralf Baechle
7 *
8 * RTC routines for PC style attached Dallas chip with ARC epoch.
9 */
10#ifndef __ASM_MACH_RM200_MC146818RTC_H
11#define __ASM_MACH_RM200_MC146818RTC_H
12
13#define mc146818_decode_year(year) ((year) + 1980)
14
15#include_next <mc146818rtc.h>
16
17#endif /* __ASM_MACH_RM200_MC146818RTC_H */
diff --git a/include/asm-mips/mach-rm/timex.h b/include/asm-mips/mach-rm/timex.h
new file mode 100644
index 000000000000..11ff6cb0f214
--- /dev/null
+++ b/include/asm-mips/mach-rm/timex.h
@@ -0,0 +1,13 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2005 by Ralf Baechle
7 */
8#ifndef __ASM_MACH_RM200_TIMEX_H
9#define __ASM_MACH_RM200_TIMEX_H
10
11#define CLOCK_TICK_RATE 1193182
12
13#endif /* __ASM_MACH_RM200_TIMEX_H */