From 14b36af46a1d3652aff6734ea24816995dff8123 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Tue, 5 Dec 2006 17:05:44 +0100 Subject: [MIPS] Rename SNI_RM200_PCI to just SNI_RM preparing for more RM machines Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- include/asm-mips/mach-rm/cpu-feature-overrides.h | 46 ++++++++++++++++++++++++ include/asm-mips/mach-rm/mc146818rtc.h | 17 +++++++++ include/asm-mips/mach-rm/timex.h | 13 +++++++ 3 files changed, 76 insertions(+) create mode 100644 include/asm-mips/mach-rm/cpu-feature-overrides.h create mode 100644 include/asm-mips/mach-rm/mc146818rtc.h create mode 100644 include/asm-mips/mach-rm/timex.h (limited to 'include/asm-mips/mach-rm') diff --git a/include/asm-mips/mach-rm/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h new file mode 100644 index 000000000000..11410ae10d36 --- /dev/null +++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h @@ -0,0 +1,46 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003, 2004 Ralf Baechle + * + * SNI RM200 C apparently was only shipped with R4600 V2.0 and R5000 processors. + */ +#ifndef __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H +#define __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H + +#include + +#define cpu_has_tlb 1 +#define cpu_has_4kex 1 +#define cpu_has_4k_cache 1 +#define cpu_has_fpu 1 +#define cpu_has_32fpr 1 +#define cpu_has_counter 1 +#define cpu_has_watch 0 +#define cpu_has_mips16 0 +#define cpu_has_divec 0 +#define cpu_has_vce 0 +#define cpu_has_cache_cdex_p 1 +#define cpu_has_cache_cdex_s 0 +#define cpu_has_prefetch 0 +#define cpu_has_mcheck 0 +#define cpu_has_ejtag 0 +#define cpu_has_llsc 1 +#define cpu_has_vtag_icache 0 +#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) +#define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 +#define cpu_has_nofpuex 0 +#define cpu_has_64bits 1 + +#define cpu_dcache_line_size() 32 +#define cpu_icache_line_size() 32 + +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + +#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-rm/mc146818rtc.h b/include/asm-mips/mach-rm/mc146818rtc.h new file mode 100644 index 000000000000..d37ae68dc6a3 --- /dev/null +++ b/include/asm-mips/mach-rm/mc146818rtc.h @@ -0,0 +1,17 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2004 by Ralf Baechle + * + * RTC routines for PC style attached Dallas chip with ARC epoch. + */ +#ifndef __ASM_MACH_RM200_MC146818RTC_H +#define __ASM_MACH_RM200_MC146818RTC_H + +#define mc146818_decode_year(year) ((year) + 1980) + +#include_next + +#endif /* __ASM_MACH_RM200_MC146818RTC_H */ diff --git a/include/asm-mips/mach-rm/timex.h b/include/asm-mips/mach-rm/timex.h new file mode 100644 index 000000000000..11ff6cb0f214 --- /dev/null +++ b/include/asm-mips/mach-rm/timex.h @@ -0,0 +1,13 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003, 2005 by Ralf Baechle + */ +#ifndef __ASM_MACH_RM200_TIMEX_H +#define __ASM_MACH_RM200_TIMEX_H + +#define CLOCK_TICK_RATE 1193182 + +#endif /* __ASM_MACH_RM200_TIMEX_H */ -- cgit v1.2.2