diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-17 10:38:30 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-17 13:28:48 -0400 |
commit | 9d360ab4a7568a8d177280f651a8a772ae52b9b9 (patch) | |
tree | 39a7d2791d3ed0fd5b3369064265834e6397ecf2 /include/asm-mips/mach-pb1x00/pb1200.h | |
parent | 820b2d853bfa431c0c2ccba5adbae621b0303c42 (diff) |
[MIPS] Alchemy: Renumber interrupts so irq_cpu can work.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-pb1x00/pb1200.h')
-rw-r--r-- | include/asm-mips/mach-pb1x00/pb1200.h | 52 |
1 files changed, 28 insertions, 24 deletions
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h index 409d443322c1..d9f384acfea9 100644 --- a/include/asm-mips/mach-pb1x00/pb1200.h +++ b/include/asm-mips/mach-pb1x00/pb1200.h | |||
@@ -217,31 +217,35 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; | |||
217 | 217 | ||
218 | 218 | ||
219 | /* | 219 | /* |
220 | * External Interrupts for Pb1200 as of 8/6/2004. | 220 | * External Interrupts for Pb1200 as of 8/6/2004. |
221 | * Bit positions in the CPLD registers can be calculated by taking | 221 | * Bit positions in the CPLD registers can be calculated by taking |
222 | * the interrupt define and subtracting the PB1200_INT_BEGIN value. | 222 | * the interrupt define and subtracting the PB1200_INT_BEGIN value. |
223 | * *example: IDE bis pos is = 64 - 64 | 223 | * |
224 | ETH bit pos is = 65 - 64 | 224 | * Example: IDE bis pos is = 64 - 64 |
225 | * ETH bit pos is = 65 - 64 | ||
225 | */ | 226 | */ |
226 | #define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1) | 227 | enum external_pb1200_ints { |
227 | #define PB1200_IDE_INT (PB1200_INT_BEGIN + 0) | 228 | PB1200_INT_BEGIN = AU1000_MAX_INTR + 1, |
228 | #define PB1200_ETH_INT (PB1200_INT_BEGIN + 1) | 229 | |
229 | #define PB1200_PC0_INT (PB1200_INT_BEGIN + 2) | 230 | PB1200_IDE_INT = PB1200_INT_BEGIN, |
230 | #define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3) | 231 | PB1200_ETH_INT, |
231 | #define PB1200_PC1_INT (PB1200_INT_BEGIN + 4) | 232 | PB1200_PC0_INT, |
232 | #define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5) | 233 | PB1200_PC0_STSCHG_INT, |
233 | #define PB1200_DC_INT (PB1200_INT_BEGIN + 6) | 234 | PB1200_PC1_INT, |
234 | #define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7) | 235 | PB1200_PC1_STSCHG_INT, |
235 | #define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8) | 236 | PB1200_DC_INT, |
236 | #define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9) | 237 | PB1200_FLASHBUSY_INT, |
237 | #define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10) | 238 | PB1200_PC0_INSERT_INT, |
238 | #define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11) | 239 | PB1200_PC0_EJECT_INT, |
239 | #define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12) | 240 | PB1200_PC1_INSERT_INT, |
240 | #define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13) | 241 | PB1200_PC1_EJECT_INT, |
241 | #define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14) | 242 | PB1200_SD0_INSERT_INT, |
242 | #define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15) | 243 | PB1200_SD0_EJECT_INT, |
243 | 244 | PB1200_SD1_INSERT_INT, | |
244 | #define PB1200_INT_END (PB1200_INT_BEGIN + 15) | 245 | PB1200_SD1_EJECT_INT, |
246 | |||
247 | PB1200_INT_END (PB1200_INT_BEGIN + 15) | ||
248 | }; | ||
245 | 249 | ||
246 | /* For drivers/pcmcia/au1000_db1x00.c */ | 250 | /* For drivers/pcmcia/au1000_db1x00.c */ |
247 | #define BOARD_PC0_INT PB1200_PC0_INT | 251 | #define BOARD_PC0_INT PB1200_PC0_INT |