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authorManuel Lauss <mano@roarinelk.homelinux.net>2007-12-06 02:11:56 -0500
committerRalf Baechle <ralf@linux-mips.org>2007-12-08 23:51:10 -0500
commit0f5e49a2e2de69ee05ad8783274b0672247fd18f (patch)
tree7b29369dbf98b1a0346a4bc9c294cd64a3a05892 /include/asm-mips/mach-au1x00
parent6d2d419ffd83502d105014288e6af171a0a89544 (diff)
[MIPS] Alchemy: Fix Au1x SD controller IRQ
With the introduction of MIPS_CPU_IRQ_BASE, the hardcoded IRQ number of the au1100/au1200 SD controller(s) is no longer valid. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-au1x00')
-rw-r--r--include/asm-mips/mach-au1x00/au1100_mmc.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/include/asm-mips/mach-au1x00/au1100_mmc.h b/include/asm-mips/mach-au1x00/au1100_mmc.h
index 9e7d1ba21b55..9e0028f60a43 100644
--- a/include/asm-mips/mach-au1x00/au1100_mmc.h
+++ b/include/asm-mips/mach-au1x00/au1100_mmc.h
@@ -41,8 +41,11 @@
41 41
42#define NUM_AU1100_MMC_CONTROLLERS 2 42#define NUM_AU1100_MMC_CONTROLLERS 2
43 43
44 44#if defined(CONFIG_SOC_AU1100)
45#define AU1100_SD_IRQ 2 45#define AU1100_SD_IRQ AU1100_SD_INT
46#elif defined(CONFIG_SOC_AU1200)
47#define AU1100_SD_IRQ AU1200_SD_INT
48#endif
46 49
47 50
48#define SD0_BASE 0xB0600000 51#define SD0_BASE 0xB0600000