diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-03-02 14:18:46 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:30:50 -0400 |
commit | 88d535b6b58632bc51ee9a1f35ddfc357e365c37 (patch) | |
tree | 4b828339622e86b4809772120b2357239ef3c676 /include/asm-mips/hazards.h | |
parent | fe00f943e0ef98b4057abcc2940d631a975b43cd (diff) |
One definition of back_to_back_c0_hazard too much.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/hazards.h')
-rw-r--r-- | include/asm-mips/hazards.h | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index d6e88cf06ba9..181f08de889c 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h | |||
@@ -107,6 +107,7 @@ __asm__( | |||
107 | " .endm \n\t"); | 107 | " .endm \n\t"); |
108 | 108 | ||
109 | #ifdef CONFIG_CPU_RM9000 | 109 | #ifdef CONFIG_CPU_RM9000 |
110 | |||
110 | /* | 111 | /* |
111 | * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent | 112 | * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent |
112 | * use of the JTLB for instructions should not occur for 4 cpu cycles and use | 113 | * use of the JTLB for instructions should not occur for 4 cpu cycles and use |
@@ -144,12 +145,6 @@ __asm__( | |||
144 | "nop; nop; nop; nop; nop; nop;\n\t" \ | 145 | "nop; nop; nop; nop; nop; nop;\n\t" \ |
145 | ".set reorder\n\t") | 146 | ".set reorder\n\t") |
146 | 147 | ||
147 | #define back_to_back_c0_hazard() \ | ||
148 | __asm__ __volatile__( \ | ||
149 | " .set noreorder \n" \ | ||
150 | " nop; nop; nop \n" \ | ||
151 | " .set reorder \n") | ||
152 | |||
153 | #endif | 148 | #endif |
154 | 149 | ||
155 | /* | 150 | /* |