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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-m68k/io.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-m68k/io.h')
-rw-r--r--include/asm-m68k/io.h376
1 files changed, 376 insertions, 0 deletions
diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h
new file mode 100644
index 000000000000..6bb8b0d8f99d
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+++ b/include/asm-m68k/io.h
@@ -0,0 +1,376 @@
1/*
2 * linux/include/asm-m68k/io.h
3 *
4 * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other
5 * IO access
6 * - added Q40 support
7 * - added skeleton for GG-II and Amiga PCMCIA
8 * 2/3/01 RZ: - moved a few more defs into raw_io.h
9 *
10 * inX/outX/readX/writeX should not be used by any driver unless it does
11 * ISA or PCI access. Other drivers should use function defined in raw_io.h
12 * or define its own macros on top of these.
13 *
14 * inX(),outX() are for PCI and ISA I/O
15 * readX(),writeX() are for PCI memory
16 * isa_readX(),isa_writeX() are for ISA memory
17 *
18 * moved mem{cpy,set}_*io inside CONFIG_PCI
19 */
20
21#ifndef _IO_H
22#define _IO_H
23
24#ifdef __KERNEL__
25
26#include <linux/config.h>
27#include <asm/raw_io.h>
28#include <asm/virtconvert.h>
29
30
31#ifdef CONFIG_ATARI
32#include <asm/atarihw.h>
33#endif
34
35
36/*
37 * IO/MEM definitions for various ISA bridges
38 */
39
40
41#ifdef CONFIG_Q40
42
43#define q40_isa_io_base 0xff400000
44#define q40_isa_mem_base 0xff800000
45
46#define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr)))
47#define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+ 4*((unsigned long)(ioaddr)))
48#define Q40_ISA_MEM_B(madr) (q40_isa_mem_base+1+4*((unsigned long)(madr)))
49#define Q40_ISA_MEM_W(madr) (q40_isa_mem_base+ 4*((unsigned long)(madr)))
50
51#define MULTI_ISA 0
52#endif /* Q40 */
53
54/* GG-II Zorro to ISA bridge */
55#ifdef CONFIG_GG2
56
57extern unsigned long gg2_isa_base;
58#define GG2_ISA_IO_B(ioaddr) (gg2_isa_base+1+((unsigned long)(ioaddr)*4))
59#define GG2_ISA_IO_W(ioaddr) (gg2_isa_base+ ((unsigned long)(ioaddr)*4))
60#define GG2_ISA_MEM_B(madr) (gg2_isa_base+1+(((unsigned long)(madr)*4) & 0xfffff))
61#define GG2_ISA_MEM_W(madr) (gg2_isa_base+ (((unsigned long)(madr)*4) & 0xfffff))
62
63#ifndef MULTI_ISA
64#define MULTI_ISA 0
65#else
66#undef MULTI_ISA
67#define MULTI_ISA 1
68#endif
69#endif /* GG2 */
70
71#ifdef CONFIG_AMIGA_PCMCIA
72#include <asm/amigayle.h>
73
74#define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) )
75#define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) )
76
77#ifndef MULTI_ISA
78#define MULTI_ISA 0
79#else
80#undef MULTI_ISA
81#define MULTI_ISA 1
82#endif
83#endif /* AMIGA_PCMCIA */
84
85
86
87#ifdef CONFIG_ISA
88
89#if MULTI_ISA == 0
90#undef MULTI_ISA
91#endif
92
93#define Q40_ISA (1)
94#define GG2_ISA (2)
95#define AG_ISA (3)
96
97#if defined(CONFIG_Q40) && !defined(MULTI_ISA)
98#define ISA_TYPE Q40_ISA
99#define ISA_SEX 0
100#endif
101#if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
102#define ISA_TYPE AG_ISA
103#define ISA_SEX 1
104#endif
105#if defined(CONFIG_GG2) && !defined(MULTI_ISA)
106#define ISA_TYPE GG2_ISA
107#define ISA_SEX 0
108#endif
109
110#ifdef MULTI_ISA
111extern int isa_type;
112extern int isa_sex;
113
114#define ISA_TYPE isa_type
115#define ISA_SEX isa_sex
116#endif
117
118/*
119 * define inline addr translation functions. Normally only one variant will
120 * be compiled in so the case statement will be optimised away
121 */
122
123static inline u8 *isa_itb(unsigned long addr)
124{
125 switch(ISA_TYPE)
126 {
127#ifdef CONFIG_Q40
128 case Q40_ISA: return (u8 *)Q40_ISA_IO_B(addr);
129#endif
130#ifdef CONFIG_GG2
131 case GG2_ISA: return (u8 *)GG2_ISA_IO_B(addr);
132#endif
133#ifdef CONFIG_AMIGA_PCMCIA
134 case AG_ISA: return (u8 *)AG_ISA_IO_B(addr);
135#endif
136 default: return 0; /* avoid warnings, just in case */
137 }
138}
139static inline u16 *isa_itw(unsigned long addr)
140{
141 switch(ISA_TYPE)
142 {
143#ifdef CONFIG_Q40
144 case Q40_ISA: return (u16 *)Q40_ISA_IO_W(addr);
145#endif
146#ifdef CONFIG_GG2
147 case GG2_ISA: return (u16 *)GG2_ISA_IO_W(addr);
148#endif
149#ifdef CONFIG_AMIGA_PCMCIA
150 case AG_ISA: return (u16 *)AG_ISA_IO_W(addr);
151#endif
152 default: return 0; /* avoid warnings, just in case */
153 }
154}
155static inline u8 *isa_mtb(unsigned long addr)
156{
157 switch(ISA_TYPE)
158 {
159#ifdef CONFIG_Q40
160 case Q40_ISA: return (u8 *)Q40_ISA_MEM_B(addr);
161#endif
162#ifdef CONFIG_GG2
163 case GG2_ISA: return (u8 *)GG2_ISA_MEM_B(addr);
164#endif
165#ifdef CONFIG_AMIGA_PCMCIA
166 case AG_ISA: return (u8 *)addr;
167#endif
168 default: return 0; /* avoid warnings, just in case */
169 }
170}
171static inline u16 *isa_mtw(unsigned long addr)
172{
173 switch(ISA_TYPE)
174 {
175#ifdef CONFIG_Q40
176 case Q40_ISA: return (u16 *)Q40_ISA_MEM_W(addr);
177#endif
178#ifdef CONFIG_GG2
179 case GG2_ISA: return (u16 *)GG2_ISA_MEM_W(addr);
180#endif
181#ifdef CONFIG_AMIGA_PCMCIA
182 case AG_ISA: return (u16 *)addr;
183#endif
184 default: return 0; /* avoid warnings, just in case */
185 }
186}
187
188
189#define isa_inb(port) in_8(isa_itb(port))
190#define isa_inw(port) (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port)))
191#define isa_outb(val,port) out_8(isa_itb(port),(val))
192#define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
193
194#define isa_readb(p) in_8(isa_mtb((unsigned long)(p)))
195#define isa_readw(p) \
196 (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \
197 : in_le16(isa_mtw((unsigned long)(p))))
198#define isa_writeb(val,p) out_8(isa_mtb((unsigned long)(p)),(val))
199#define isa_writew(val,p) \
200 (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val)) \
201 : out_le16(isa_mtw((unsigned long)(p)),(val)))
202
203static inline void isa_delay(void)
204{
205 switch(ISA_TYPE)
206 {
207#ifdef CONFIG_Q40
208 case Q40_ISA: isa_outb(0,0x80); break;
209#endif
210#ifdef CONFIG_GG2
211 case GG2_ISA: break;
212#endif
213#ifdef CONFIG_AMIGA_PCMCIA
214 case AG_ISA: break;
215#endif
216 default: break; /* avoid warnings */
217 }
218}
219
220#define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;})
221#define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();})
222#define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;})
223#define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();})
224#define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;})
225#define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();})
226
227#define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr))
228#define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr))
229
230#define isa_insw(port, buf, nr) \
231 (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) : \
232 raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
233
234#define isa_outsw(port, buf, nr) \
235 (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \
236 raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
237#endif /* CONFIG_ISA */
238
239
240#if defined(CONFIG_ISA) && !defined(CONFIG_PCI)
241#define inb isa_inb
242#define inb_p isa_inb_p
243#define outb isa_outb
244#define outb_p isa_outb_p
245#define inw isa_inw
246#define inw_p isa_inw_p
247#define outw isa_outw
248#define outw_p isa_outw_p
249#define inl isa_inw
250#define inl_p isa_inw_p
251#define outl isa_outw
252#define outl_p isa_outw_p
253#define insb isa_insb
254#define insw isa_insw
255#define outsb isa_outsb
256#define outsw isa_outsw
257#define readb isa_readb
258#define readw isa_readw
259#define writeb isa_writeb
260#define writew isa_writew
261#endif /* CONFIG_ISA */
262
263#if defined(CONFIG_PCI)
264
265#define inl(port) in_le32(port)
266#define outl(val,port) out_le32((port),(val))
267#define readl(addr) in_le32(addr)
268#define writel(val,addr) out_le32((addr),(val))
269
270/* those can be defined for both ISA and PCI - it won't work though */
271#define readb(addr) in_8(addr)
272#define readw(addr) in_le16(addr)
273#define writeb(val,addr) out_8((addr),(val))
274#define writew(val,addr) out_le16((addr),(val))
275
276#define readb_relaxed(addr) readb(addr)
277#define readw_relaxed(addr) readw(addr)
278#define readl_relaxed(addr) readl(addr)
279
280#ifndef CONFIG_ISA
281#define inb(port) in_8(port)
282#define outb(val,port) out_8((port),(val))
283#define inw(port) in_le16(port)
284#define outw(val,port) out_le16((port),(val))
285
286#else
287/*
288 * kernel with both ISA and PCI compiled in, those have
289 * conflicting defs for in/out. Simply consider port < 1024
290 * ISA and everything else PCI. read,write not defined
291 * in this case
292 */
293#define inb(port) ((port)<1024 ? isa_inb(port) : in_8(port))
294#define inb_p(port) ((port)<1024 ? isa_inb_p(port) : in_8(port))
295#define inw(port) ((port)<1024 ? isa_inw(port) : in_le16(port))
296#define inw_p(port) ((port)<1024 ? isa_inw_p(port) : in_le16(port))
297#define inl(port) ((port)<1024 ? isa_inl(port) : in_le32(port))
298#define inl_p(port) ((port)<1024 ? isa_inl_p(port) : in_le32(port))
299
300#define outb(val,port) ((port)<1024 ? isa_outb((val),(port)) : out_8((port),(val)))
301#define outb_p(val,port) ((port)<1024 ? isa_outb_p((val),(port)) : out_8((port),(val)))
302#define outw(val,port) ((port)<1024 ? isa_outw((val),(port)) : out_le16((port),(val)))
303#define outw_p(val,port) ((port)<1024 ? isa_outw_p((val),(port)) : out_le16((port),(val)))
304#define outl(val,port) ((port)<1024 ? isa_outl((val),(port)) : out_le32((port),(val)))
305#define outl_p(val,port) ((port)<1024 ? isa_outl_p((val),(port)) : out_le32((port),(val)))
306#endif
307#endif /* CONFIG_PCI */
308
309#if !defined(CONFIG_ISA) && !defined(CONFIG_PCI) && defined(CONFIG_HP300)
310/*
311 * We need to define dummy functions otherwise drivers/serial/8250.c doesn't link
312 */
313#define inb(port) 0xff
314#define inb_p(port) 0xff
315#define outb(val,port) do { } while (0)
316#define outb_p(val,port) do { } while (0)
317
318/*
319 * These should be valid on any ioremap()ed region
320 */
321#define readb(addr) in_8(addr)
322#define writeb(val,addr) out_8((addr),(val))
323#define readl(addr) in_le32(addr)
324#define writel(val,addr) out_le32((addr),(val))
325#endif
326
327#define mmiowb()
328
329static inline void *ioremap(unsigned long physaddr, unsigned long size)
330{
331 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
332}
333static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
334{
335 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
336}
337static inline void *ioremap_writethrough(unsigned long physaddr,
338 unsigned long size)
339{
340 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
341}
342static inline void *ioremap_fullcache(unsigned long physaddr,
343 unsigned long size)
344{
345 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
346}
347
348
349/* m68k caches aren't DMA coherent */
350extern void dma_cache_wback_inv(unsigned long start, unsigned long size);
351extern void dma_cache_wback(unsigned long start, unsigned long size);
352extern void dma_cache_inv(unsigned long start, unsigned long size);
353
354
355#ifndef CONFIG_SUN3
356#define IO_SPACE_LIMIT 0xffff
357#else
358#define IO_SPACE_LIMIT 0x0fffffff
359#endif
360
361#endif /* __KERNEL__ */
362
363#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
364
365/*
366 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
367 * access
368 */
369#define xlate_dev_mem_ptr(p) __va(p)
370
371/*
372 * Convert a virtual cached pointer to an uncached pointer
373 */
374#define xlate_dev_kmem_ptr(p) p
375
376#endif /* _IO_H */