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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-m32r/mappi2
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-m32r/mappi2')
-rw-r--r--include/asm-m32r/mappi2/mappi2_pld.h151
1 files changed, 151 insertions, 0 deletions
diff --git a/include/asm-m32r/mappi2/mappi2_pld.h b/include/asm-m32r/mappi2/mappi2_pld.h
new file mode 100644
index 000000000000..01dcdd19dbe6
--- /dev/null
+++ b/include/asm-m32r/mappi2/mappi2_pld.h
@@ -0,0 +1,151 @@
1/*
2 * include/asm/mappi2/mappi2_pld.h
3 *
4 * Definitions for Extended IO Logic on MAPPI2 board.
5 * based on m32700ut_pld.h by
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file "COPYING" in the main directory of
9 * this archive for more details.
10 *
11 */
12
13#ifndef _MAPPI2_PLD_H
14#define _MAPPI2_PLD_H
15
16#ifndef __ASSEMBLY__
17/* FIXME:
18 * Some C functions use non-cache address, so can't define non-cache address.
19 */
20#define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */)
21#define __reg8 (volatile unsigned char *)
22#define __reg16 (volatile unsigned short *)
23#define __reg32 (volatile unsigned int *)
24#else
25#define PLD_BASE (0x10c00000 + NONCACHE_OFFSET)
26#define __reg8
27#define __reg16
28#define __reg32
29#endif /* __ASSEMBLY__ */
30
31/* CFC */
32#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
33#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
34#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
35#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
36#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
37#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
38
39/* MMC */
40#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
41#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
42#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
43#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
44#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
45#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
46#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
47#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
48#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
49#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
50#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
51#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
52
53/* Power Control of MMC and CF */
54#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
55
56
57/*==== ICU ====*/
58#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
59#define M32R_IRQ_I2C (28) /* I2C-BUS */
60#if 1
61#define PLD_IRQ_CFIREQ (40) /* CFC Card Interrupt */
62#define PLD_IRQ_CFC_INSERT (41) /* CFC Card Insert */
63#define PLD_IRQ_CFC_EJECT (42) /* CFC Card Eject */
64#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
65#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
66#else
67#define PLD_IRQ_CFIREQ (34) /* CFC Card Interrupt */
68#define PLD_IRQ_CFC_INSERT (35) /* CFC Card Insert */
69#define PLD_IRQ_CFC_EJECT (36) /* CFC Card Eject */
70#define PLD_IRQ_MMCCARD (37) /* MMC Card Insert */
71#define PLD_IRQ_MMCIRQ (38) /* MMC Transfer Done */
72#endif
73
74
75#if 0
76/* LED Control
77 *
78 * 1: DIP swich side
79 * 2: Reset switch side
80 */
81#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
82#define PLD_IOLED_1_ON 0x001
83#define PLD_IOLED_1_OFF 0x000
84#define PLD_IOLED_2_ON 0x002
85#define PLD_IOLED_2_OFF 0x000
86
87/* DIP Switch
88 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
89 * 1: -
90 * 2: -
91 * 3: -
92 */
93#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
94#define PLD_IOSWSTS_IOSW2 0x0200
95#define PLD_IOSWSTS_IOSW1 0x0100
96#define PLD_IOSWSTS_IOWP0 0x0001
97
98#endif
99
100/* CRC */
101#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
102#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
103#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
104#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
105#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
106#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
107
108
109#if 0
110/* RTC */
111#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
112#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
113#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
114#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
115#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
116
117/* SIO0 */
118#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
119#define PLD_ESIO0CR_TXEN 0x0001
120#define PLD_ESIO0CR_RXEN 0x0002
121#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
122#define PLD_ESIO0MOD0_CTSS 0x0040
123#define PLD_ESIO0MOD0_RTSS 0x0080
124#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
125#define PLD_ESIO0MOD1_LMFS 0x0010
126#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
127#define PLD_ESIO0STS_TEMP 0x0001
128#define PLD_ESIO0STS_TXCP 0x0002
129#define PLD_ESIO0STS_RXCP 0x0004
130#define PLD_ESIO0STS_TXSC 0x0100
131#define PLD_ESIO0STS_RXSC 0x0200
132#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
133#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
134#define PLD_ESIO0INTCR_TXIEN 0x0002
135#define PLD_ESIO0INTCR_RXCEN 0x0004
136#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
137#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
138#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
139
140/* SIM Card */
141#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
142#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
143#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
144#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
145#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
146#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
147#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
148
149#endif
150
151#endif /* _MAPPI2_PLD.H */