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authorHirokazu Takata <takata@linux-m32r.org>2005-06-21 20:16:10 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-21 22:07:30 -0400
commit2368086344c3d67b0f4aecac39d620fb9b8795c3 (patch)
treeaa55003e311abf6049acd23f5ff7f8bfd24eca4c /include/asm-m32r/m32102.h
parentd4c477ca5448f19afaaf6c0cfd655009ea9e614d (diff)
[PATCH] m32r: Support M3A-2170(Mappi-III) platform
This patchset is for supporting a new m32r platform, M3A-2170(Mappi-III) evaluation board. An M32R chip multiprocessor is equipped on the board. http://http://www.linux-m32r.org/eng/platform/platform.html * arch/m32r/Kconfig: Support Mappi-III platform. * arch/m32r/kernel/Makefile: ditto. * arch/m32r/kernel/io_mappi3.c: ditto. * arch/m32r/kernel/setup.c: ditto. * arch/m32r/kernel/setup_mappi3.c: ditto. * include/asm-m32r/m32102.h: ditto. * include/asm-m32r/m32r.h: ditto. * include/asm-m32r/mappi3/mappi3_pld.h: ditto. * include/asm-m32r/ide.h: CF support for Mappi-III. * arch/m32r/kernel/setup_mappi3.c: ditto. * arch/m32r/mappi3/defconfig.smp: A default config file for Mappi-III. * arch/m32r/mappi3/dot.gdbinit: A default .gdbinit file for Mappi-III. * arch/m32r/boot/compressed/m32r_sio.c: Modified for Mappi-III - At boot time, m32r-g00ff bootloader makes MMU off for Mappi-III, on the contrary it makes MMU on for Mappi-II. * arch/m32r/kernel/io_mappi2.c: Update comments. * arch/m32r/kernel/setup_mappi2.c: ditto. Signed-off-by: Mamoru Sakugawa <sakugawa@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m32r/m32102.h')
-rw-r--r--include/asm-m32r/m32102.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-m32r/m32102.h b/include/asm-m32r/m32102.h
index b56034026bf8..cb98101f4f6e 100644
--- a/include/asm-m32r/m32102.h
+++ b/include/asm-m32r/m32102.h
@@ -175,6 +175,7 @@
175#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ 175#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
176#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ 176#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
177#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ 177#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
178#define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */
178#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */ 179#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */
179#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */ 180#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */
180#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */ 181#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */