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authorbibo,mao <bibo.mao@intel.com>2007-01-31 04:50:31 -0500
committerTony Luck <tony.luck@intel.com>2007-02-05 16:49:29 -0500
commit90f9d70a582c02f50b4dd847166cd5b037219891 (patch)
treeffe6b5246f9e2334b474ca0913776668803d1ea0 /include/asm-ia64/ipcbuf.h
parentc237508afa5d47282d3047784864013eebdc68ab (diff)
[IA64] enable singlestep on system call
As is pointed out in http://www.gelato.org/community/view_linear.php?id=1_1036&from=authors&value=Ian%20Wienand#1_1039, if single step on break instruction, the break fault has higher priority than the single-step trap. When the break fault handler is entered, it advances the IP by 1 instruction so break instruction single-stepping is skipped, actually it is next instruction which is single stepped. This patch modifies this, it adds TIF_SINGLESTEP bit for thread flags, and generate a fake sigtrap when single stepping break instruction. Test case in attachment can verify this. Any comments is welcome. Signed-off-by: bibo, mao <bibo.mao@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/ipcbuf.h')
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