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| author | Anton Altaparmakov <aia21@cantab.net> | 2006-01-19 11:39:33 -0500 | 
|---|---|---|
| committer | Anton Altaparmakov <aia21@cantab.net> | 2006-01-19 11:39:33 -0500 | 
| commit | 944d79559d154c12becde0dab327016cf438f46c (patch) | |
| tree | 50c101806f4d3b6585222dda060559eb4f3e005a /include/asm-i386/processor.h | |
| parent | d087e4bdd24ebe3ae3d0b265b6573ec901af4b4b (diff) | |
| parent | 0f36b018b2e314d45af86449f1a97facb1fbe300 (diff) | |
Merge branch 'master' of /usr/src/ntfs-2.6/
Diffstat (limited to 'include/asm-i386/processor.h')
| -rw-r--r-- | include/asm-i386/processor.h | 26 | 
1 files changed, 20 insertions, 6 deletions
| diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index 5c96cf6dcb39..feca5d961e2b 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h | |||
| @@ -61,9 +61,11 @@ struct cpuinfo_x86 { | |||
| 61 | int x86_cache_size; /* in KB - valid for CPUS which support this | 61 | int x86_cache_size; /* in KB - valid for CPUS which support this | 
| 62 | call */ | 62 | call */ | 
| 63 | int x86_cache_alignment; /* In bytes */ | 63 | int x86_cache_alignment; /* In bytes */ | 
| 64 | int fdiv_bug; | 64 | char fdiv_bug; | 
| 65 | int f00f_bug; | 65 | char f00f_bug; | 
| 66 | int coma_bug; | 66 | char coma_bug; | 
| 67 | char pad0; | ||
| 68 | int x86_power; | ||
| 67 | unsigned long loops_per_jiffy; | 69 | unsigned long loops_per_jiffy; | 
| 68 | unsigned char x86_max_cores; /* cpuid returned max cores value */ | 70 | unsigned char x86_max_cores; /* cpuid returned max cores value */ | 
| 69 | unsigned char booted_cores; /* number of cores as seen by OS */ | 71 | unsigned char booted_cores; /* number of cores as seen by OS */ | 
| @@ -279,9 +281,11 @@ static inline void clear_in_cr4 (unsigned long mask) | |||
| 279 | outb((data), 0x23); \ | 281 | outb((data), 0x23); \ | 
| 280 | } while (0) | 282 | } while (0) | 
| 281 | 283 | ||
| 282 | static inline void serialize_cpu(void) | 284 | /* Stop speculative execution */ | 
| 285 | static inline void sync_core(void) | ||
| 283 | { | 286 | { | 
| 284 | __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx"); | 287 | int tmp; | 
| 288 | asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory"); | ||
| 285 | } | 289 | } | 
| 286 | 290 | ||
| 287 | static inline void __monitor(const void *eax, unsigned long ecx, | 291 | static inline void __monitor(const void *eax, unsigned long ecx, | 
| @@ -557,10 +561,20 @@ unsigned long get_wchan(struct task_struct *p); | |||
| 557 | (unsigned long)(&__ptr[THREAD_SIZE_LONGS]); \ | 561 | (unsigned long)(&__ptr[THREAD_SIZE_LONGS]); \ | 
| 558 | }) | 562 | }) | 
| 559 | 563 | ||
| 564 | /* | ||
| 565 | * The below -8 is to reserve 8 bytes on top of the ring0 stack. | ||
| 566 | * This is necessary to guarantee that the entire "struct pt_regs" | ||
| 567 | * is accessable even if the CPU haven't stored the SS/ESP registers | ||
| 568 | * on the stack (interrupt gate does not save these registers | ||
| 569 | * when switching to the same priv ring). | ||
| 570 | * Therefore beware: accessing the xss/esp fields of the | ||
| 571 | * "struct pt_regs" is possible, but they may contain the | ||
| 572 | * completely wrong values. | ||
| 573 | */ | ||
| 560 | #define task_pt_regs(task) \ | 574 | #define task_pt_regs(task) \ | 
| 561 | ({ \ | 575 | ({ \ | 
| 562 | struct pt_regs *__regs__; \ | 576 | struct pt_regs *__regs__; \ | 
| 563 | __regs__ = (struct pt_regs *)KSTK_TOP((task)->thread_info); \ | 577 | __regs__ = (struct pt_regs *)(KSTK_TOP(task_stack_page(task))-8); \ | 
| 564 | __regs__ - 1; \ | 578 | __regs__ - 1; \ | 
| 565 | }) | 579 | }) | 
| 566 | 580 | ||
