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authorDavid Woodhouse <dwmw2@shinybook.infradead.org>2005-08-09 11:51:35 -0400
committerDavid Woodhouse <dwmw2@shinybook.infradead.org>2005-08-09 11:51:35 -0400
commitc973b112c76c9d8fd042991128f218a738cc8d0a (patch)
treee813b0da5d0a0e19e06de6462d145a29ad683026 /include/asm-cris/arch-v32/hwregs/asm/intr_vect.h
parentc5fbc3966f48279dbebfde10248c977014aa9988 (diff)
parent00dd1e433967872f3997a45d5adf35056fdf2f56 (diff)
Merge with /shiny/git/linux-2.6/.git
Diffstat (limited to 'include/asm-cris/arch-v32/hwregs/asm/intr_vect.h')
-rw-r--r--include/asm-cris/arch-v32/hwregs/asm/intr_vect.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h b/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h
new file mode 100644
index 000000000000..c8315905c571
--- /dev/null
+++ b/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h
@@ -0,0 +1,38 @@
1/* Interrupt vector numbers autogenerated by /n/asic/design/tools/rdesc/src/rdes2intr version
2 from ../../inst/intr_vect/rtl/guinness/ivmask.config.r
3version . */
4
5#ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
6#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
7#define MEMARB_INTR_VECT 0x31
8#define GEN_IO_INTR_VECT 0x32
9#define IOP0_INTR_VECT 0x33
10#define IOP1_INTR_VECT 0x34
11#define IOP2_INTR_VECT 0x35
12#define IOP3_INTR_VECT 0x36
13#define DMA0_INTR_VECT 0x37
14#define DMA1_INTR_VECT 0x38
15#define DMA2_INTR_VECT 0x39
16#define DMA3_INTR_VECT 0x3a
17#define DMA4_INTR_VECT 0x3b
18#define DMA5_INTR_VECT 0x3c
19#define DMA6_INTR_VECT 0x3d
20#define DMA7_INTR_VECT 0x3e
21#define DMA8_INTR_VECT 0x3f
22#define DMA9_INTR_VECT 0x40
23#define ATA_INTR_VECT 0x41
24#define SSER0_INTR_VECT 0x42
25#define SSER1_INTR_VECT 0x43
26#define SER0_INTR_VECT 0x44
27#define SER1_INTR_VECT 0x45
28#define SER2_INTR_VECT 0x46
29#define SER3_INTR_VECT 0x47
30#define P21_INTR_VECT 0x48
31#define ETH0_INTR_VECT 0x49
32#define ETH1_INTR_VECT 0x4a
33#define TIMER_INTR_VECT 0x4b
34#define BIF_ARB_INTR_VECT 0x4c
35#define BIF_DMA_INTR_VECT 0x4d
36#define EXT_INTR_VECT 0x4e
37
38#endif