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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-07-09 16:34:25 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-09 16:34:25 -0400
commitf974a8ec96571535ee07880a023bcce0e3f2c76b (patch)
tree5cf09207b1ad292a55275cd0b24999fa29b9dfe8 /include/asm-blackfin
parentc0b8556f2f8146bd38324b14b1ce00f249ba8ed9 (diff)
parent4ed47896935573c8423d05bddda3f269d6e6c613 (diff)
Merge branch 'machtypes' into pxa-palm
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r--include/asm-blackfin/bfin-global.h11
-rw-r--r--include/asm-blackfin/checksum.h29
-rw-r--r--include/asm-blackfin/gpio.h1
-rw-r--r--include/asm-blackfin/io.h2
-rw-r--r--include/asm-blackfin/mach-bf527/anomaly.h5
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_serial_5xx.h8
-rw-r--r--include/asm-blackfin/mach-bf527/blackfin.h8
-rw-r--r--include/asm-blackfin/mach-bf533/anomaly.h31
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_serial_5xx.h8
-rw-r--r--include/asm-blackfin/mach-bf537/anomaly.h10
-rw-r--r--include/asm-blackfin/mach-bf537/bfin_serial_5xx.h8
-rw-r--r--include/asm-blackfin/mach-bf548/anomaly.h2
-rw-r--r--include/asm-blackfin/mach-bf548/bfin_serial_5xx.h12
-rw-r--r--include/asm-blackfin/mach-bf561/anomaly.h2
-rw-r--r--include/asm-blackfin/mach-bf561/bfin_serial_5xx.h8
-rw-r--r--include/asm-blackfin/mach-bf561/dma.h8
-rw-r--r--include/asm-blackfin/serial.h5
17 files changed, 96 insertions, 62 deletions
diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h
index 716df7c85923..76033831eb35 100644
--- a/include/asm-blackfin/bfin-global.h
+++ b/include/asm-blackfin/bfin-global.h
@@ -37,7 +37,9 @@
37#include <linux/linkage.h> 37#include <linux/linkage.h>
38#include <linux/types.h> 38#include <linux/types.h>
39 39
40#if defined(CONFIG_DMA_UNCACHED_2M) 40#if defined(CONFIG_DMA_UNCACHED_4M)
41# define DMA_UNCACHED_REGION (4 * 1024 * 1024)
42#elif defined(CONFIG_DMA_UNCACHED_2M)
41# define DMA_UNCACHED_REGION (2 * 1024 * 1024) 43# define DMA_UNCACHED_REGION (2 * 1024 * 1024)
42#elif defined(CONFIG_DMA_UNCACHED_1M) 44#elif defined(CONFIG_DMA_UNCACHED_1M)
43# define DMA_UNCACHED_REGION (1024 * 1024) 45# define DMA_UNCACHED_REGION (1024 * 1024)
@@ -103,13 +105,6 @@ extern int sram_free(const void*);
103extern void *sram_alloc_with_lsl(size_t, unsigned long); 105extern void *sram_alloc_with_lsl(size_t, unsigned long);
104extern int sram_free_with_lsl(const void*); 106extern int sram_free_with_lsl(const void*);
105 107
106extern void led_on(int);
107extern void led_off(int);
108extern void led_toggle(int);
109extern void led_disp_num(int);
110extern void led_toggle_num(int);
111extern void init_leds(void);
112
113extern const char bfin_board_name[]; 108extern const char bfin_board_name[];
114extern unsigned long wall_jiffies; 109extern unsigned long wall_jiffies;
115 110
diff --git a/include/asm-blackfin/checksum.h b/include/asm-blackfin/checksum.h
index 2638f2586d2f..6f6af2b8e9e0 100644
--- a/include/asm-blackfin/checksum.h
+++ b/include/asm-blackfin/checksum.h
@@ -15,7 +15,7 @@
15 * 15 *
16 * it's best to have buff aligned on a 32-bit boundary 16 * it's best to have buff aligned on a 32-bit boundary
17 */ 17 */
18unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum); 18__wsum csum_partial(const void *buff, int len, __wsum sum);
19 19
20/* 20/*
21 * the same as csum_partial, but copies from src while it 21 * the same as csum_partial, but copies from src while it
@@ -25,8 +25,8 @@ unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum);
25 * better 64-bit) boundary 25 * better 64-bit) boundary
26 */ 26 */
27 27
28unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst, 28__wsum csum_partial_copy(const void *src, void *dst,
29 int len, int sum); 29 int len, __wsum sum);
30 30
31/* 31/*
32 * the same as csum_partial_copy, but copies from user space. 32 * the same as csum_partial_copy, but copies from user space.
@@ -35,20 +35,19 @@ unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst,
35 * better 64-bit) boundary 35 * better 64-bit) boundary
36 */ 36 */
37 37
38extern unsigned int csum_partial_copy_from_user(const unsigned char *src, 38extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
39 unsigned char *dst, int len, 39 int len, __wsum sum, int *csum_err);
40 int sum, int *csum_err);
41 40
42#define csum_partial_copy_nocheck(src, dst, len, sum) \ 41#define csum_partial_copy_nocheck(src, dst, len, sum) \
43 csum_partial_copy((src), (dst), (len), (sum)) 42 csum_partial_copy((src), (dst), (len), (sum))
44 43
45unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl); 44__sum16 ip_fast_csum(unsigned char *iph, unsigned int ihl);
46 45
47/* 46/*
48 * Fold a partial checksum 47 * Fold a partial checksum
49 */ 48 */
50 49
51static inline unsigned int csum_fold(unsigned int sum) 50static inline __sum16 csum_fold(__wsum sum)
52{ 51{
53 while (sum >> 16) 52 while (sum >> 16)
54 sum = (sum & 0xffff) + (sum >> 16); 53 sum = (sum & 0xffff) + (sum >> 16);
@@ -60,9 +59,9 @@ static inline unsigned int csum_fold(unsigned int sum)
60 * returns a 16-bit checksum, already complemented 59 * returns a 16-bit checksum, already complemented
61 */ 60 */
62 61
63static inline unsigned int 62static inline __wsum
64csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, 63csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
65 unsigned short proto, unsigned int sum) 64 unsigned short proto, __wsum sum)
66{ 65{
67 66
68 __asm__ ("%0 = %0 + %1;\n\t" 67 __asm__ ("%0 = %0 + %1;\n\t"
@@ -84,9 +83,9 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len,
84 return (sum); 83 return (sum);
85} 84}
86 85
87static inline unsigned short int 86static inline __sum16
88csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, 87csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
89 unsigned short proto, unsigned int sum) 88 unsigned short proto, __wsum sum)
90{ 89{
91 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); 90 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
92} 91}
@@ -96,6 +95,6 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len,
96 * in icmp.c 95 * in icmp.c
97 */ 96 */
98 97
99extern unsigned short ip_compute_csum(const unsigned char *buff, int len); 98extern __sum16 ip_compute_csum(const void *buff, int len);
100 99
101#endif /* _BFIN_CHECKSUM_H */ 100#endif /* _BFIN_CHECKSUM_H */
diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h
index 27ff532a806c..ff95e9d88342 100644
--- a/include/asm-blackfin/gpio.h
+++ b/include/asm-blackfin/gpio.h
@@ -437,7 +437,6 @@ void gpio_set_value(unsigned gpio, int arg);
437int gpio_get_value(unsigned gpio); 437int gpio_get_value(unsigned gpio);
438 438
439#ifndef BF548_FAMILY 439#ifndef BF548_FAMILY
440#define gpio_get_value(gpio) get_gpio_data(gpio)
441#define gpio_set_value(gpio, value) set_gpio_data(gpio, value) 440#define gpio_set_value(gpio, value) set_gpio_data(gpio, value)
442#endif 441#endif
443 442
diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h
index 574fe56989d1..cbbf7ffdbbff 100644
--- a/include/asm-blackfin/io.h
+++ b/include/asm-blackfin/io.h
@@ -117,10 +117,12 @@ static inline unsigned int readl(const volatile void __iomem *addr)
117 117
118extern void outsb(unsigned long port, const void *addr, unsigned long count); 118extern void outsb(unsigned long port, const void *addr, unsigned long count);
119extern void outsw(unsigned long port, const void *addr, unsigned long count); 119extern void outsw(unsigned long port, const void *addr, unsigned long count);
120extern void outsw_8(unsigned long port, const void *addr, unsigned long count);
120extern void outsl(unsigned long port, const void *addr, unsigned long count); 121extern void outsl(unsigned long port, const void *addr, unsigned long count);
121 122
122extern void insb(unsigned long port, void *addr, unsigned long count); 123extern void insb(unsigned long port, void *addr, unsigned long count);
123extern void insw(unsigned long port, void *addr, unsigned long count); 124extern void insw(unsigned long port, void *addr, unsigned long count);
125extern void insw_8(unsigned long port, void *addr, unsigned long count);
124extern void insl(unsigned long port, void *addr, unsigned long count); 126extern void insl(unsigned long port, void *addr, unsigned long count);
125extern void insl_16(unsigned long port, void *addr, unsigned long count); 127extern void insl_16(unsigned long port, void *addr, unsigned long count);
126 128
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h
index 735fa02fafb2..4725268a5ada 100644
--- a/include/asm-blackfin/mach-bf527/anomaly.h
+++ b/include/asm-blackfin/mach-bf527/anomaly.h
@@ -15,12 +15,16 @@
15 15
16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ 16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
17#define ANOMALY_05000074 (1) 17#define ANOMALY_05000074 (1)
18/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
19#define ANOMALY_05000119 (1)
18/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ 20/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
19#define ANOMALY_05000122 (1) 21#define ANOMALY_05000122 (1)
20/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ 22/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
21#define ANOMALY_05000245 (1) 23#define ANOMALY_05000245 (1)
22/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ 24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
23#define ANOMALY_05000265 (1) 25#define ANOMALY_05000265 (1)
26/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
27#define ANOMALY_05000312 (1)
24/* Incorrect Access of OTP_STATUS During otp_write() Function */ 28/* Incorrect Access of OTP_STATUS During otp_write() Function */
25#define ANOMALY_05000328 (1) 29#define ANOMALY_05000328 (1)
26/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */ 30/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
@@ -92,7 +96,6 @@
92#define ANOMALY_05000266 (0) 96#define ANOMALY_05000266 (0)
93#define ANOMALY_05000273 (0) 97#define ANOMALY_05000273 (0)
94#define ANOMALY_05000311 (0) 98#define ANOMALY_05000311 (0)
95#define ANOMALY_05000312 (0)
96#define ANOMALY_05000323 (0) 99#define ANOMALY_05000323 (0)
97#define ANOMALY_05000363 (0) 100#define ANOMALY_05000363 (0)
98 101
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index 26e3c8076b4e..2526b6ed6faa 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61
56#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 62#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
57# define CONFIG_SERIAL_BFIN_CTSRTS 63# define CONFIG_SERIAL_BFIN_CTSRTS
58 64
@@ -90,7 +96,7 @@ struct bfin_serial_port {
90 struct work_struct tx_dma_workqueue; 96 struct work_struct tx_dma_workqueue;
91#endif 97#endif
92#ifdef CONFIG_SERIAL_BFIN_CTSRTS 98#ifdef CONFIG_SERIAL_BFIN_CTSRTS
93 struct work_struct cts_workqueue; 99 struct timer_list cts_timer;
94 int cts_pin; 100 int cts_pin;
95 int rts_pin; 101 int rts_pin;
96#endif 102#endif
diff --git a/include/asm-blackfin/mach-bf527/blackfin.h b/include/asm-blackfin/mach-bf527/blackfin.h
index 2891727b6176..297821e2d79a 100644
--- a/include/asm-blackfin/mach-bf527/blackfin.h
+++ b/include/asm-blackfin/mach-bf527/blackfin.h
@@ -39,22 +39,22 @@
39#include "defBF522.h" 39#include "defBF522.h"
40#include "anomaly.h" 40#include "anomaly.h"
41 41
42#if defined(CONFIG_BF527) 42#if defined(CONFIG_BF527) || defined(CONFIG_BF526)
43#include "defBF527.h" 43#include "defBF527.h"
44#endif 44#endif
45 45
46#if defined(CONFIG_BF525) 46#if defined(CONFIG_BF525) || defined(CONFIG_BF524)
47#include "defBF525.h" 47#include "defBF525.h"
48#endif 48#endif
49 49
50#if !defined(__ASSEMBLY__) 50#if !defined(__ASSEMBLY__)
51#include "cdefBF522.h" 51#include "cdefBF522.h"
52 52
53#if defined(CONFIG_BF527) 53#if defined(CONFIG_BF527) || defined(CONFIG_BF526)
54#include "cdefBF527.h" 54#include "cdefBF527.h"
55#endif 55#endif
56 56
57#if defined(CONFIG_BF525) 57#if defined(CONFIG_BF525) || defined(CONFIG_BF524)
58#include "cdefBF525.h" 58#include "cdefBF525.h"
59#endif 59#endif
60#endif 60#endif
diff --git a/include/asm-blackfin/mach-bf533/anomaly.h b/include/asm-blackfin/mach-bf533/anomaly.h
index 5a6dcc5fa36c..8f7ea112fd3a 100644
--- a/include/asm-blackfin/mach-bf533/anomaly.h
+++ b/include/asm-blackfin/mach-bf533/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf533/anomaly.h 2 * File: include/asm-blackfin/mach-bf533/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc. 5 * Copyright (C) 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -176,6 +176,21 @@
176#define ANOMALY_05000315 (1) 176#define ANOMALY_05000315 (1)
177/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */ 177/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */
178#define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532) 178#define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532)
179/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
180#define ANOMALY_05000357 (1)
181/* UART Break Signal Issues */
182#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
183/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
184#define ANOMALY_05000366 (1)
185/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
186#define ANOMALY_05000371 (1)
187/* PPI Does Not Start Properly In Specific Mode */
188#define ANOMALY_05000400 (__SILICON_REVISION__ >= 5)
189/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
190#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
191/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
192#define ANOMALY_05000403 (1)
193
179 194
180/* These anomalies have been "phased" out of analog.com anomaly sheets and are 195/* These anomalies have been "phased" out of analog.com anomaly sheets and are
181 * here to show running on older silicon just isn't feasible. 196 * here to show running on older silicon just isn't feasible.
@@ -249,20 +264,6 @@
249#define ANOMALY_05000192 (__SILICON_REVISION__ < 3) 264#define ANOMALY_05000192 (__SILICON_REVISION__ < 3)
250/* Internal Voltage Regulator may not start up */ 265/* Internal Voltage Regulator may not start up */
251#define ANOMALY_05000206 (__SILICON_REVISION__ < 3) 266#define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
252/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
253#define ANOMALY_05000357 (1)
254/* UART Break Signal Issues */
255#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
256/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
257#define ANOMALY_05000366 (1)
258/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
259#define ANOMALY_05000371 (1)
260/* PPI Does Not Start Properly In Specific Mode */
261#define ANOMALY_05000400 (__SILICON_REVISION__ == 5)
262/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
263#define ANOMALY_05000402 (__SILICON_REVISION__ == 5)
264/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
265#define ANOMALY_05000403 (1)
266 267
267/* Anomalies that don't exist on this proc */ 268/* Anomalies that don't exist on this proc */
268#define ANOMALY_05000266 (0) 269#define ANOMALY_05000266 (0)
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index d016603b6615..ebf592b59aab 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61
56#ifdef CONFIG_BFIN_UART0_CTSRTS 62#ifdef CONFIG_BFIN_UART0_CTSRTS
57# define CONFIG_SERIAL_BFIN_CTSRTS 63# define CONFIG_SERIAL_BFIN_CTSRTS
58# ifndef CONFIG_UART0_CTS_PIN 64# ifndef CONFIG_UART0_CTS_PIN
@@ -82,7 +88,7 @@ struct bfin_serial_port {
82# endif 88# endif
83#endif 89#endif
84#ifdef CONFIG_SERIAL_BFIN_CTSRTS 90#ifdef CONFIG_SERIAL_BFIN_CTSRTS
85 struct work_struct cts_workqueue; 91 struct timer_list cts_timer;
86 int cts_pin; 92 int cts_pin;
87 int rts_pin; 93 int rts_pin;
88#endif 94#endif
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/include/asm-blackfin/mach-bf537/anomaly.h
index a6b08facb242..8460ab9c324f 100644
--- a/include/asm-blackfin/mach-bf537/anomaly.h
+++ b/include/asm-blackfin/mach-bf537/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf537/anomaly.h 2 * File: include/asm-blackfin/mach-bf537/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc. 5 * Copyright (C) 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
@@ -132,8 +132,8 @@
132#define ANOMALY_05000322 (1) 132#define ANOMALY_05000322 (1)
133/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */ 133/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
134#define ANOMALY_05000341 (__SILICON_REVISION__ >= 3) 134#define ANOMALY_05000341 (__SILICON_REVISION__ >= 3)
135/* New Feature: UART Remains Enabled after UART Boot (Not Available on Older Silicon) */ 135/* New Feature: UART Remains Enabled after UART Boot */
136#define ANOMALY_05000350 (__SILICON_REVISION__ < 3) 136#define ANOMALY_05000350 (__SILICON_REVISION__ >= 3)
137/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ 137/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
138#define ANOMALY_05000355 (1) 138#define ANOMALY_05000355 (1)
139/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ 139/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
@@ -145,12 +145,10 @@
145/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ 145/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
146#define ANOMALY_05000371 (1) 146#define ANOMALY_05000371 (1)
147/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */ 147/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
148#define ANOMALY_05000402 (__SILICON_REVISION__ >= 3) 148#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
149/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ 149/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
150#define ANOMALY_05000403 (1) 150#define ANOMALY_05000403 (1)
151 151
152
153
154/* Anomalies that don't exist on this proc */ 152/* Anomalies that don't exist on this proc */
155#define ANOMALY_05000125 (0) 153#define ANOMALY_05000125 (0)
156#define ANOMALY_05000158 (0) 154#define ANOMALY_05000158 (0)
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index f79d1a0e9129..1bf56ffa22f9 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61
56#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 62#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
57# define CONFIG_SERIAL_BFIN_CTSRTS 63# define CONFIG_SERIAL_BFIN_CTSRTS
58 64
@@ -90,7 +96,7 @@ struct bfin_serial_port {
90 struct work_struct tx_dma_workqueue; 96 struct work_struct tx_dma_workqueue;
91#endif 97#endif
92#ifdef CONFIG_SERIAL_BFIN_CTSRTS 98#ifdef CONFIG_SERIAL_BFIN_CTSRTS
93 struct work_struct cts_workqueue; 99 struct timer_list cts_timer;
94 int cts_pin; 100 int cts_pin;
95 int rts_pin; 101 int rts_pin;
96#endif 102#endif
diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/include/asm-blackfin/mach-bf548/anomaly.h
index 49d3cebc5293..3ad59655881a 100644
--- a/include/asm-blackfin/mach-bf548/anomaly.h
+++ b/include/asm-blackfin/mach-bf548/anomaly.h
@@ -75,6 +75,8 @@
75#define ANOMALY_05000365 (1) 75#define ANOMALY_05000365 (1)
76/* Addressing Conflict between Boot ROM and Asynchronous Memory */ 76/* Addressing Conflict between Boot ROM and Asynchronous Memory */
77#define ANOMALY_05000369 (1) 77#define ANOMALY_05000369 (1)
78/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
79#define ANOMALY_05000371 (1)
78/* Mobile DDR Operation Not Functional */ 80/* Mobile DDR Operation Not Functional */
79#define ANOMALY_05000377 (1) 81#define ANOMALY_05000377 (1)
80/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ 82/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 5eb46a77d919..5e29446a8e03 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -57,6 +57,12 @@
57#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */ 57#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */
58#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */ 58#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */
59 59
60#define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS)
61#define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS))
62#define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS))
63#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
64#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
65
60#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 66#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
61# define CONFIG_SERIAL_BFIN_CTSRTS 67# define CONFIG_SERIAL_BFIN_CTSRTS
62 68
@@ -93,7 +99,7 @@ struct bfin_serial_port {
93 struct work_struct tx_dma_workqueue; 99 struct work_struct tx_dma_workqueue;
94#endif 100#endif
95#ifdef CONFIG_SERIAL_BFIN_CTSRTS 101#ifdef CONFIG_SERIAL_BFIN_CTSRTS
96 struct work_struct cts_workqueue; 102 struct timer_list cts_timer;
97 int cts_pin; 103 int cts_pin;
98 int rts_pin; 104 int rts_pin;
99#endif 105#endif
@@ -181,7 +187,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
181 187
182#ifdef CONFIG_BFIN_UART1_CTSRTS 188#ifdef CONFIG_BFIN_UART1_CTSRTS
183 peripheral_request(P_UART1_RTS, DRIVER_NAME); 189 peripheral_request(P_UART1_RTS, DRIVER_NAME);
184 peripheral_request(P_UART1_CTS DRIVER_NAME); 190 peripheral_request(P_UART1_CTS, DRIVER_NAME);
185#endif 191#endif
186#endif 192#endif
187 193
@@ -196,7 +202,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
196 202
197#ifdef CONFIG_BFIN_UART3_CTSRTS 203#ifdef CONFIG_BFIN_UART3_CTSRTS
198 peripheral_request(P_UART3_RTS, DRIVER_NAME); 204 peripheral_request(P_UART3_RTS, DRIVER_NAME);
199 peripheral_request(P_UART3_CTS DRIVER_NAME); 205 peripheral_request(P_UART3_CTS, DRIVER_NAME);
200#endif 206#endif
201#endif 207#endif
202 SSYNC(); 208 SSYNC();
diff --git a/include/asm-blackfin/mach-bf561/anomaly.h b/include/asm-blackfin/mach-bf561/anomaly.h
index 82157caa96a2..5c5d7d7d695f 100644
--- a/include/asm-blackfin/mach-bf561/anomaly.h
+++ b/include/asm-blackfin/mach-bf561/anomaly.h
@@ -2,7 +2,7 @@
2 * File: include/asm-blackfin/mach-bf561/anomaly.h 2 * File: include/asm-blackfin/mach-bf561/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc. 5 * Copyright (C) 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index 7a9628769296..8aa02780e642 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) 53#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) 54#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
55 55
56#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
58#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
59#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
61
56#ifdef CONFIG_BFIN_UART0_CTSRTS 62#ifdef CONFIG_BFIN_UART0_CTSRTS
57# define CONFIG_SERIAL_BFIN_CTSRTS 63# define CONFIG_SERIAL_BFIN_CTSRTS
58# ifndef CONFIG_UART0_CTS_PIN 64# ifndef CONFIG_UART0_CTS_PIN
@@ -82,7 +88,7 @@ struct bfin_serial_port {
82# endif 88# endif
83#endif 89#endif
84#ifdef CONFIG_SERIAL_BFIN_CTSRTS 90#ifdef CONFIG_SERIAL_BFIN_CTSRTS
85 struct work_struct cts_workqueue; 91 struct timer_list cts_timer;
86 int cts_pin; 92 int cts_pin;
87 int rts_pin; 93 int rts_pin;
88#endif 94#endif
diff --git a/include/asm-blackfin/mach-bf561/dma.h b/include/asm-blackfin/mach-bf561/dma.h
index 21d982003e75..8bc46cd89a02 100644
--- a/include/asm-blackfin/mach-bf561/dma.h
+++ b/include/asm-blackfin/mach-bf561/dma.h
@@ -25,11 +25,11 @@
25#define CH_MEM_STREAM1_SRC 27 /* RX */ 25#define CH_MEM_STREAM1_SRC 27 /* RX */
26#define CH_MEM_STREAM2_DEST 28 26#define CH_MEM_STREAM2_DEST 28
27#define CH_MEM_STREAM2_SRC 29 27#define CH_MEM_STREAM2_SRC 29
28#define CH_MEM_STREAM3_SRC 30 28#define CH_MEM_STREAM3_DEST 30
29#define CH_MEM_STREAM3_DEST 31 29#define CH_MEM_STREAM3_SRC 31
30#define CH_IMEM_STREAM0_DEST 32 30#define CH_IMEM_STREAM0_DEST 32
31#define CH_IMEM_STREAM0_SRC 33 31#define CH_IMEM_STREAM0_SRC 33
32#define CH_IMEM_STREAM1_SRC 34 32#define CH_IMEM_STREAM1_DEST 34
33#define CH_IMEM_STREAM1_DEST 35 33#define CH_IMEM_STREAM1_SRC 35
34 34
35#endif 35#endif
diff --git a/include/asm-blackfin/serial.h b/include/asm-blackfin/serial.h
new file mode 100644
index 000000000000..994dd869558c
--- /dev/null
+++ b/include/asm-blackfin/serial.h
@@ -0,0 +1,5 @@
1/*
2 * include/asm-blackfin/serial.h
3 */
4
5#define SERIAL_EXTRA_IRQ_FLAGS IRQF_TRIGGER_HIGH