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authorBryan Wu <bryan.wu@analog.com>2007-05-06 17:50:22 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-07 15:12:58 -0400
commit1394f03221790a988afc3e4b3cb79f2e477246a9 (patch)
tree2c1963c9a4f2d84a5e021307fde240c5d567cf70 /include/asm-blackfin/termbits.h
parent73243284463a761e04d69d22c7516b2be7de096c (diff)
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-blackfin/termbits.h')
-rw-r--r--include/asm-blackfin/termbits.h184
1 files changed, 184 insertions, 0 deletions
diff --git a/include/asm-blackfin/termbits.h b/include/asm-blackfin/termbits.h
new file mode 100644
index 000000000000..2fd9dabdba77
--- /dev/null
+++ b/include/asm-blackfin/termbits.h
@@ -0,0 +1,184 @@
1#ifndef __ARCH_BFIN_TERMBITS_H__
2#define __ARCH_BFIN_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct ktermios {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31/* c_cc characters */
32#define VINTR 0
33#define VQUIT 1
34#define VERASE 2
35#define VKILL 3
36#define VEOF 4
37#define VTIME 5
38#define VMIN 6
39#define VSWTC 7
40#define VSTART 8
41#define VSTOP 9
42#define VSUSP 10
43#define VEOL 11
44#define VREPRINT 12
45#define VDISCARD 13
46#define VWERASE 14
47#define VLNEXT 15
48#define VEOL2 16
49
50/* c_iflag bits */
51#define IGNBRK 0000001
52#define BRKINT 0000002
53#define IGNPAR 0000004
54#define PARMRK 0000010
55#define INPCK 0000020
56#define ISTRIP 0000040
57#define INLCR 0000100
58#define IGNCR 0000200
59#define ICRNL 0000400
60#define IUCLC 0001000
61#define IXON 0002000
62#define IXANY 0004000
63#define IXOFF 0010000
64#define IMAXBEL 0020000
65#define IUTF8 0040000
66
67/* c_oflag bits */
68#define OPOST 0000001
69#define OLCUC 0000002
70#define ONLCR 0000004
71#define OCRNL 0000010
72#define ONOCR 0000020
73#define ONLRET 0000040
74#define OFILL 0000100
75#define OFDEL 0000200
76#define NLDLY 0000400
77#define NL0 0000000
78#define NL1 0000400
79#define CRDLY 0003000
80#define CR0 0000000
81#define CR1 0001000
82#define CR2 0002000
83#define CR3 0003000
84#define TABDLY 0014000
85#define TAB0 0000000
86#define TAB1 0004000
87#define TAB2 0010000
88#define TAB3 0014000
89#define XTABS 0014000
90#define BSDLY 0020000
91#define BS0 0000000
92#define BS1 0020000
93#define VTDLY 0040000
94#define VT0 0000000
95#define VT1 0040000
96#define FFDLY 0100000
97#define FF0 0000000
98#define FF1 0100000
99
100/* c_cflag bit meaning */
101#define CBAUD 0010017
102#define B0 0000000 /* hang up */
103#define B50 0000001
104#define B75 0000002
105#define B110 0000003
106#define B134 0000004
107#define B150 0000005
108#define B200 0000006
109#define B300 0000007
110#define B600 0000010
111#define B1200 0000011
112#define B1800 0000012
113#define B2400 0000013
114#define B4800 0000014
115#define B9600 0000015
116#define B19200 0000016
117#define B38400 0000017
118#define EXTA B19200
119#define EXTB B38400
120#define CSIZE 0000060
121#define CS5 0000000
122#define CS6 0000020
123#define CS7 0000040
124#define CS8 0000060
125#define CSTOPB 0000100
126#define CREAD 0000200
127#define PARENB 0000400
128#define PARODD 0001000
129#define HUPCL 0002000
130#define CLOCAL 0004000
131#define CBAUDEX 0010000
132#define B57600 0010001
133#define B115200 0010002
134#define B230400 0010003
135#define B460800 0010004
136#define B500000 0010005
137#define B576000 0010006
138#define B921600 0010007
139#define B1000000 0010010
140#define B1152000 0010011
141#define B1500000 0010012
142#define B2000000 0010013
143#define B2500000 0010014
144#define B3000000 0010015
145#define B3500000 0010016
146#define B4000000 0010017
147#define CIBAUD 002003600000 /* input baud rate (not used) */
148#define CMSPAR 010000000000 /* mark or space (stick) parity */
149#define CRTSCTS 020000000000 /* flow control */
150
151/* c_lflag bits */
152#define ISIG 0000001
153#define ICANON 0000002
154#define XCASE 0000004
155#define ECHO 0000010
156#define ECHOE 0000020
157#define ECHOK 0000040
158#define ECHONL 0000100
159#define NOFLSH 0000200
160#define TOSTOP 0000400
161#define ECHOCTL 0001000
162#define ECHOPRT 0002000
163#define ECHOKE 0004000
164#define FLUSHO 0010000
165#define PENDIN 0040000
166#define IEXTEN 0100000
167
168/* tcflow() and TCXONC use these */
169#define TCOOFF 0
170#define TCOON 1
171#define TCIOFF 2
172#define TCION 3
173
174/* tcflush() and TCFLSH use these */
175#define TCIFLUSH 0
176#define TCOFLUSH 1
177#define TCIOFLUSH 2
178
179/* tcsetattr uses these */
180#define TCSANOW 0
181#define TCSADRAIN 1
182#define TCSAFLUSH 2
183
184#endif /* __ARCH_BFIN_TERMBITS_H__ */