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authorMike Frysinger <michael.frysinger@analog.com>2007-12-24 07:05:09 -0500
committerBryan Wu <bryan.wu@analog.com>2007-12-24 07:05:09 -0500
commit7cc1c4b2c44d7807f55da6a36f5b2e49977c67b7 (patch)
tree010af694c4f0e45e8a432224b0c259213039858f /include/asm-blackfin/mach-bf533/anomaly.h
parent79f1ec862ae2e693b85fd7c94654ba1779ff5863 (diff)
[Blackfin] arch: update to latest anomaly sheets
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf533/anomaly.h')
-rw-r--r--include/asm-blackfin/mach-bf533/anomaly.h12
1 files changed, 8 insertions, 4 deletions
diff --git a/include/asm-blackfin/mach-bf533/anomaly.h b/include/asm-blackfin/mach-bf533/anomaly.h
index f36ff5af1b91..98209d40abba 100644
--- a/include/asm-blackfin/mach-bf533/anomaly.h
+++ b/include/asm-blackfin/mach-bf533/anomaly.h
@@ -7,9 +7,7 @@
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - Revision X, March 23, 2007; ADSP-BF533 Blackfin Processor Anomaly List 10 * - Revision B, 12/10/2007; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
11 * - Revision AB, March 23, 2007; ADSP-BF532 Blackfin Processor Anomaly List
12 * - Revision W, March 23, 2007; ADSP-BF531 Blackfin Processor Anomaly List
13 */ 11 */
14 12
15#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
@@ -17,7 +15,7 @@
17 15
18/* We do not support 0.1 or 0.2 silicon - sorry */ 16/* We do not support 0.1 or 0.2 silicon - sorry */
19#if __SILICON_REVISION__ < 3 17#if __SILICON_REVISION__ < 3
20# error Kernel will not work on BF533 silicon version 0.0, 0.1, or 0.2 18# error will not work on BF533 silicon version 0.0, 0.1, or 0.2
21#endif 19#endif
22 20
23#if defined(__ADSPBF531__) 21#if defined(__ADSPBF531__)
@@ -251,6 +249,12 @@
251#define ANOMALY_05000192 (__SILICON_REVISION__ < 3) 249#define ANOMALY_05000192 (__SILICON_REVISION__ < 3)
252/* Internal Voltage Regulator may not start up */ 250/* Internal Voltage Regulator may not start up */
253#define ANOMALY_05000206 (__SILICON_REVISION__ < 3) 251#define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
252/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
253#define ANOMALY_05000357 (1)
254/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
255#define ANOMALY_05000366 (1)
256/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
257#define ANOMALY_05000371 (1)
254 258
255/* Anomalies that don't exist on this proc */ 259/* Anomalies that don't exist on this proc */
256#define ANOMALY_05000266 (0) 260#define ANOMALY_05000266 (0)