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authorBryan Wu <cooloney@kernel.org>2008-07-15 00:08:50 -0400
committerBryan Wu <cooloney@kernel.org>2008-07-15 00:08:50 -0400
commit1c0d20cd29aec11a3580cedf0bccec25052e8d4c (patch)
tree7a6d6a59956a79066c7d000c82f211b69f23847c /include/asm-blackfin/mach-bf527/defBF527.h
parentc71b47835188d0c2a1e1f9590564f1b71c651710 (diff)
Blackfin arch: add TXDWA definition to enable new feature
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf527/defBF527.h')
-rw-r--r--include/asm-blackfin/mach-bf527/defBF527.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf527/defBF527.h b/include/asm-blackfin/mach-bf527/defBF527.h
index 82134f578f32..f1a70db70cb8 100644
--- a/include/asm-blackfin/mach-bf527/defBF527.h
+++ b/include/asm-blackfin/mach-bf527/defBF527.h
@@ -302,6 +302,7 @@
302#define PHYIE 0x00000001 /* PHY_INT Interrupt Enable */ 302#define PHYIE 0x00000001 /* PHY_INT Interrupt Enable */
303#define RXDWA 0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */ 303#define RXDWA 0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */
304#define RXCKS 0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */ 304#define RXCKS 0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */
305#define TXDWA 0x00000010 /* Transmit Frame DMA Word Alignment (Odd/Even*) */
305#define MDCDIV 0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */ 306#define MDCDIV 0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */
306 307
307#define SET_MDCDIV(x) (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */ 308#define SET_MDCDIV(x) (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */