diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 18:01:05 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 18:01:05 -0400 |
commit | f6e6e883730aff2718610d3eba7608fcf73328ed (patch) | |
tree | ec595db5e2454ac5f505a2ce971e45d674f8d6b3 /include/asm-arm | |
parent | ba262e4a4d4c23b5e6c15dbb3a99696b562e8035 (diff) | |
parent | f964c303fe33b0d2ee563349bc8bea4d57d7a265 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3657/1: S3C24XX: Documentation update of Overview.txt
[ARM] Update mach-types
[ARM] 3656/1: S3C2412: Add S3C2412 and S3C2413 documenation
[ARM] 3654/1: add ajeco 1arm sbc support
[ARM] fix drivers/mfd/ucb1x00-core.c IRQ probing bug
[ARM] 3651/1: S3C24XX: Make arch list more detailed
[ARM] 3650/1: S3C2412: Update s3c2410_defconfig
[ARM] 3649/1: S3C24XX: Fix capitalisation of CPU on SMDK2440
[ARM] 3612/1: make pci bus optional for ixp4xx platform
[ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ
[ARM] Remove save_lr/restore_pc macros
[ARM] Remove partial non-v6 binutils compatibility
[ARM] Remove LOADREGS macro
[ARM] Remove RETINSTR macro
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/assembler.h | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index d53bafa9bf1c..fce832820825 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h | |||
@@ -55,30 +55,6 @@ | |||
55 | #define PLD(code...) | 55 | #define PLD(code...) |
56 | #endif | 56 | #endif |
57 | 57 | ||
58 | #define MODE_USR USR_MODE | ||
59 | #define MODE_FIQ FIQ_MODE | ||
60 | #define MODE_IRQ IRQ_MODE | ||
61 | #define MODE_SVC SVC_MODE | ||
62 | |||
63 | #define DEFAULT_FIQ MODE_FIQ | ||
64 | |||
65 | /* | ||
66 | * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc}) | ||
67 | */ | ||
68 | #ifdef __STDC__ | ||
69 | #define LOADREGS(cond, base, reglist...)\ | ||
70 | ldm##cond base,reglist | ||
71 | #else | ||
72 | #define LOADREGS(cond, base, reglist...)\ | ||
73 | ldm/**/cond base,reglist | ||
74 | #endif | ||
75 | |||
76 | /* | ||
77 | * Build a return instruction for this processor type. | ||
78 | */ | ||
79 | #define RETINSTR(instr, regs...)\ | ||
80 | instr regs | ||
81 | |||
82 | /* | 58 | /* |
83 | * Enable and disable interrupts | 59 | * Enable and disable interrupts |
84 | */ | 60 | */ |
@@ -117,18 +93,6 @@ | |||
117 | msr cpsr_c, \oldcpsr | 93 | msr cpsr_c, \oldcpsr |
118 | .endm | 94 | .endm |
119 | 95 | ||
120 | /* | ||
121 | * These two are used to save LR/restore PC over a user-based access. | ||
122 | * The old 26-bit architecture requires that we do. On 32-bit | ||
123 | * architecture, we can safely ignore this requirement. | ||
124 | */ | ||
125 | .macro save_lr | ||
126 | .endm | ||
127 | |||
128 | .macro restore_pc | ||
129 | mov pc, lr | ||
130 | .endm | ||
131 | |||
132 | #define USER(x...) \ | 96 | #define USER(x...) \ |
133 | 9999: x; \ | 97 | 9999: x; \ |
134 | .section __ex_table,"a"; \ | 98 | .section __ex_table,"a"; \ |