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authorCatalin Marinas <catalin.marinas@com.rmk.(none)>2005-06-20 13:51:06 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-06-20 13:51:06 -0400
commitc0da085ad2e6b1419b8a7439538f7f15eb5c4777 (patch)
tree3694dc0cc57af4e98dae449eeead8f8f421bc2a7 /include/asm-arm/arch-versatile
parent038c5b602524b33447008492e932cdd0a1e806c9 (diff)
[PATCH] ARM: 2693/1: Add PCI support for Versatile/PB
Patch from Catalin Marinas This patch adds PCI support for the Versatile PB926 platform. Signed-off-by: Colin King Signed-off-by: Catalin Marinas Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-versatile')
-rw-r--r--include/asm-arm/arch-versatile/hardware.h27
-rw-r--r--include/asm-arm/arch-versatile/io.h2
-rw-r--r--include/asm-arm/arch-versatile/platform.h17
3 files changed, 33 insertions, 13 deletions
diff --git a/include/asm-arm/arch-versatile/hardware.h b/include/asm-arm/arch-versatile/hardware.h
index d5fb4a251e7f..41c1bee342ad 100644
--- a/include/asm-arm/arch-versatile/hardware.h
+++ b/include/asm-arm/arch-versatile/hardware.h
@@ -25,19 +25,26 @@
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26#include <asm/arch/platform.h> 26#include <asm/arch/platform.h>
27 27
28// FIXME = PCI settings need to be fixed!!!!!
29
30/* 28/*
31 * Similar to above, but for PCI addresses (memory, IO, Config and the 29 * PCI space virtual addresses
32 * V3 chip itself). WARNING: this has to mirror definitions in platform.h
33 */ 30 */
34#define PCI_MEMORY_VADDR 0xe8000000 31#define VERSATILE_PCI_VIRT_BASE 0xe8000000
35#define PCI_CONFIG_VADDR 0xec000000 32#define VERSATILE_PCI_CFG_VIRT_BASE 0xe9000000
36#define PCI_V3_VADDR 0xed000000 33
37#define PCI_IO_VADDR 0xee000000 34#if 0
35#define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000
36#define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000
37#define VERSATILE_PCI_VIRT_MEM_BASE2 0xf6000000
38
39#define PCIO_BASE VERSATILE_PCI_VIRT_MEM_BASE0
40#define PCIMEM_BASE VERSATILE_PCI_VIRT_MEM_BASE1
41#endif
42
43/* CIK guesswork */
44#define PCIBIOS_MIN_IO 0x44000000
45#define PCIBIOS_MIN_MEM 0x50000000
38 46
39#define PCIO_BASE PCI_IO_VADDR 47#define pcibios_assign_all_busses() 1
40#define PCIMEM_BASE PCI_MEMORY_VADDR
41 48
42/* macro to get at IO space when running virtually */ 49/* macro to get at IO space when running virtually */
43#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 50#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h
index dbb7158788fc..9f895bf61494 100644
--- a/include/asm-arm/arch-versatile/io.h
+++ b/include/asm-arm/arch-versatile/io.h
@@ -20,7 +20,7 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#define IO_SPACE_LIMIT 0xffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25#define __io(a) ((void __iomem *)(a)) 25#define __io(a) ((void __iomem *)(a))
26#define __mem_pci(a) (a) 26#define __mem_pci(a) (a)
diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h
index a71093e44c58..cbdd9fb96332 100644
--- a/include/asm-arm/arch-versatile/platform.h
+++ b/include/asm-arm/arch-versatile/platform.h
@@ -76,7 +76,7 @@
76#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38 76#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38
77#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C 77#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C
78#define VERSATILE_SYS_RESETCTL_OFFSET 0x40 78#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
79#define VERSATILE_SYS_PICCTL_OFFSET 0x44 79#define VERSATILE_SYS_PCICTL_OFFSET 0x44
80#define VERSATILE_SYS_MCI_OFFSET 0x48 80#define VERSATILE_SYS_MCI_OFFSET 0x48
81#define VERSATILE_SYS_FLASH_OFFSET 0x4C 81#define VERSATILE_SYS_FLASH_OFFSET 0x4C
82#define VERSATILE_SYS_CLCD_OFFSET 0x50 82#define VERSATILE_SYS_CLCD_OFFSET 0x50
@@ -114,7 +114,7 @@
114#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET) 114#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET)
115#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET) 115#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET)
116#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET) 116#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET)
117#define VERSATILE_SYS_PICCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PICCTL_OFFSET) 117#define VERSATILE_SYS_PCICTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PCICTL_OFFSET)
118#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET) 118#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET)
119#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) 119#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
120#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET) 120#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET)
@@ -225,7 +225,20 @@
225#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */ 225#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */
226#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */ 226#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */
227#define VERSATILE_MBX_BASE 0x40000000 /* MBX */ 227#define VERSATILE_MBX_BASE 0x40000000 /* MBX */
228
229/* PCI space */
228#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ 230#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */
231#define VERSATILE_PCI_CFG_BASE 0x42000000
232#define VERSATILE_PCI_MEM_BASE0 0x44000000
233#define VERSATILE_PCI_MEM_BASE1 0x50000000
234#define VERSATILE_PCI_MEM_BASE2 0x60000000
235/* Sizes of above maps */
236#define VERSATILE_PCI_BASE_SIZE 0x01000000
237#define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000
238#define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
239#define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
240#define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
241
229#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ 242#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
230#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */ 243#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */
231 244