diff options
author | Jeff Garzik <jgarzik@pobox.com> | 2005-11-07 22:51:47 -0500 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-11-07 22:51:47 -0500 |
commit | 6b995751c2e851d2bc9c277b5884d0adb519e31d (patch) | |
tree | 7a15b41b5d8ce612915584a0773c670d5c0ab5b8 /include/asm-arm/arch-realview/platform.h | |
parent | 6c2f4267833f453156f8f439cc32eb4c92f357b4 (diff) | |
parent | d27ba47e7e8c466c18983a1779d611f82d6a354f (diff) |
Merge branch 'master'
Diffstat (limited to 'include/asm-arm/arch-realview/platform.h')
-rw-r--r-- | include/asm-arm/arch-realview/platform.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h index 4b6de13a6b9a..aef9b36b3c37 100644 --- a/include/asm-arm/arch-realview/platform.h +++ b/include/asm-arm/arch-realview/platform.h | |||
@@ -203,8 +203,14 @@ | |||
203 | /* Reserved 0x1001A000 - 0x1001FFFF */ | 203 | /* Reserved 0x1001A000 - 0x1001FFFF */ |
204 | #define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */ | 204 | #define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */ |
205 | #define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */ | 205 | #define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */ |
206 | #ifndef CONFIG_REALVIEW_MPCORE | ||
206 | #define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ | 207 | #define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ |
207 | #define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ | 208 | #define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ |
209 | #else | ||
210 | #define REALVIEW_MPCORE_SCU_BASE 0x10100000 /* SCU registers */ | ||
211 | #define REALVIEW_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ | ||
212 | #define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ | ||
213 | #endif | ||
208 | #define REALVIEW_SMC_BASE 0x10080000 /* SMC */ | 214 | #define REALVIEW_SMC_BASE 0x10080000 /* SMC */ |
209 | /* Reserved 0x10090000 - 0x100EFFFF */ | 215 | /* Reserved 0x10090000 - 0x100EFFFF */ |
210 | 216 | ||
@@ -265,6 +271,7 @@ | |||
265 | * Interrupts - bit assignment (primary) | 271 | * Interrupts - bit assignment (primary) |
266 | * ------------------------------------------------------------------------ | 272 | * ------------------------------------------------------------------------ |
267 | */ | 273 | */ |
274 | #ifndef CONFIG_REALVIEW_MPCORE | ||
268 | #define INT_WDOGINT 0 /* Watchdog timer */ | 275 | #define INT_WDOGINT 0 /* Watchdog timer */ |
269 | #define INT_SOFTINT 1 /* Software interrupt */ | 276 | #define INT_SOFTINT 1 /* Software interrupt */ |
270 | #define INT_COMMRx 2 /* Debug Comm Rx interrupt */ | 277 | #define INT_COMMRx 2 /* Debug Comm Rx interrupt */ |
@@ -297,6 +304,55 @@ | |||
297 | #define INT_USB 29 /* USB controller */ | 304 | #define INT_USB 29 /* USB controller */ |
298 | #define INT_TSPENINT 30 /* Touchscreen pen */ | 305 | #define INT_TSPENINT 30 /* Touchscreen pen */ |
299 | #define INT_TSKPADINT 31 /* Touchscreen keypad */ | 306 | #define INT_TSKPADINT 31 /* Touchscreen keypad */ |
307 | #else | ||
308 | #define INT_LOCALTIMER 29 | ||
309 | #define INT_LOCALWDOG 30 | ||
310 | |||
311 | #define INT_AACI 0 | ||
312 | #define INT_TIMERINT0_1 1 | ||
313 | #define INT_TIMERINT2_3 2 | ||
314 | #define INT_USB 3 | ||
315 | #define INT_UARTINT0 4 | ||
316 | #define INT_UARTINT1 5 | ||
317 | #define INT_RTCINT 6 | ||
318 | #define INT_KMI0 7 | ||
319 | #define INT_KMI1 8 | ||
320 | #define INT_ETH 9 | ||
321 | #define INT_EB_IRQ1 10 /* main GIC */ | ||
322 | #define INT_EB_IRQ2 11 /* tile GIC */ | ||
323 | #define INT_EB_FIQ1 12 /* main GIC */ | ||
324 | #define INT_EB_FIQ2 13 /* tile GIC */ | ||
325 | #define INT_MMCI0A 14 | ||
326 | #define INT_MMCI0B 15 | ||
327 | |||
328 | #define INT_PMU_CPU0 17 | ||
329 | #define INT_PMU_CPU1 18 | ||
330 | #define INT_PMU_CPU2 19 | ||
331 | #define INT_PMU_CPU3 20 | ||
332 | #define INT_PMU_SCU0 21 | ||
333 | #define INT_PMU_SCU1 22 | ||
334 | #define INT_PMU_SCU2 23 | ||
335 | #define INT_PMU_SCU3 24 | ||
336 | #define INT_PMU_SCU4 25 | ||
337 | #define INT_PMU_SCU5 26 | ||
338 | #define INT_PMU_SCU6 27 | ||
339 | #define INT_PMU_SCU7 28 | ||
340 | |||
341 | #define INT_L220_EVENT 29 | ||
342 | #define INT_L220_SLAVE 30 | ||
343 | #define INT_L220_DECODE 31 | ||
344 | |||
345 | #define INT_UARTINT2 -1 | ||
346 | #define INT_UARTINT3 -1 | ||
347 | #define INT_CLCDINT -1 | ||
348 | #define INT_DMAINT -1 | ||
349 | #define INT_WDOGINT -1 | ||
350 | #define INT_GPIOINT0 -1 | ||
351 | #define INT_GPIOINT1 -1 | ||
352 | #define INT_GPIOINT2 -1 | ||
353 | #define INT_SCIINT -1 | ||
354 | #define INT_SSPINT -1 | ||
355 | #endif | ||
300 | 356 | ||
301 | /* | 357 | /* |
302 | * Interrupt bit positions | 358 | * Interrupt bit positions |