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authorUwe Kleine-König <ukleinek@informatik.uni-freiburg.de>2007-03-28 13:06:41 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-04-21 15:51:11 -0400
commitf86bd61fd70af02e666a893aaf22653181423e99 (patch)
tree7c0d4cc8cb2ae6f398cbb731883362f75b4c8d64 /include/asm-arm/arch-ns9xxx
parent940089e007e8ed33295ef408b39a53e5ad518ebd (diff)
[ARM] 4294/1: ns9xxx: Determine system clock from PLL register settings
The function attribute const is abused here as the PLL register is read. But I think this is all right because the PLL register cannot change without a reset. Note: This patch depends on 4293/1 Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ns9xxx')
-rw-r--r--include/asm-arm/arch-ns9xxx/clock.h34
1 files changed, 32 insertions, 2 deletions
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
index a7c5ab3d9011..bf30cbdcc2bf 100644
--- a/include/asm-arm/arch-ns9xxx/clock.h
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -11,13 +11,43 @@
11#ifndef __ASM_ARCH_CLOCK_H 11#ifndef __ASM_ARCH_CLOCK_H
12#define __ASM_ARCH_CLOCK_H 12#define __ASM_ARCH_CLOCK_H
13 13
14#include <asm/arch-ns9xxx/regs-sys.h>
15
16#define CRYSTAL 29491200 /* Hz */
17
18/* The HRM calls this value f_vco */
14static inline u32 ns9xxx_systemclock(void) __attribute__((const)); 19static inline u32 ns9xxx_systemclock(void) __attribute__((const));
15static inline u32 ns9xxx_systemclock(void) 20static inline u32 ns9xxx_systemclock(void)
16{ 21{
22 u32 pll = SYS_PLL;
23
17 /* 24 /*
18 * This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c) 25 * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in
26 * time.c).
27 *
28 * The following values are given:
29 * - TIMERCLOCKSELECT == 2^i for an i in {0 .. 6}
30 * - CRYSTAL == 29491200 == 2^17 * 3^2 * 5^2
31 * - ND in {0 .. 31}
32 * - FS in {0 .. 3}
33 *
34 * Assuming the worst, we consider:
35 * - TIMERCLOCKSELECT == 64
36 * - ND == 0
37 * - FS == 3
38 *
39 * So HZ should be a divisor of:
40 * (CRYSTAL * (ND + 1) >> FS) / TIMERCLOCKSELECT
41 * == (2^17 * 3^2 * 5^2 * 1 >> 3) / 64
42 * == 2^8 * 3^2 * 5^2
43 * == 57600
44 *
45 * Currently HZ is defined to be 100 for this platform.
46 *
47 * Fine.
19 */ 48 */
20 return 353894400; 49 return CRYSTAL * (REGGET(pll, SYS_PLL, ND) + 1)
50 >> REGGET(pll, SYS_PLL, FS);
21} 51}
22 52
23static inline u32 ns9xxx_cpuclock(void) __attribute__((const)); 53static inline u32 ns9xxx_cpuclock(void) __attribute__((const));