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authorJeff Garzik <jgarzik@pobox.com>2005-10-20 10:06:09 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-20 10:06:09 -0400
commit902f90735b693550eb51a3989895f3148b8229d8 (patch)
treefaddc60f0b27ed6d2a26f20c2c09f365dc4a2d7d /include/asm-arm/arch-ixp4xx/entry-macro.S
parent07b8fede6da76ae6a0f547716c44b801a116bb4a (diff)
parent93918e9afc76717176e9e114e79cdbb602a45ae8 (diff)
Merge branch 'master'
Diffstat (limited to 'include/asm-arm/arch-ixp4xx/entry-macro.S')
-rw-r--r--include/asm-arm/arch-ixp4xx/entry-macro.S9
1 files changed, 5 insertions, 4 deletions
diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S
index 455da64832de..323b0bc4a39c 100644
--- a/include/asm-arm/arch-ixp4xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp4xx/entry-macro.S
@@ -15,25 +15,26 @@
15 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) 15 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
16 ldr \irqstat, [\irqstat] @ get interrupts 16 ldr \irqstat, [\irqstat] @ get interrupts
17 cmp \irqstat, #0 17 cmp \irqstat, #0
18 beq 1001f 18 beq 1001f @ upper IRQ?
19 clz \irqnr, \irqstat 19 clz \irqnr, \irqstat
20 mov \base, #31 20 mov \base, #31
21 subs \irqnr, \base, \irqnr 21 sub \irqnr, \base, \irqnr
22 b 1002f @ lower IRQ being
23 @ handled
22 24
231001: 251001:
24 /* 26 /*
25 * IXP465 has an upper IRQ status register 27 * IXP465 has an upper IRQ status register
26 */ 28 */
27#if defined(CONFIG_CPU_IXP46X) 29#if defined(CONFIG_CPU_IXP46X)
28 bne 1002f
29 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) 30 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
30 ldr \irqstat, [\irqstat] @ get upper interrupts 31 ldr \irqstat, [\irqstat] @ get upper interrupts
31 mov \irqnr, #63 32 mov \irqnr, #63
32 clz \irqstat, \irqstat 33 clz \irqstat, \irqstat
33 cmp \irqstat, #32 34 cmp \irqstat, #32
34 subne \irqnr, \irqnr, \irqstat 35 subne \irqnr, \irqnr, \irqstat
351002:
36#endif 36#endif
371002:
37 .endm 38 .endm
38 39
39 40