diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-07-15 18:29:07 -0400 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-15 18:29:07 -0400 |
commit | 82638844d9a8581bbf33201cc209a14876eca167 (patch) | |
tree | 961d7f9360194421a71aa644a9d0c176a960ce49 /include/asm-arm/arch-ebsa285/memory.h | |
parent | 9982fbface82893e77d211fbabfbd229da6bdde6 (diff) | |
parent | 63cf13b77ab785e87c867defa8545e6d4a989774 (diff) |
Merge branch 'linus' into cpus4096
Conflicts:
arch/x86/xen/smp.c
kernel/sched_rt.c
net/iucv/iucv.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-arm/arch-ebsa285/memory.h')
-rw-r--r-- | include/asm-arm/arch-ebsa285/memory.h | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index cbd7ae64bcc9..9019a3bf5ab9 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h | |||
@@ -42,8 +42,6 @@ extern unsigned long __bus_to_virt(unsigned long); | |||
42 | 42 | ||
43 | #endif | 43 | #endif |
44 | 44 | ||
45 | #if defined(CONFIG_ARCH_FOOTBRIDGE) | ||
46 | |||
47 | /* Task size and page offset at 3GB */ | 45 | /* Task size and page offset at 3GB */ |
48 | #define TASK_SIZE UL(0xbf000000) | 46 | #define TASK_SIZE UL(0xbf000000) |
49 | #define PAGE_OFFSET UL(0xc0000000) | 47 | #define PAGE_OFFSET UL(0xc0000000) |
@@ -53,23 +51,6 @@ extern unsigned long __bus_to_virt(unsigned long); | |||
53 | */ | 51 | */ |
54 | #define FLUSH_BASE 0xf9000000 | 52 | #define FLUSH_BASE 0xf9000000 |
55 | 53 | ||
56 | #elif defined(CONFIG_ARCH_CO285) | ||
57 | |||
58 | /* Task size and page offset at 1.5GB */ | ||
59 | #define TASK_SIZE UL(0x5f000000) | ||
60 | #define PAGE_OFFSET UL(0x60000000) | ||
61 | |||
62 | /* | ||
63 | * Cache flushing area. | ||
64 | */ | ||
65 | #define FLUSH_BASE 0x7e000000 | ||
66 | |||
67 | #else | ||
68 | |||
69 | #error "Undefined footbridge architecture" | ||
70 | |||
71 | #endif | ||
72 | |||
73 | /* | 54 | /* |
74 | * Physical DRAM offset. | 55 | * Physical DRAM offset. |
75 | */ | 56 | */ |