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authorSAN People <andrew@sanpeople.com>2006-01-09 12:05:41 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-01-09 12:05:41 -0500
commit73a59c1c4af06c675a168d698d3ebfbb3270ddbe (patch)
treefa1708e19cf89a6bd13c8f7725a9cc67cc4ae6fd /include/asm-arm/arch-at91rm9200/debug-macro.S
parent50365c57860cd931c2d806057e0987634797e9af (diff)
[ARM] 3240/2: AT91RM9200 support for 2.6 (Core)
Patch from SAN People Following changes were made to clock.c: 1) Replaced <asm/hardware/clock.h> with <linux/clk.h> 2) Removed old unused clk_enable & clk_disable. 3) Replaced clk_use/clk_unuse with clk_enable/clk_disable. Otherwise it's the same as the previous patch. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/debug-macro.S')
-rw-r--r--include/asm-arm/arch-at91rm9200/debug-macro.S38
1 files changed, 38 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91rm9200/debug-macro.S b/include/asm-arm/arch-at91rm9200/debug-macro.S
new file mode 100644
index 000000000000..f496b54c4c3e
--- /dev/null
+++ b/include/asm-arm/arch-at91rm9200/debug-macro.S
@@ -0,0 +1,38 @@
1/*
2 * include/asm-arm/arch-at91rm9200/debug-macro.S
3 *
4 * Copyright (C) 2003-2005 SAN People
5 *
6 * Debugging macro include header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <asm/hardware.h>
15
16 .macro addruart,rx
17 mrc p15, 0, \rx, c1, c0
18 tst \rx, #1 @ MMU enabled?
19 ldreq \rx, =AT91_BASE_SYS @ System peripherals (phys address)
20 ldrne \rx, =AT91_VA_BASE_SYS @ System peripherals (virt address)
21 .endm
22
23 .macro senduart,rd,rx
24 strb \rd, [\rx, #AT91_DBGU_THR] @ Write to Transmitter Holding Register
25 .endm
26
27 .macro waituart,rd,rx
281001: ldr \rd, [\rx, #AT91_DBGU_SR] @ Read Status Register
29 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
30 beq 1001b
31 .endm
32
33 .macro busyuart,rd,rx
341001: ldr \rd, [\rx, #AT91_DBGU_SR] @ Read Status Register
35 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
36 beq 1001b
37 .endm
38