[ARM] 4143/1: AT91: Prepare for AT91SAM9263 support

The Atmel AT91SAM9263 processor includes many more integrated
peripherals than Atmel's previous ARM9-based AT91 processors, so this
has necessitated a few changes to the core AT91 support.

These changes are:
      * The system peripheral I/O region we remap has increased from
        0xFFFA0000..0xFFFFFFFF to 0xFFF78000..0xFFFFFFFF.
      * The increased I/O region forces changes to entry-macro.S and
        debug-macro.S due to ARM's limited immediate offset addressing
        modes.
      * Maximum number of GPIO banks increases to 5.
      * 2 MMC controllers so the board-setup code needs to specify which
        controller it wishes to use when calling at91_add_device_mmc().

Original patch from Nicolas Ferre.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

7 files changed, 56 insertions, 46 deletions

diff --git a/include/asm-arm/arch-at91/at91sam9260_matrix.h b/include/asm-arm/arch-at91/at91sam9260_matrix.h
index 573e97a47d22..aacb1e976422 100644
--- a/include/asm-arm/arch-at91/at91sam9260_matrix.h
+++ b/include/asm-arm/arch-at91/at91sam9260_matrix.h
@@ -18,7 +18,7 @@
 #define AT91_MATRIX_MCFG2       (AT91_MATRIX + 0x08)    /* Master Configuration Register 2 */
 #define AT91_MATRIX_MCFG3       (AT91_MATRIX + 0x0C)    /* Master Configuration Register 3 */
 #define AT91_MATRIX_MCFG4       (AT91_MATRIX + 0x10)    /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x04)    /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG5       (AT91_MATRIX + 0x14)    /* Master Configuration Register 5 */
 #define         AT91_MATRIX_ULBT                (7 << 0)        /* Undefined Length Burst Type */
 #define                 AT91_MATRIX_ULBT_INFINITE       (0 << 0)
 #define                 AT91_MATRIX_ULBT_SINGLE         (1 << 0)
diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h
index bf1afd0081b6..7b9903c2c447 100644
--- a/include/asm-arm/arch-at91/board.h
+++ b/include/asm-arm/arch-at91/board.h
@@ -60,7 +60,7 @@ struct at91_mmc_data {
         u8              wp_pin;         /* (SD) writeprotect detect */
         u8              vcc_pin;        /* power switching (high == on) */
 };
-extern void __init at91_add_device_mmc(struct at91_mmc_data *data);
+extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
 
  /* Ethernet */
 struct at91_eth_data {
@@ -76,6 +76,7 @@ extern void __init at91_add_device_eth(struct at91_eth_data *data);
  /* USB Host */
 struct at91_usbh_data {
         u8              ports;          /* number of ports on root hub */
+        u8              vbus_pin[];     /* port power-control pin */
 };
 extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
 
diff --git a/include/asm-arm/arch-at91/debug-macro.S b/include/asm-arm/arch-at91/debug-macro.S
index 20721ef1ed1b..13e9f5e1d4ff 100644
--- a/include/asm-arm/arch-at91/debug-macro.S
+++ b/include/asm-arm/arch-at91/debug-macro.S
@@ -16,24 +16,24 @@
 
         .macro  addruart,rx
         mrc     p15, 0, \rx, c1, c0
-        tst     \rx, #1                         @ MMU enabled?
-        ldreq   \rx, =AT91_BASE_SYS             @ System peripherals (phys address)
-        ldrne   \rx, =AT91_VA_BASE_SYS          @ System peripherals (virt address)
+        tst     \rx, #1                                         @ MMU enabled?
+        ldreq   \rx, =(AT91_BASE_SYS + AT91_DBGU)               @ System peripherals (phys address)
+        ldrne   \rx, =(AT91_VA_BASE_SYS + AT91_DBGU)            @ System peripherals (virt address)
         .endm
 
         .macro  senduart,rd,rx
-        strb    \rd, [\rx, #AT91_DBGU_THR]      @ Write to Transmitter Holding Register
+        strb    \rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)]        @ Write to Transmitter Holding Register
         .endm
 
         .macro  waituart,rd,rx
-1001:   ldr     \rd, [\rx, #AT91_DBGU_SR]       @ Read Status Register
-        tst     \rd, #AT91_DBGU_TXRDY           @ DBGU_TXRDY = 1 when ready to transmit
+1001:   ldr     \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)]         @ Read Status Register
+        tst     \rd, #AT91_DBGU_TXRDY                           @ DBGU_TXRDY = 1 when ready to transmit
         beq     1001b
         .endm
 
         .macro  busyuart,rd,rx
-1001:   ldr     \rd, [\rx, #AT91_DBGU_SR]       @ Read Status Register
-        tst     \rd, #AT91_DBGU_TXEMPTY         @ DBGU_TXEMPTY = 1 when transmission complete
+1001:   ldr     \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)]         @ Read Status Register
+        tst     \rd, #AT91_DBGU_TXEMPTY                         @ DBGU_TXEMPTY = 1 when transmission complete
         beq     1001b
         .endm
 
diff --git a/include/asm-arm/arch-at91/entry-macro.S b/include/asm-arm/arch-at91/entry-macro.S
index a6f33832a178..76c8cccf73aa 100644
--- a/include/asm-arm/arch-at91/entry-macro.S
+++ b/include/asm-arm/arch-at91/entry-macro.S
@@ -17,10 +17,10 @@
         .endm
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr     \base, =(AT91_VA_BASE_SYS)              @ base virtual address of SYS peripherals
-        ldr     \irqnr, [\base, #AT91_AIC_IVR]          @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
-        ldr     \irqstat, [\base, #AT91_AIC_ISR]        @ read interrupt source number
-        teq     \irqstat, #0                            @ ISR is 0 when no current interrupt, or spurious interrupt
-        streq   \tmp, [\base, #AT91_AIC_EOICR]          @ not going to be handled further, then ACK it now.
+        ldr     \base, =(AT91_VA_BASE_SYS + AT91_AIC)           @ base virtual address of AIC peripheral
+        ldr     \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)]     @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
+        ldr     \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)]   @ read interrupt source number
+        teq     \irqstat, #0                                    @ ISR is 0 when no current interrupt, or spurious interrupt
+        streq   \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)]     @ not going to be handled further, then ACK it now.
         .endm
 
diff --git a/include/asm-arm/arch-at91/gpio.h b/include/asm-arm/arch-at91/gpio.h
index 6d1a5eb34704..256f9b200ab2 100644
--- a/include/asm-arm/arch-at91/gpio.h
+++ b/include/asm-arm/arch-at91/gpio.h
@@ -17,7 +17,7 @@
 
 #define PIN_BASE                NR_AIC_IRQS
 
-#define MAX_GPIO_BANKS          4
+#define MAX_GPIO_BANKS          5
 
 /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
 
@@ -26,37 +26,31 @@
 #define AT91_PIN_PA2    (PIN_BASE + 0x00 + 2)
 #define AT91_PIN_PA3    (PIN_BASE + 0x00 + 3)
 #define AT91_PIN_PA4    (PIN_BASE + 0x00 + 4)
-
 #define AT91_PIN_PA5    (PIN_BASE + 0x00 + 5)
 #define AT91_PIN_PA6    (PIN_BASE + 0x00 + 6)
 #define AT91_PIN_PA7    (PIN_BASE + 0x00 + 7)
 #define AT91_PIN_PA8    (PIN_BASE + 0x00 + 8)
 #define AT91_PIN_PA9    (PIN_BASE + 0x00 + 9)
-
 #define AT91_PIN_PA10   (PIN_BASE + 0x00 + 10)
 #define AT91_PIN_PA11   (PIN_BASE + 0x00 + 11)
 #define AT91_PIN_PA12   (PIN_BASE + 0x00 + 12)
 #define AT91_PIN_PA13   (PIN_BASE + 0x00 + 13)
 #define AT91_PIN_PA14   (PIN_BASE + 0x00 + 14)
-
 #define AT91_PIN_PA15   (PIN_BASE + 0x00 + 15)
 #define AT91_PIN_PA16   (PIN_BASE + 0x00 + 16)
 #define AT91_PIN_PA17   (PIN_BASE + 0x00 + 17)
 #define AT91_PIN_PA18   (PIN_BASE + 0x00 + 18)
 #define AT91_PIN_PA19   (PIN_BASE + 0x00 + 19)
-
 #define AT91_PIN_PA20   (PIN_BASE + 0x00 + 20)
 #define AT91_PIN_PA21   (PIN_BASE + 0x00 + 21)
 #define AT91_PIN_PA22   (PIN_BASE + 0x00 + 22)
 #define AT91_PIN_PA23   (PIN_BASE + 0x00 + 23)
 #define AT91_PIN_PA24   (PIN_BASE + 0x00 + 24)
-
 #define AT91_PIN_PA25   (PIN_BASE + 0x00 + 25)
 #define AT91_PIN_PA26   (PIN_BASE + 0x00 + 26)
 #define AT91_PIN_PA27   (PIN_BASE + 0x00 + 27)
 #define AT91_PIN_PA28   (PIN_BASE + 0x00 + 28)
 #define AT91_PIN_PA29   (PIN_BASE + 0x00 + 29)
-
 #define AT91_PIN_PA30   (PIN_BASE + 0x00 + 30)
 #define AT91_PIN_PA31   (PIN_BASE + 0x00 + 31)
 
@@ -65,37 +59,31 @@
 #define AT91_PIN_PB2    (PIN_BASE + 0x20 + 2)
 #define AT91_PIN_PB3    (PIN_BASE + 0x20 + 3)
 #define AT91_PIN_PB4    (PIN_BASE + 0x20 + 4)
-
 #define AT91_PIN_PB5    (PIN_BASE + 0x20 + 5)
 #define AT91_PIN_PB6    (PIN_BASE + 0x20 + 6)
 #define AT91_PIN_PB7    (PIN_BASE + 0x20 + 7)
 #define AT91_PIN_PB8    (PIN_BASE + 0x20 + 8)
 #define AT91_PIN_PB9    (PIN_BASE + 0x20 + 9)
-
 #define AT91_PIN_PB10   (PIN_BASE + 0x20 + 10)
 #define AT91_PIN_PB11   (PIN_BASE + 0x20 + 11)
 #define AT91_PIN_PB12   (PIN_BASE + 0x20 + 12)
 #define AT91_PIN_PB13   (PIN_BASE + 0x20 + 13)
 #define AT91_PIN_PB14   (PIN_BASE + 0x20 + 14)
-
 #define AT91_PIN_PB15   (PIN_BASE + 0x20 + 15)
 #define AT91_PIN_PB16   (PIN_BASE + 0x20 + 16)
 #define AT91_PIN_PB17   (PIN_BASE + 0x20 + 17)
 #define AT91_PIN_PB18   (PIN_BASE + 0x20 + 18)
 #define AT91_PIN_PB19   (PIN_BASE + 0x20 + 19)
-
 #define AT91_PIN_PB20   (PIN_BASE + 0x20 + 20)
 #define AT91_PIN_PB21   (PIN_BASE + 0x20 + 21)
 #define AT91_PIN_PB22   (PIN_BASE + 0x20 + 22)
 #define AT91_PIN_PB23   (PIN_BASE + 0x20 + 23)
 #define AT91_PIN_PB24   (PIN_BASE + 0x20 + 24)
-
 #define AT91_PIN_PB25   (PIN_BASE + 0x20 + 25)
 #define AT91_PIN_PB26   (PIN_BASE + 0x20 + 26)
 #define AT91_PIN_PB27   (PIN_BASE + 0x20 + 27)
 #define AT91_PIN_PB28   (PIN_BASE + 0x20 + 28)
 #define AT91_PIN_PB29   (PIN_BASE + 0x20 + 29)
-
 #define AT91_PIN_PB30   (PIN_BASE + 0x20 + 30)
 #define AT91_PIN_PB31   (PIN_BASE + 0x20 + 31)
 
@@ -104,37 +92,31 @@
 #define AT91_PIN_PC2    (PIN_BASE + 0x40 + 2)
 #define AT91_PIN_PC3    (PIN_BASE + 0x40 + 3)
 #define AT91_PIN_PC4    (PIN_BASE + 0x40 + 4)
-
 #define AT91_PIN_PC5    (PIN_BASE + 0x40 + 5)
 #define AT91_PIN_PC6    (PIN_BASE + 0x40 + 6)
 #define AT91_PIN_PC7    (PIN_BASE + 0x40 + 7)
 #define AT91_PIN_PC8    (PIN_BASE + 0x40 + 8)
 #define AT91_PIN_PC9    (PIN_BASE + 0x40 + 9)
-
 #define AT91_PIN_PC10   (PIN_BASE + 0x40 + 10)
 #define AT91_PIN_PC11   (PIN_BASE + 0x40 + 11)
 #define AT91_PIN_PC12   (PIN_BASE + 0x40 + 12)
 #define AT91_PIN_PC13   (PIN_BASE + 0x40 + 13)
 #define AT91_PIN_PC14   (PIN_BASE + 0x40 + 14)
-
 #define AT91_PIN_PC15   (PIN_BASE + 0x40 + 15)
 #define AT91_PIN_PC16   (PIN_BASE + 0x40 + 16)
 #define AT91_PIN_PC17   (PIN_BASE + 0x40 + 17)
 #define AT91_PIN_PC18   (PIN_BASE + 0x40 + 18)
 #define AT91_PIN_PC19   (PIN_BASE + 0x40 + 19)
-
 #define AT91_PIN_PC20   (PIN_BASE + 0x40 + 20)
 #define AT91_PIN_PC21   (PIN_BASE + 0x40 + 21)
 #define AT91_PIN_PC22   (PIN_BASE + 0x40 + 22)
 #define AT91_PIN_PC23   (PIN_BASE + 0x40 + 23)
 #define AT91_PIN_PC24   (PIN_BASE + 0x40 + 24)
-
 #define AT91_PIN_PC25   (PIN_BASE + 0x40 + 25)
 #define AT91_PIN_PC26   (PIN_BASE + 0x40 + 26)
 #define AT91_PIN_PC27   (PIN_BASE + 0x40 + 27)
 #define AT91_PIN_PC28   (PIN_BASE + 0x40 + 28)
 #define AT91_PIN_PC29   (PIN_BASE + 0x40 + 29)
-
 #define AT91_PIN_PC30   (PIN_BASE + 0x40 + 30)
 #define AT91_PIN_PC31   (PIN_BASE + 0x40 + 31)
 
@@ -143,40 +125,67 @@
 #define AT91_PIN_PD2    (PIN_BASE + 0x60 + 2)
 #define AT91_PIN_PD3    (PIN_BASE + 0x60 + 3)
 #define AT91_PIN_PD4    (PIN_BASE + 0x60 + 4)
-
 #define AT91_PIN_PD5    (PIN_BASE + 0x60 + 5)
 #define AT91_PIN_PD6    (PIN_BASE + 0x60 + 6)
 #define AT91_PIN_PD7    (PIN_BASE + 0x60 + 7)
 #define AT91_PIN_PD8    (PIN_BASE + 0x60 + 8)
 #define AT91_PIN_PD9    (PIN_BASE + 0x60 + 9)
-
 #define AT91_PIN_PD10   (PIN_BASE + 0x60 + 10)
 #define AT91_PIN_PD11   (PIN_BASE + 0x60 + 11)
 #define AT91_PIN_PD12   (PIN_BASE + 0x60 + 12)
 #define AT91_PIN_PD13   (PIN_BASE + 0x60 + 13)
 #define AT91_PIN_PD14   (PIN_BASE + 0x60 + 14)
-
 #define AT91_PIN_PD15   (PIN_BASE + 0x60 + 15)
 #define AT91_PIN_PD16   (PIN_BASE + 0x60 + 16)
 #define AT91_PIN_PD17   (PIN_BASE + 0x60 + 17)
 #define AT91_PIN_PD18   (PIN_BASE + 0x60 + 18)
 #define AT91_PIN_PD19   (PIN_BASE + 0x60 + 19)
-
 #define AT91_PIN_PD20   (PIN_BASE + 0x60 + 20)
 #define AT91_PIN_PD21   (PIN_BASE + 0x60 + 21)
 #define AT91_PIN_PD22   (PIN_BASE + 0x60 + 22)
 #define AT91_PIN_PD23   (PIN_BASE + 0x60 + 23)
 #define AT91_PIN_PD24   (PIN_BASE + 0x60 + 24)
-
 #define AT91_PIN_PD25   (PIN_BASE + 0x60 + 25)
 #define AT91_PIN_PD26   (PIN_BASE + 0x60 + 26)
 #define AT91_PIN_PD27   (PIN_BASE + 0x60 + 27)
 #define AT91_PIN_PD28   (PIN_BASE + 0x60 + 28)
 #define AT91_PIN_PD29   (PIN_BASE + 0x60 + 29)
-
 #define AT91_PIN_PD30   (PIN_BASE + 0x60 + 30)
 #define AT91_PIN_PD31   (PIN_BASE + 0x60 + 31)
 
+#define AT91_PIN_PE0    (PIN_BASE + 0x80 + 0)
+#define AT91_PIN_PE1    (PIN_BASE + 0x80 + 1)
+#define AT91_PIN_PE2    (PIN_BASE + 0x80 + 2)
+#define AT91_PIN_PE3    (PIN_BASE + 0x80 + 3)
+#define AT91_PIN_PE4    (PIN_BASE + 0x80 + 4)
+#define AT91_PIN_PE5    (PIN_BASE + 0x80 + 5)
+#define AT91_PIN_PE6    (PIN_BASE + 0x80 + 6)
+#define AT91_PIN_PE7    (PIN_BASE + 0x80 + 7)
+#define AT91_PIN_PE8    (PIN_BASE + 0x80 + 8)
+#define AT91_PIN_PE9    (PIN_BASE + 0x80 + 9)
+#define AT91_PIN_PE10   (PIN_BASE + 0x80 + 10)
+#define AT91_PIN_PE11   (PIN_BASE + 0x80 + 11)
+#define AT91_PIN_PE12   (PIN_BASE + 0x80 + 12)
+#define AT91_PIN_PE13   (PIN_BASE + 0x80 + 13)
+#define AT91_PIN_PE14   (PIN_BASE + 0x80 + 14)
+#define AT91_PIN_PE15   (PIN_BASE + 0x80 + 15)
+#define AT91_PIN_PE16   (PIN_BASE + 0x80 + 16)
+#define AT91_PIN_PE17   (PIN_BASE + 0x80 + 17)
+#define AT91_PIN_PE18   (PIN_BASE + 0x80 + 18)
+#define AT91_PIN_PE19   (PIN_BASE + 0x80 + 19)
+#define AT91_PIN_PE20   (PIN_BASE + 0x80 + 20)
+#define AT91_PIN_PE21   (PIN_BASE + 0x80 + 21)
+#define AT91_PIN_PE22   (PIN_BASE + 0x80 + 22)
+#define AT91_PIN_PE23   (PIN_BASE + 0x80 + 23)
+#define AT91_PIN_PE24   (PIN_BASE + 0x80 + 24)
+#define AT91_PIN_PE25   (PIN_BASE + 0x80 + 25)
+#define AT91_PIN_PE26   (PIN_BASE + 0x80 + 26)
+#define AT91_PIN_PE27   (PIN_BASE + 0x80 + 27)
+#define AT91_PIN_PE28   (PIN_BASE + 0x80 + 28)
+#define AT91_PIN_PE29   (PIN_BASE + 0x80 + 29)
+#define AT91_PIN_PE30   (PIN_BASE + 0x80 + 30)
+#define AT91_PIN_PE31   (PIN_BASE + 0x80 + 31)
+
 #ifndef __ASSEMBLY__
 /* setup setup routines, called from board init or driver probe() */
 extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h
index ccb7c7285b42..1637fc4a0d8f 100644
--- a/include/asm-arm/arch-at91/hardware.h
+++ b/include/asm-arm/arch-at91/hardware.h
@@ -28,15 +28,15 @@
 
 
 /*
- * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
- * to 0xFEFA0000 .. 0xFF000000.  (384Kb)
+ * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
+ * to 0xFEF78000 .. 0xFF000000.  (5444Kb)
  */
-#define AT91_IO_PHYS_BASE       0xFFFA0000
+#define AT91_IO_PHYS_BASE       0xFFF78000
 #define AT91_IO_SIZE            (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
 #define AT91_IO_VIRT_BASE       (0xFF000000 - AT91_IO_SIZE)
 
  /* Convert a physical IO address to virtual IO address */
-#define AT91_IO_P2V(x)  ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
+#define AT91_IO_P2V(x)          ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
 
 /*
  * Virtual to Physical Address mapping for IO devices.
diff --git a/include/asm-arm/arch-at91/irqs.h b/include/asm-arm/arch-at91/irqs.h
index f041c98c5337..1ffa3bb9a9c1 100644
--- a/include/asm-arm/arch-at91/irqs.h
+++ b/include/asm-arm/arch-at91/irqs.h
@@ -37,8 +37,8 @@
  * IRQ interrupt symbols are the AT91xxx_ID_* symbols
  * for IRQs handled directly through the AIC, or else the AT91_PIN_*
  * symbols in gpio.h for ones handled indirectly as GPIOs.
- * We make provision for 4 banks of GPIO.
+ * We make provision for 5 banks of GPIO.
  */
-#define NR_IRQS         (NR_AIC_IRQS + (4 * 32))
+#define NR_IRQS         (NR_AIC_IRQS + (5 * 32))
 
 #endif