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authorRoy ZANG <tie-fei.zang@freescale.com>2012-09-21 00:12:52 -0400
committerKumar Gala <galak@kernel.crashing.org>2013-03-05 18:10:27 -0500
commitcc6ea0dd28d450925dd43135647fcb73f171c748 (patch)
tree13beaacc71bc6fff526d287ce339fe27a939dd5d /fs/pstore
parentcdc3c44cde678a8c5b062492cd7cf09c4e2cc9ce (diff)
powerpc/85xx: Add support for FSL PCIe controller v3.0
The T4240 utilizes a new PCIe controller block that has some minor programming model differences from previous versions. The major one that impacts initialization is how we determine the link state. On the 3.x controllers we have a memory mapped SoC register instead of a PCI config register that reports the link state. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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