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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2010-01-29 08:51:26 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-02-01 09:35:08 -0500
commitb0580913797034a1001e867b8b492c75226bf77e (patch)
treef20bacd8b37a19d270528fa6a90578a8b006e2e2 /firmware/sb16
parentb2c3e923110f6ca60ccb30cf4a6bda5211454c4f (diff)
ASoC: improve MCLKDIV calculation in wm8978, when OPCLK is not used
In case, if OPCLK is not used, and PLL is used for driving the codec, the choice of PLL output frequency could result in a needlessly imprecise system clock frequency. Use an iterative process to select a precise configuration. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'firmware/sb16')
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