Merge tag 'soc-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC specific changes from Arnd Bergmann:
 "Lots of changes specific to one of the SoC families.  Some that stick
  out are:

   - mach-qcom gains new features, most importantly SMP support for the
     newer chips (Stephen Boyd, Rohit Vaswani)
   - mvebu gains support for three new SoCs: Armada 375, 380 and 385
     (Thomas Petazzoni and Free-electrons team)
   - SMP support for Rockchips (Heiko Stübner)
   - Lots of i.MX changes (Shawn Guo)
   - Added support for BCM5301x SoC (Hauke Mehrtens)
   - Multiplatform support for Marvell Kirkwood and Dove (Andrew Lunn
     and Sebastian Hesselbarth doing the final part of a long journey)
   - Unify davinci platforms and remove obsolete ones (Sekhar Nori, Arnd
     Bergmann)"

* tag 'soc-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (126 commits)
  ARM: sunxi: Select HAVE_ARM_ARCH_TIMER
  ARM: cache-tauros2: remove ARMv6 code
  ARM: mvebu: don't select CONFIG_NEON
  ARM: davinci: fix DT booting with default defconfig
  ARM: configs: bcm_defconfig: enable bcm590xx regulator support
  ARM: davinci: remove tnetv107x support
  MAINTAINERS: Update ARM STi maintainers
  ARM: restrict BCM_KONA_UART to ARCH_BCM_MOBILE
  ARM: bcm21664: Add board support.
  ARM: sunxi: Add the new watchog compatibles to the reboot code
  ARM: enable ARM_HAS_SG_CHAIN for multiplatform
  ARM: davinci: remove da8xx_omapl_defconfig
  ARM: davinci: da8xx: fix multiple watchdog device registration
  ARM: davinci: add da8xx specific configs to davinci_all_defconfig
  ARM: davinci: enable da8xx build concurrently with older devices
  ARM: BCM5301X: workaround suppress fault
  ARM: BCM5301X: add early debugging support
  ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU
  ARM: mach-bcm: Remove GENERIC_TIME
  ARM: shmobile: APMU: Fix warnings due to improper printk formats
  ...

4 files changed, 310 insertions, 0 deletions

diff --git a/drivers/bus/imx-weim.c b/drivers/bus/imx-weim.c
index 3ef58c8dbf11..f8ee13c7bf7b 100644
--- a/drivers/bus/imx-weim.c
+++ b/drivers/bus/imx-weim.c
@@ -11,6 +11,9 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/of_device.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
+#include <linux/regmap.h>
 
 struct imx_weim_devtype {
         unsigned int    cs_count;
@@ -56,6 +59,55 @@ static const struct of_device_id weim_id_table[] = {
 };
 MODULE_DEVICE_TABLE(of, weim_id_table);
 
+static int __init imx_weim_gpr_setup(struct platform_device *pdev)
+{
+        struct device_node *np = pdev->dev.of_node;
+        struct property *prop;
+        const __be32 *p;
+        struct regmap *gpr;
+        u32 gprvals[4] = {
+                05,     /* CS0(128M) CS1(0M)  CS2(0M)  CS3(0M)  */
+                033,    /* CS0(64M)  CS1(64M) CS2(0M)  CS3(0M)  */
+                0113,   /* CS0(64M)  CS1(32M) CS2(32M) CS3(0M)  */
+                01111,  /* CS0(32M)  CS1(32M) CS2(32M) CS3(32M) */
+        };
+        u32 gprval = 0;
+        u32 val;
+        int cs = 0;
+        int i = 0;
+
+        gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr");
+        if (IS_ERR(gpr)) {
+                dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n");
+                return 0;
+        }
+
+        of_property_for_each_u32(np, "ranges", prop, p, val) {
+                if (i % 4 == 0) {
+                        cs = val;
+                } else if (i % 4 == 3 && val) {
+                        val = (val / SZ_32M) | 1;
+                        gprval |= val << cs * 3;
+                }
+                i++;
+        }
+
+        if (i == 0 || i % 4)
+                goto err;
+
+        for (i = 0; i < ARRAY_SIZE(gprvals); i++) {
+                if (gprval == gprvals[i]) {
+                        /* Found it. Set up IOMUXC_GPR1[11:0] with it. */
+                        regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval);
+                        return 0;
+                }
+        }
+
+err:
+        dev_err(&pdev->dev, "Invalid 'ranges' configuration\n");
+        return -EINVAL;
+}
+
 /* Parse and set the timing for this device. */
 static int __init weim_timing_setup(struct device_node *np, void __iomem *base,
                                     const struct imx_weim_devtype *devtype)
@@ -92,6 +144,12 @@ static int __init weim_parse_dt(struct platform_device *pdev,
         struct device_node *child;
         int ret;
 
+        if (devtype == &imx50_weim_devtype) {
+                ret = imx_weim_gpr_setup(pdev);
+                if (ret)
+                        return ret;
+        }
+
         for_each_child_of_node(pdev->dev.of_node, child) {
                 if (!child->name)
                         continue;
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 61ffdca96e25..ec42d2decb2f 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -39,6 +39,14 @@ config IMGPDC_IRQ
         select GENERIC_IRQ_CHIP
         select IRQ_DOMAIN
 
+config CLPS711X_IRQCHIP
+        bool
+        depends on ARCH_CLPS711X
+        select IRQ_DOMAIN
+        select MULTI_IRQ_HANDLER
+        select SPARSE_IRQ
+        default y
+
 config ORION_IRQCHIP
         bool
         select IRQ_DOMAIN
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 1c0c151d108c..6cee9efa26e7 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_DW_APB_ICTL)		+= irq-dw-apb-ictl.o
 obj-$(CONFIG_METAG)                     += irq-metag-ext.o
 obj-$(CONFIG_METAG_PERFCOUNTER_IRQS)    += irq-metag.o
 obj-$(CONFIG_ARCH_MOXART)               += irq-moxart.o
+obj-$(CONFIG_CLPS711X_IRQCHIP)          += irq-clps711x.o
 obj-$(CONFIG_ORION_IRQCHIP)             += irq-orion.o
 obj-$(CONFIG_ARCH_SUNXI)                += irq-sun4i.o
 obj-$(CONFIG_ARCH_SUNXI)                += irq-sunxi-nmi.o
diff --git a/drivers/irqchip/irq-clps711x.c b/drivers/irqchip/irq-clps711x.c
new file mode 100644
index 000000000000..33340dc97d1d
--- /dev/null
+++ b/drivers/irqchip/irq-clps711x.c
@@ -0,0 +1,243 @@
+/*
+ *  CLPS711X IRQ driver
+ *
+ *  Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/slab.h>
+
+#include <asm/exception.h>
+#include <asm/mach/irq.h>
+
+#include "irqchip.h"
+
+#define CLPS711X_INTSR1 (0x0240)
+#define CLPS711X_INTMR1 (0x0280)
+#define CLPS711X_BLEOI  (0x0600)
+#define CLPS711X_MCEOI  (0x0640)
+#define CLPS711X_TEOI   (0x0680)
+#define CLPS711X_TC1EOI (0x06c0)
+#define CLPS711X_TC2EOI (0x0700)
+#define CLPS711X_RTCEOI (0x0740)
+#define CLPS711X_UMSEOI (0x0780)
+#define CLPS711X_COEOI  (0x07c0)
+#define CLPS711X_INTSR2 (0x1240)
+#define CLPS711X_INTMR2 (0x1280)
+#define CLPS711X_SRXEOF (0x1600)
+#define CLPS711X_KBDEOI (0x1700)
+#define CLPS711X_INTSR3 (0x2240)
+#define CLPS711X_INTMR3 (0x2280)
+
+static const struct {
+#define CLPS711X_FLAG_EN        (1 << 0)
+#define CLPS711X_FLAG_FIQ       (1 << 1)
+        unsigned int    flags;
+        phys_addr_t     eoi;
+} clps711x_irqs[] = {
+        [1]     = { CLPS711X_FLAG_FIQ, CLPS711X_BLEOI, },
+        [3]     = { CLPS711X_FLAG_FIQ, CLPS711X_MCEOI, },
+        [4]     = { CLPS711X_FLAG_EN, CLPS711X_COEOI, },
+        [5]     = { CLPS711X_FLAG_EN, },
+        [6]     = { CLPS711X_FLAG_EN, },
+        [7]     = { CLPS711X_FLAG_EN, },
+        [8]     = { CLPS711X_FLAG_EN, CLPS711X_TC1EOI, },
+        [9]     = { CLPS711X_FLAG_EN, CLPS711X_TC2EOI, },
+        [10]    = { CLPS711X_FLAG_EN, CLPS711X_RTCEOI, },
+        [11]    = { CLPS711X_FLAG_EN, CLPS711X_TEOI, },
+        [12]    = { CLPS711X_FLAG_EN, },
+        [13]    = { CLPS711X_FLAG_EN, },
+        [14]    = { CLPS711X_FLAG_EN, CLPS711X_UMSEOI, },
+        [15]    = { CLPS711X_FLAG_EN, CLPS711X_SRXEOF, },
+        [16]    = { CLPS711X_FLAG_EN, CLPS711X_KBDEOI, },
+        [17]    = { CLPS711X_FLAG_EN, },
+        [18]    = { CLPS711X_FLAG_EN, },
+        [28]    = { CLPS711X_FLAG_EN, },
+        [29]    = { CLPS711X_FLAG_EN, },
+        [32]    = { CLPS711X_FLAG_FIQ, },
+};
+
+static struct {
+        void __iomem            *base;
+        void __iomem            *intmr[3];
+        void __iomem            *intsr[3];
+        struct irq_domain       *domain;
+        struct irq_domain_ops   ops;
+} *clps711x_intc;
+
+static asmlinkage void __exception_irq_entry clps711x_irqh(struct pt_regs *regs)
+{
+        u32 irqnr, irqstat;
+
+        do {
+                irqstat = readw_relaxed(clps711x_intc->intmr[0]) &
+                          readw_relaxed(clps711x_intc->intsr[0]);
+                if (irqstat) {
+                        irqnr = irq_find_mapping(clps711x_intc->domain,
+                                                 fls(irqstat) - 1);
+                        handle_IRQ(irqnr, regs);
+                }
+
+                irqstat = readw_relaxed(clps711x_intc->intmr[1]) &
+                          readw_relaxed(clps711x_intc->intsr[1]);
+                if (irqstat) {
+                        irqnr = irq_find_mapping(clps711x_intc->domain,
+                                                 fls(irqstat) - 1 + 16);
+                        handle_IRQ(irqnr, regs);
+                }
+        } while (irqstat);
+}
+
+static void clps711x_intc_eoi(struct irq_data *d)
+{
+        irq_hw_number_t hwirq = irqd_to_hwirq(d);
+
+        writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi);
+}
+
+static void clps711x_intc_mask(struct irq_data *d)
+{
+        irq_hw_number_t hwirq = irqd_to_hwirq(d);
+        void __iomem *intmr = clps711x_intc->intmr[hwirq / 16];
+        u32 tmp;
+
+        tmp = readl_relaxed(intmr);
+        tmp &= ~(1 << (hwirq % 16));
+        writel_relaxed(tmp, intmr);
+}
+
+static void clps711x_intc_unmask(struct irq_data *d)
+{
+        irq_hw_number_t hwirq = irqd_to_hwirq(d);
+        void __iomem *intmr = clps711x_intc->intmr[hwirq / 16];
+        u32 tmp;
+
+        tmp = readl_relaxed(intmr);
+        tmp |= 1 << (hwirq % 16);
+        writel_relaxed(tmp, intmr);
+}
+
+static struct irq_chip clps711x_intc_chip = {
+        .name           = "clps711x-intc",
+        .irq_eoi        = clps711x_intc_eoi,
+        .irq_mask       = clps711x_intc_mask,
+        .irq_unmask     = clps711x_intc_unmask,
+};
+
+static int __init clps711x_intc_irq_map(struct irq_domain *h, unsigned int virq,
+                                        irq_hw_number_t hw)
+{
+        irq_flow_handler_t handler = handle_level_irq;
+        unsigned int flags = IRQF_VALID | IRQF_PROBE;
+
+        if (!clps711x_irqs[hw].flags)
+                return 0;
+
+        if (clps711x_irqs[hw].flags & CLPS711X_FLAG_FIQ) {
+                handler = handle_bad_irq;
+                flags |= IRQF_NOAUTOEN;
+        } else if (clps711x_irqs[hw].eoi) {
+                handler = handle_fasteoi_irq;
+        }
+
+        /* Clear down pending interrupt */
+        if (clps711x_irqs[hw].eoi)
+                writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi);
+
+        irq_set_chip_and_handler(virq, &clps711x_intc_chip, handler);
+        set_irq_flags(virq, flags);
+
+        return 0;
+}
+
+static int __init _clps711x_intc_init(struct device_node *np,
+                                      phys_addr_t base, resource_size_t size)
+{
+        int err;
+
+        clps711x_intc = kzalloc(sizeof(*clps711x_intc), GFP_KERNEL);
+        if (!clps711x_intc)
+                return -ENOMEM;
+
+        clps711x_intc->base = ioremap(base, size);
+        if (!clps711x_intc->base) {
+                err = -ENOMEM;
+                goto out_kfree;
+        }
+
+        clps711x_intc->intsr[0] = clps711x_intc->base + CLPS711X_INTSR1;
+        clps711x_intc->intmr[0] = clps711x_intc->base + CLPS711X_INTMR1;
+        clps711x_intc->intsr[1] = clps711x_intc->base + CLPS711X_INTSR2;
+        clps711x_intc->intmr[1] = clps711x_intc->base + CLPS711X_INTMR2;
+        clps711x_intc->intsr[2] = clps711x_intc->base + CLPS711X_INTSR3;
+        clps711x_intc->intmr[2] = clps711x_intc->base + CLPS711X_INTMR3;
+
+        /* Mask all interrupts */
+        writel_relaxed(0, clps711x_intc->intmr[0]);
+        writel_relaxed(0, clps711x_intc->intmr[1]);
+        writel_relaxed(0, clps711x_intc->intmr[2]);
+
+        err = irq_alloc_descs(-1, 0, ARRAY_SIZE(clps711x_irqs), numa_node_id());
+        if (IS_ERR_VALUE(err))
+                goto out_iounmap;
+
+        clps711x_intc->ops.map = clps711x_intc_irq_map;
+        clps711x_intc->ops.xlate = irq_domain_xlate_onecell;
+        clps711x_intc->domain =
+                irq_domain_add_legacy(np, ARRAY_SIZE(clps711x_irqs),
+                                      0, 0, &clps711x_intc->ops, NULL);
+        if (!clps711x_intc->domain) {
+                err = -ENOMEM;
+                goto out_irqfree;
+        }
+
+        irq_set_default_host(clps711x_intc->domain);
+        set_handle_irq(clps711x_irqh);
+
+#ifdef CONFIG_FIQ
+        init_FIQ(0);
+#endif
+
+        return 0;
+
+out_irqfree:
+        irq_free_descs(0, ARRAY_SIZE(clps711x_irqs));
+
+out_iounmap:
+        iounmap(clps711x_intc->base);
+
+out_kfree:
+        kfree(clps711x_intc);
+
+        return err;
+}
+
+void __init clps711x_intc_init(phys_addr_t base, resource_size_t size)
+{
+        BUG_ON(_clps711x_intc_init(NULL, base, size));
+}
+
+#ifdef CONFIG_IRQCHIP
+static int __init clps711x_intc_init_dt(struct device_node *np,
+                                        struct device_node *parent)
+{
+        struct resource res;
+        int err;
+
+        err = of_address_to_resource(np, 0, &res);
+        if (err)
+                return err;
+
+        return _clps711x_intc_init(np, res.start, resource_size(&res));
+}
+IRQCHIP_DECLARE(clps711x, "cirrus,clps711x-intc", clps711x_intc_init_dt);
+#endif