serial: amba-pl011: use port lock to guard control register access

When the pl011 is being used for a console, pl011_console_write forces
the control register (CR) to enable the UART for transmission and then
restores this to the original value afterwards. It does this while
holding the port lock.

Unfortunately, when the uart is started or shutdown - say in response to
userland using the serial device for a terminal - then this updates the
control register without any locking.

This means we can have

  pl011_console_write   Save CR
  pl011_startup         Initialise CR, e.g. enable receive
  pl011_console_write   Restore old CR with receive not enabled

this result is a serial port which doesn't respond to any input.

A similar race in reverse could happen when the device is shutdown.

We can fix these problems by taking the port lock when updating CR.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index a183aceb6d15..a576a5bc2d15 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -1535,6 +1535,8 @@ static int pl011_startup(struct uart_port *port)
         /*
          * Provoke TX FIFO interrupt into asserting.
          */
+        spin_lock_irq(&uap->port.lock);
+
         cr = UART01x_CR_UARTEN | UART011_CR_TXE | UART011_CR_LBE;
         writew(cr, uap->port.membase + UART011_CR);
         writew(0, uap->port.membase + UART011_FBRD);
@@ -1559,6 +1561,8 @@ static int pl011_startup(struct uart_port *port)
         cr |= UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE;
         writew(cr, uap->port.membase + UART011_CR);
 
+        spin_unlock_irq(&uap->port.lock);
+
         /*
          * initialise the old status of the modem signals
          */
@@ -1627,11 +1631,13 @@ static void pl011_shutdown(struct uart_port *port)
          * it during startup().
          */
         uap->autorts = false;
+        spin_lock_irq(&uap->port.lock);
         cr = readw(uap->port.membase + UART011_CR);
         uap->old_cr = cr;
         cr &= UART011_CR_RTS | UART011_CR_DTR;
         cr |= UART01x_CR_UARTEN | UART011_CR_TXE;
         writew(cr, uap->port.membase + UART011_CR);
+        spin_unlock_irq(&uap->port.lock);
 
         /*
          * disable break condition and fifos