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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 15:05:36 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 15:05:36 -0400
commitfdb2f9c2ebd4f07d7b11a3bc86d8c669eb841697 (patch)
treed85824518fc13a8c84b7399019fc11ad77aaa120 /drivers
parent81f56e5375e84689b891e0e6c5a02ec12a1f18d9 (diff)
parent78c8f84302ce007aedcfa11912fd4aacf22727ab (diff)
Merge tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas: "Host bridge hotplug - Protect acpi_pci_drivers and acpi_pci_roots (Taku Izumi) - Clear host bridge resource info to avoid issue when releasing (Yinghai Lu) - Notify acpi_pci_drivers when hot-plugging host bridges (Jiang Liu) - Use standard list ops for acpi_pci_drivers (Jiang Liu) Device hotplug - Use pci_get_domain_bus_and_slot() to close hotplug races (Jiang Liu) - Remove fakephp driver (Bjorn Helgaas) - Fix VGA ref count in hotplug remove path (Yinghai Lu) - Allow acpiphp to handle PCIe ports without native hotplug (Jiang Liu) - Implement resume regardless of pciehp_force param (Oliver Neukum) - Make pci_fixup_irqs() work after init (Thierry Reding) Miscellaneous - Add pci_pcie_type(dev) and remove pci_dev.pcie_type (Yijing Wang) - Factor out PCI Express Capability accessors (Jiang Liu) - Add pcibios_window_alignment() so powerpc EEH can use generic resource assignment (Gavin Shan) - Make pci_error_handlers const (Stephen Hemminger) - Cleanup drivers/pci/remove.c (Bjorn Helgaas) - Improve Vendor-Specific Extended Capability support (Bjorn Helgaas) - Use standard list ops for bus->devices (Bjorn Helgaas) - Avoid kmalloc in pci_get_subsys() and pci_get_class() (Feng Tang) - Reassign invalid bus number ranges (Intel DP43BF workaround) (Yinghai Lu)" * tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (102 commits) PCI: acpiphp: Handle PCIe ports without native hotplug capability PCI/ACPI: Use acpi_driver_data() rather than searching acpi_pci_roots PCI/ACPI: Protect acpi_pci_roots list with mutex PCI/ACPI: Use acpi_pci_root info rather than looking it up again PCI/ACPI: Pass acpi_pci_root to acpi_pci_drivers' add/remove interface PCI/ACPI: Protect acpi_pci_drivers list with mutex PCI/ACPI: Notify acpi_pci_drivers when hot-plugging PCI root bridges PCI/ACPI: Use normal list for struct acpi_pci_driver PCI/ACPI: Use DEVICE_ACPI_HANDLE rather than searching acpi_pci_roots PCI: Fix default vga ref_count ia64/PCI: Clear host bridge aperture struct resource x86/PCI: Clear host bridge aperture struct resource PCI: Stop all children first, before removing all children Revert "PCI: Use hotplug-safe pci_get_domain_bus_and_slot()" PCI: Provide a default pcibios_update_irq() PCI: Discard __init annotations for pci_fixup_irqs() and related functions PCI: Use correct type when freeing bus resource list PCI: Check P2P bridge for invalid secondary/subordinate range PCI: Convert "new_id"/"remove_id" into generic pci_bus driver attributes xen-pcifront: Use hotplug-safe pci_get_domain_bus_and_slot() ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/acpi/pci_root.c101
-rw-r--r--drivers/acpi/pci_slot.c44
-rw-r--r--drivers/block/nvme.c2
-rw-r--r--drivers/char/agp/sgi-agp.c5
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c10
-rw-r--r--drivers/gpu/vga/vgaarb.c29
-rw-r--r--drivers/infiniband/hw/mthca/mthca_reset.c8
-rw-r--r--drivers/infiniband/hw/qib/qib.h2
-rw-r--r--drivers/infiniband/hw/qib/qib_pcie.c40
-rw-r--r--drivers/iommu/intel-iommu.c6
-rw-r--r--drivers/media/dvb/ngene/ngene-cards.c2
-rw-r--r--drivers/net/ethernet/atheros/atl1c/atl1c_main.c4
-rw-r--r--drivers/net/ethernet/atheros/atl1e/atl1e_main.c2
-rw-r--r--drivers/net/ethernet/broadcom/bnx2.c2
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c20
-rw-r--r--drivers/net/ethernet/broadcom/tg3.c52
-rw-r--r--drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c2
-rw-r--r--drivers/net/ethernet/chelsio/cxgb3/t3_hw.c22
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c12
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/t4_hw.c6
-rw-r--r--drivers/net/ethernet/emulex/benet/be_main.c2
-rw-r--r--drivers/net/ethernet/intel/e100.c2
-rw-r--r--drivers/net/ethernet/intel/e1000/e1000_main.c2
-rw-r--r--drivers/net/ethernet/intel/e1000e/netdev.c29
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c14
-rw-r--r--drivers/net/ethernet/intel/igbvf/netdev.c2
-rw-r--r--drivers/net/ethernet/intel/ixgb/ixgb_main.c2
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_main.c4
-rw-r--r--drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/main.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/reset.c8
-rw-r--r--drivers/net/ethernet/myricom/myri10ge/myri10ge.c31
-rw-r--r--drivers/net/ethernet/neterion/s2io.c2
-rw-r--r--drivers/net/ethernet/neterion/vxge/vxge-config.c4
-rw-r--r--drivers/net/ethernet/neterion/vxge/vxge-main.c2
-rw-r--r--drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c2
-rw-r--r--drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c4
-rw-r--r--drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c2
-rw-r--r--drivers/net/ethernet/qlogic/qlge/qlge_main.c2
-rw-r--r--drivers/net/ethernet/realtek/r8169.c44
-rw-r--r--drivers/net/ethernet/sun/niu.c19
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c21
-rw-r--r--drivers/net/wireless/iwlegacy/common.h4
-rw-r--r--drivers/net/wireless/iwlwifi/pcie/trans.c7
-rw-r--r--drivers/net/wireless/rtlwifi/pci.c8
-rw-r--r--drivers/parisc/dino.c10
-rw-r--r--drivers/parisc/lba_pci.c7
-rw-r--r--drivers/pci/Kconfig1
-rw-r--r--drivers/pci/access.c202
-rw-r--r--drivers/pci/bus.c6
-rw-r--r--drivers/pci/hotplug/Kconfig24
-rw-r--r--drivers/pci/hotplug/Makefile3
-rw-r--r--drivers/pci/hotplug/acpiphp_glue.c99
-rw-r--r--drivers/pci/hotplug/cpcihp_generic.c8
-rw-r--r--drivers/pci/hotplug/cpqphp_ctrl.c21
-rw-r--r--drivers/pci/hotplug/fakephp.c164
-rw-r--r--drivers/pci/hotplug/pciehp_acpi.c6
-rw-r--r--drivers/pci/hotplug/pciehp_core.c28
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c12
-rw-r--r--drivers/pci/hotplug/pcihp_slot.c20
-rw-r--r--drivers/pci/iov.c6
-rw-r--r--drivers/pci/pci-driver.c57
-rw-r--r--drivers/pci/pci.c358
-rw-r--r--drivers/pci/pcie/aer/aer_inject.c2
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c26
-rw-r--r--drivers/pci/pcie/aer/aerdrv_acpi.c2
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c67
-rw-r--r--drivers/pci/pcie/aspm.c119
-rw-r--r--drivers/pci/pcie/pme.c29
-rw-r--r--drivers/pci/pcie/portdrv_bus.c2
-rw-r--r--drivers/pci/pcie/portdrv_core.c34
-rw-r--r--drivers/pci/pcie/portdrv_pci.c27
-rw-r--r--drivers/pci/probe.c39
-rw-r--r--drivers/pci/proc.c19
-rw-r--r--drivers/pci/quirks.c31
-rw-r--r--drivers/pci/remove.c156
-rw-r--r--drivers/pci/rom.c59
-rw-r--r--drivers/pci/search.c63
-rw-r--r--drivers/pci/setup-bus.c81
-rw-r--r--drivers/pci/setup-irq.c9
-rw-r--r--drivers/pci/xen-pcifront.c10
-rw-r--r--drivers/pcmcia/cardbus.c15
-rw-r--r--drivers/rapidio/devices/tsi721.c18
-rw-r--r--drivers/scsi/ipr.c2
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c2
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_scsih.c2
-rw-r--r--drivers/scsi/qla2xxx/qla_nx.c8
-rw-r--r--drivers/scsi/qla2xxx/qla_os.c2
-rw-r--r--drivers/scsi/qla4xxx/ql4_nx.c4
-rw-r--r--drivers/scsi/qla4xxx/ql4_os.c2
-rw-r--r--drivers/scsi/sym53c8xx_2/sym_glue.c2
-rw-r--r--drivers/staging/et131x/et131x.c19
-rw-r--r--drivers/staging/rtl8192e/rtl8192e/rtl_pci.c8
-rw-r--r--drivers/tty/serial/8250/8250_pci.c2
-rw-r--r--drivers/tty/serial/jsm/jsm_driver.c2
-rw-r--r--drivers/xen/xen-pciback/pci_stub.c2
96 files changed, 929 insertions, 1560 deletions
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 72a2c98bc429..bce469c0b48a 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -27,7 +27,7 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/types.h> 29#include <linux/types.h>
30#include <linux/spinlock.h> 30#include <linux/mutex.h>
31#include <linux/pm.h> 31#include <linux/pm.h>
32#include <linux/pm_runtime.h> 32#include <linux/pm_runtime.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
@@ -71,9 +71,11 @@ static struct acpi_driver acpi_pci_root_driver = {
71 }, 71 },
72}; 72};
73 73
74/* Lock to protect both acpi_pci_roots and acpi_pci_drivers lists */
75static DEFINE_MUTEX(acpi_pci_root_lock);
74static LIST_HEAD(acpi_pci_roots); 76static LIST_HEAD(acpi_pci_roots);
77static LIST_HEAD(acpi_pci_drivers);
75 78
76static struct acpi_pci_driver *sub_driver;
77static DEFINE_MUTEX(osc_lock); 79static DEFINE_MUTEX(osc_lock);
78 80
79int acpi_pci_register_driver(struct acpi_pci_driver *driver) 81int acpi_pci_register_driver(struct acpi_pci_driver *driver)
@@ -81,55 +83,46 @@ int acpi_pci_register_driver(struct acpi_pci_driver *driver)
81 int n = 0; 83 int n = 0;
82 struct acpi_pci_root *root; 84 struct acpi_pci_root *root;
83 85
84 struct acpi_pci_driver **pptr = &sub_driver; 86 mutex_lock(&acpi_pci_root_lock);
85 while (*pptr) 87 list_add_tail(&driver->node, &acpi_pci_drivers);
86 pptr = &(*pptr)->next; 88 if (driver->add)
87 *pptr = driver; 89 list_for_each_entry(root, &acpi_pci_roots, node) {
88 90 driver->add(root);
89 if (!driver->add) 91 n++;
90 return 0; 92 }
91 93 mutex_unlock(&acpi_pci_root_lock);
92 list_for_each_entry(root, &acpi_pci_roots, node) {
93 driver->add(root->device->handle);
94 n++;
95 }
96 94
97 return n; 95 return n;
98} 96}
99
100EXPORT_SYMBOL(acpi_pci_register_driver); 97EXPORT_SYMBOL(acpi_pci_register_driver);
101 98
102void acpi_pci_unregister_driver(struct acpi_pci_driver *driver) 99void acpi_pci_unregister_driver(struct acpi_pci_driver *driver)
103{ 100{
104 struct acpi_pci_root *root; 101 struct acpi_pci_root *root;
105 102
106 struct acpi_pci_driver **pptr = &sub_driver; 103 mutex_lock(&acpi_pci_root_lock);
107 while (*pptr) { 104 list_del(&driver->node);
108 if (*pptr == driver) 105 if (driver->remove)
109 break; 106 list_for_each_entry(root, &acpi_pci_roots, node)
110 pptr = &(*pptr)->next; 107 driver->remove(root);
111 } 108 mutex_unlock(&acpi_pci_root_lock);
112 BUG_ON(!*pptr);
113 *pptr = (*pptr)->next;
114
115 if (!driver->remove)
116 return;
117
118 list_for_each_entry(root, &acpi_pci_roots, node)
119 driver->remove(root->device->handle);
120} 109}
121
122EXPORT_SYMBOL(acpi_pci_unregister_driver); 110EXPORT_SYMBOL(acpi_pci_unregister_driver);
123 111
124acpi_handle acpi_get_pci_rootbridge_handle(unsigned int seg, unsigned int bus) 112acpi_handle acpi_get_pci_rootbridge_handle(unsigned int seg, unsigned int bus)
125{ 113{
126 struct acpi_pci_root *root; 114 struct acpi_pci_root *root;
115 acpi_handle handle = NULL;
127 116
117 mutex_lock(&acpi_pci_root_lock);
128 list_for_each_entry(root, &acpi_pci_roots, node) 118 list_for_each_entry(root, &acpi_pci_roots, node)
129 if ((root->segment == (u16) seg) && 119 if ((root->segment == (u16) seg) &&
130 (root->secondary.start == (u16) bus)) 120 (root->secondary.start == (u16) bus)) {
131 return root->device->handle; 121 handle = root->device->handle;
132 return NULL; 122 break;
123 }
124 mutex_unlock(&acpi_pci_root_lock);
125 return handle;
133} 126}
134 127
135EXPORT_SYMBOL_GPL(acpi_get_pci_rootbridge_handle); 128EXPORT_SYMBOL_GPL(acpi_get_pci_rootbridge_handle);
@@ -277,12 +270,15 @@ static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
277struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle) 270struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
278{ 271{
279 struct acpi_pci_root *root; 272 struct acpi_pci_root *root;
273 struct acpi_device *device;
280 274
281 list_for_each_entry(root, &acpi_pci_roots, node) { 275 if (acpi_bus_get_device(handle, &device) ||
282 if (root->device->handle == handle) 276 acpi_match_device_ids(device, root_device_ids))
283 return root; 277 return NULL;
284 } 278
285 return NULL; 279 root = acpi_driver_data(device);
280
281 return root;
286} 282}
287EXPORT_SYMBOL_GPL(acpi_pci_find_root); 283EXPORT_SYMBOL_GPL(acpi_pci_find_root);
288 284
@@ -518,8 +514,9 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
518 * TBD: Need PCI interface for enumeration/configuration of roots. 514 * TBD: Need PCI interface for enumeration/configuration of roots.
519 */ 515 */
520 516
521 /* TBD: Locking */ 517 mutex_lock(&acpi_pci_root_lock);
522 list_add_tail(&root->node, &acpi_pci_roots); 518 list_add_tail(&root->node, &acpi_pci_roots);
519 mutex_unlock(&acpi_pci_root_lock);
523 520
524 printk(KERN_INFO PREFIX "%s [%s] (domain %04x %pR)\n", 521 printk(KERN_INFO PREFIX "%s [%s] (domain %04x %pR)\n",
525 acpi_device_name(device), acpi_device_bid(device), 522 acpi_device_name(device), acpi_device_bid(device),
@@ -538,7 +535,7 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
538 "Bus %04x:%02x not present in PCI namespace\n", 535 "Bus %04x:%02x not present in PCI namespace\n",
539 root->segment, (unsigned int)root->secondary.start); 536 root->segment, (unsigned int)root->secondary.start);
540 result = -ENODEV; 537 result = -ENODEV;
541 goto end; 538 goto out_del_root;
542 } 539 }
543 540
544 /* 541 /*
@@ -548,7 +545,7 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
548 */ 545 */
549 result = acpi_pci_bind_root(device); 546 result = acpi_pci_bind_root(device);
550 if (result) 547 if (result)
551 goto end; 548 goto out_del_root;
552 549
553 /* 550 /*
554 * PCI Routing Table 551 * PCI Routing Table
@@ -633,9 +630,11 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
633 630
634 return 0; 631 return 0;
635 632
633out_del_root:
634 mutex_lock(&acpi_pci_root_lock);
635 list_del(&root->node);
636 mutex_unlock(&acpi_pci_root_lock);
636end: 637end:
637 if (!list_empty(&root->node))
638 list_del(&root->node);
639 kfree(root); 638 kfree(root);
640 return result; 639 return result;
641} 640}
@@ -643,18 +642,34 @@ end:
643static int acpi_pci_root_start(struct acpi_device *device) 642static int acpi_pci_root_start(struct acpi_device *device)
644{ 643{
645 struct acpi_pci_root *root = acpi_driver_data(device); 644 struct acpi_pci_root *root = acpi_driver_data(device);
645 struct acpi_pci_driver *driver;
646
647 mutex_lock(&acpi_pci_root_lock);
648 list_for_each_entry(driver, &acpi_pci_drivers, node)
649 if (driver->add)
650 driver->add(root);
651 mutex_unlock(&acpi_pci_root_lock);
646 652
647 pci_bus_add_devices(root->bus); 653 pci_bus_add_devices(root->bus);
654
648 return 0; 655 return 0;
649} 656}
650 657
651static int acpi_pci_root_remove(struct acpi_device *device, int type) 658static int acpi_pci_root_remove(struct acpi_device *device, int type)
652{ 659{
653 struct acpi_pci_root *root = acpi_driver_data(device); 660 struct acpi_pci_root *root = acpi_driver_data(device);
661 struct acpi_pci_driver *driver;
662
663 mutex_lock(&acpi_pci_root_lock);
664 list_for_each_entry(driver, &acpi_pci_drivers, node)
665 if (driver->remove)
666 driver->remove(root);
654 667
655 device_set_run_wake(root->bus->bridge, false); 668 device_set_run_wake(root->bus->bridge, false);
656 pci_acpi_remove_bus_pm_notifier(device); 669 pci_acpi_remove_bus_pm_notifier(device);
657 670
671 list_del(&root->node);
672 mutex_unlock(&acpi_pci_root_lock);
658 kfree(root); 673 kfree(root);
659 return 0; 674 return 0;
660} 675}
diff --git a/drivers/acpi/pci_slot.c b/drivers/acpi/pci_slot.c
index e50e31a518af..d22585f21aeb 100644
--- a/drivers/acpi/pci_slot.c
+++ b/drivers/acpi/pci_slot.c
@@ -67,8 +67,8 @@ struct acpi_pci_slot {
67 struct list_head list; /* node in the list of slots */ 67 struct list_head list; /* node in the list of slots */
68}; 68};
69 69
70static int acpi_pci_slot_add(acpi_handle handle); 70static int acpi_pci_slot_add(struct acpi_pci_root *root);
71static void acpi_pci_slot_remove(acpi_handle handle); 71static void acpi_pci_slot_remove(struct acpi_pci_root *root);
72 72
73static LIST_HEAD(slot_list); 73static LIST_HEAD(slot_list);
74static DEFINE_MUTEX(slot_list_lock); 74static DEFINE_MUTEX(slot_list_lock);
@@ -233,45 +233,20 @@ out:
233 233
234/* 234/*
235 * walk_root_bridge - generic root bridge walker 235 * walk_root_bridge - generic root bridge walker
236 * @handle: points to an acpi_pci_root 236 * @root: poiner of an acpi_pci_root
237 * @user_function: user callback for slot objects 237 * @user_function: user callback for slot objects
238 * 238 *
239 * Call user_function for all objects underneath this root bridge. 239 * Call user_function for all objects underneath this root bridge.
240 * Walk p2p bridges underneath us and call user_function on those too. 240 * Walk p2p bridges underneath us and call user_function on those too.
241 */ 241 */
242static int 242static int
243walk_root_bridge(acpi_handle handle, acpi_walk_callback user_function) 243walk_root_bridge(struct acpi_pci_root *root, acpi_walk_callback user_function)
244{ 244{
245 int seg, bus;
246 unsigned long long tmp;
247 acpi_status status; 245 acpi_status status;
248 acpi_handle dummy_handle; 246 acpi_handle handle = root->device->handle;
249 struct pci_bus *pci_bus; 247 struct pci_bus *pci_bus = root->bus;
250 struct callback_args context; 248 struct callback_args context;
251 249
252 /* If the bridge doesn't have _STA, we assume it is always there */
253 status = acpi_get_handle(handle, "_STA", &dummy_handle);
254 if (ACPI_SUCCESS(status)) {
255 status = acpi_evaluate_integer(handle, "_STA", NULL, &tmp);
256 if (ACPI_FAILURE(status)) {
257 info("%s: _STA evaluation failure\n", __func__);
258 return 0;
259 }
260 if ((tmp & ACPI_STA_DEVICE_FUNCTIONING) == 0)
261 /* don't register this object */
262 return 0;
263 }
264
265 status = acpi_evaluate_integer(handle, "_SEG", NULL, &tmp);
266 seg = ACPI_SUCCESS(status) ? tmp : 0;
267
268 status = acpi_evaluate_integer(handle, "_BBN", NULL, &tmp);
269 bus = ACPI_SUCCESS(status) ? tmp : 0;
270
271 pci_bus = pci_find_bus(seg, bus);
272 if (!pci_bus)
273 return 0;
274
275 context.pci_bus = pci_bus; 250 context.pci_bus = pci_bus;
276 context.user_function = user_function; 251 context.user_function = user_function;
277 context.root_handle = handle; 252 context.root_handle = handle;
@@ -295,11 +270,11 @@ walk_root_bridge(acpi_handle handle, acpi_walk_callback user_function)
295 * @handle: points to an acpi_pci_root 270 * @handle: points to an acpi_pci_root
296 */ 271 */
297static int 272static int
298acpi_pci_slot_add(acpi_handle handle) 273acpi_pci_slot_add(struct acpi_pci_root *root)
299{ 274{
300 acpi_status status; 275 acpi_status status;
301 276
302 status = walk_root_bridge(handle, register_slot); 277 status = walk_root_bridge(root, register_slot);
303 if (ACPI_FAILURE(status)) 278 if (ACPI_FAILURE(status))
304 err("%s: register_slot failure - %d\n", __func__, status); 279 err("%s: register_slot failure - %d\n", __func__, status);
305 280
@@ -311,10 +286,11 @@ acpi_pci_slot_add(acpi_handle handle)
311 * @handle: points to an acpi_pci_root 286 * @handle: points to an acpi_pci_root
312 */ 287 */
313static void 288static void
314acpi_pci_slot_remove(acpi_handle handle) 289acpi_pci_slot_remove(struct acpi_pci_root *root)
315{ 290{
316 struct acpi_pci_slot *slot, *tmp; 291 struct acpi_pci_slot *slot, *tmp;
317 struct pci_bus *pbus; 292 struct pci_bus *pbus;
293 acpi_handle handle = root->device->handle;
318 294
319 mutex_lock(&slot_list_lock); 295 mutex_lock(&slot_list_lock);
320 list_for_each_entry_safe(slot, tmp, &slot_list, list) { 296 list_for_each_entry_safe(slot, tmp, &slot_list, list) {
diff --git a/drivers/block/nvme.c b/drivers/block/nvme.c
index ad16c68c8645..931769e133e5 100644
--- a/drivers/block/nvme.c
+++ b/drivers/block/nvme.c
@@ -1726,7 +1726,7 @@ static void __devexit nvme_remove(struct pci_dev *pdev)
1726#define nvme_suspend NULL 1726#define nvme_suspend NULL
1727#define nvme_resume NULL 1727#define nvme_resume NULL
1728 1728
1729static struct pci_error_handlers nvme_err_handler = { 1729static const struct pci_error_handlers nvme_err_handler = {
1730 .error_detected = nvme_error_detected, 1730 .error_detected = nvme_error_detected,
1731 .mmio_enabled = nvme_dump_registers, 1731 .mmio_enabled = nvme_dump_registers,
1732 .link_reset = nvme_link_reset, 1732 .link_reset = nvme_link_reset,
diff --git a/drivers/char/agp/sgi-agp.c b/drivers/char/agp/sgi-agp.c
index 192000377737..3a5af2f9b015 100644
--- a/drivers/char/agp/sgi-agp.c
+++ b/drivers/char/agp/sgi-agp.c
@@ -289,12 +289,11 @@ static int __devinit agp_sgi_init(void)
289 289
290 j = 0; 290 j = 0;
291 list_for_each_entry(info, &tioca_list, ca_list) { 291 list_for_each_entry(info, &tioca_list, ca_list) {
292 struct list_head *tmp;
293 if (list_empty(info->ca_devices)) 292 if (list_empty(info->ca_devices))
294 continue; 293 continue;
295 list_for_each(tmp, info->ca_devices) { 294 list_for_each_entry(pdev, info->ca_devices, bus_list) {
296 u8 cap_ptr; 295 u8 cap_ptr;
297 pdev = pci_dev_b(tmp); 296
298 if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8)) 297 if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8))
299 continue; 298 continue;
300 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); 299 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index e93b80a6d4e9..ed3340adeb6f 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -77,13 +77,9 @@ void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw,
77void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) 77void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
78{ 78{
79 u16 ctl, v; 79 u16 ctl, v;
80 int cap, err; 80 int err;
81 81
82 cap = pci_pcie_cap(rdev->pdev); 82 err = pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL, &ctl);
83 if (!cap)
84 return;
85
86 err = pci_read_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, &ctl);
87 if (err) 83 if (err)
88 return; 84 return;
89 85
@@ -95,7 +91,7 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
95 if ((v == 0) || (v == 6) || (v == 7)) { 91 if ((v == 0) || (v == 6) || (v == 7)) {
96 ctl &= ~PCI_EXP_DEVCTL_READRQ; 92 ctl &= ~PCI_EXP_DEVCTL_READRQ;
97 ctl |= (2 << 12); 93 ctl |= (2 << 12);
98 pci_write_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, ctl); 94 pcie_capability_write_word(rdev->pdev, PCI_EXP_DEVCTL, ctl);
99 } 95 }
100} 96}
101 97
diff --git a/drivers/gpu/vga/vgaarb.c b/drivers/gpu/vga/vgaarb.c
index 3df8fc0ec01a..e893f6e1937d 100644
--- a/drivers/gpu/vga/vgaarb.c
+++ b/drivers/gpu/vga/vgaarb.c
@@ -141,7 +141,11 @@ EXPORT_SYMBOL_GPL(vga_default_device);
141 141
142void vga_set_default_device(struct pci_dev *pdev) 142void vga_set_default_device(struct pci_dev *pdev)
143{ 143{
144 vga_default = pdev; 144 if (vga_default == pdev)
145 return;
146
147 pci_dev_put(vga_default);
148 vga_default = pci_dev_get(pdev);
145} 149}
146#endif 150#endif
147 151
@@ -577,7 +581,7 @@ static bool vga_arbiter_add_pci_device(struct pci_dev *pdev)
577#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE 581#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE
578 if (vga_default == NULL && 582 if (vga_default == NULL &&
579 ((vgadev->owns & VGA_RSRC_LEGACY_MASK) == VGA_RSRC_LEGACY_MASK)) 583 ((vgadev->owns & VGA_RSRC_LEGACY_MASK) == VGA_RSRC_LEGACY_MASK))
580 vga_default = pci_dev_get(pdev); 584 vga_set_default_device(pdev);
581#endif 585#endif
582 586
583 vga_arbiter_check_bridge_sharing(vgadev); 587 vga_arbiter_check_bridge_sharing(vgadev);
@@ -613,10 +617,8 @@ static bool vga_arbiter_del_pci_device(struct pci_dev *pdev)
613 } 617 }
614 618
615#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE 619#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE
616 if (vga_default == pdev) { 620 if (vga_default == pdev)
617 pci_dev_put(vga_default); 621 vga_set_default_device(NULL);
618 vga_default = NULL;
619 }
620#endif 622#endif
621 623
622 if (vgadev->decodes & (VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM)) 624 if (vgadev->decodes & (VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM))
@@ -1066,7 +1068,6 @@ static ssize_t vga_arb_write(struct file *file, const char __user * buf,
1066 } 1068 }
1067 1069
1068 } else if (strncmp(curr_pos, "target ", 7) == 0) { 1070 } else if (strncmp(curr_pos, "target ", 7) == 0) {
1069 struct pci_bus *pbus;
1070 unsigned int domain, bus, devfn; 1071 unsigned int domain, bus, devfn;
1071 struct vga_device *vgadev; 1072 struct vga_device *vgadev;
1072 1073
@@ -1085,19 +1086,11 @@ static ssize_t vga_arb_write(struct file *file, const char __user * buf,
1085 pr_debug("vgaarb: %s ==> %x:%x:%x.%x\n", curr_pos, 1086 pr_debug("vgaarb: %s ==> %x:%x:%x.%x\n", curr_pos,
1086 domain, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); 1087 domain, bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
1087 1088
1088 pbus = pci_find_bus(domain, bus); 1089 pdev = pci_get_domain_bus_and_slot(domain, bus, devfn);
1089 pr_debug("vgaarb: pbus %p\n", pbus);
1090 if (pbus == NULL) {
1091 pr_err("vgaarb: invalid PCI domain and/or bus address %x:%x\n",
1092 domain, bus);
1093 ret_val = -ENODEV;
1094 goto done;
1095 }
1096 pdev = pci_get_slot(pbus, devfn);
1097 pr_debug("vgaarb: pdev %p\n", pdev); 1090 pr_debug("vgaarb: pdev %p\n", pdev);
1098 if (!pdev) { 1091 if (!pdev) {
1099 pr_err("vgaarb: invalid PCI address %x:%x\n", 1092 pr_err("vgaarb: invalid PCI address %x:%x:%x\n",
1100 bus, devfn); 1093 domain, bus, devfn);
1101 ret_val = -ENODEV; 1094 ret_val = -ENODEV;
1102 goto done; 1095 goto done;
1103 } 1096 }
diff --git a/drivers/infiniband/hw/mthca/mthca_reset.c b/drivers/infiniband/hw/mthca/mthca_reset.c
index 4fa3534ec233..74c6a9426047 100644
--- a/drivers/infiniband/hw/mthca/mthca_reset.c
+++ b/drivers/infiniband/hw/mthca/mthca_reset.c
@@ -241,16 +241,16 @@ good:
241 241
242 if (hca_pcie_cap) { 242 if (hca_pcie_cap) {
243 devctl = hca_header[(hca_pcie_cap + PCI_EXP_DEVCTL) / 4]; 243 devctl = hca_header[(hca_pcie_cap + PCI_EXP_DEVCTL) / 4];
244 if (pci_write_config_word(mdev->pdev, hca_pcie_cap + PCI_EXP_DEVCTL, 244 if (pcie_capability_write_word(mdev->pdev, PCI_EXP_DEVCTL,
245 devctl)) { 245 devctl)) {
246 err = -ENODEV; 246 err = -ENODEV;
247 mthca_err(mdev, "Couldn't restore HCA PCI Express " 247 mthca_err(mdev, "Couldn't restore HCA PCI Express "
248 "Device Control register, aborting.\n"); 248 "Device Control register, aborting.\n");
249 goto out; 249 goto out;
250 } 250 }
251 linkctl = hca_header[(hca_pcie_cap + PCI_EXP_LNKCTL) / 4]; 251 linkctl = hca_header[(hca_pcie_cap + PCI_EXP_LNKCTL) / 4];
252 if (pci_write_config_word(mdev->pdev, hca_pcie_cap + PCI_EXP_LNKCTL, 252 if (pcie_capability_write_word(mdev->pdev, PCI_EXP_LNKCTL,
253 linkctl)) { 253 linkctl)) {
254 err = -ENODEV; 254 err = -ENODEV;
255 mthca_err(mdev, "Couldn't restore HCA PCI Express " 255 mthca_err(mdev, "Couldn't restore HCA PCI Express "
256 "Link control register, aborting.\n"); 256 "Link control register, aborting.\n");
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h
index 7b1b86690024..4d11575c2010 100644
--- a/drivers/infiniband/hw/qib/qib.h
+++ b/drivers/infiniband/hw/qib/qib.h
@@ -87,7 +87,7 @@ struct qlogic_ib_stats {
87}; 87};
88 88
89extern struct qlogic_ib_stats qib_stats; 89extern struct qlogic_ib_stats qib_stats;
90extern struct pci_error_handlers qib_pci_err_handler; 90extern const struct pci_error_handlers qib_pci_err_handler;
91extern struct pci_driver qib_driver; 91extern struct pci_driver qib_driver;
92 92
93#define QIB_CHIP_SWVERSION QIB_CHIP_VERS_MAJ 93#define QIB_CHIP_SWVERSION QIB_CHIP_VERS_MAJ
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c
index 062c301ebf53..c574ec7c85e6 100644
--- a/drivers/infiniband/hw/qib/qib_pcie.c
+++ b/drivers/infiniband/hw/qib/qib_pcie.c
@@ -273,10 +273,9 @@ int qib_pcie_params(struct qib_devdata *dd, u32 minw, u32 *nent,
273 struct qib_msix_entry *entry) 273 struct qib_msix_entry *entry)
274{ 274{
275 u16 linkstat, speed; 275 u16 linkstat, speed;
276 int pos = 0, pose, ret = 1; 276 int pos = 0, ret = 1;
277 277
278 pose = pci_pcie_cap(dd->pcidev); 278 if (!pci_is_pcie(dd->pcidev)) {
279 if (!pose) {
280 qib_dev_err(dd, "Can't find PCI Express capability!\n"); 279 qib_dev_err(dd, "Can't find PCI Express capability!\n");
281 /* set up something... */ 280 /* set up something... */
282 dd->lbus_width = 1; 281 dd->lbus_width = 1;
@@ -298,7 +297,7 @@ int qib_pcie_params(struct qib_devdata *dd, u32 minw, u32 *nent,
298 if (!pos) 297 if (!pos)
299 qib_enable_intx(dd->pcidev); 298 qib_enable_intx(dd->pcidev);
300 299
301 pci_read_config_word(dd->pcidev, pose + PCI_EXP_LNKSTA, &linkstat); 300 pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKSTA, &linkstat);
302 /* 301 /*
303 * speed is bits 0-3, linkwidth is bits 4-8 302 * speed is bits 0-3, linkwidth is bits 4-8
304 * no defines for them in headers 303 * no defines for them in headers
@@ -516,7 +515,6 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd)
516{ 515{
517 int r; 516 int r;
518 struct pci_dev *parent; 517 struct pci_dev *parent;
519 int ppos;
520 u16 devid; 518 u16 devid;
521 u32 mask, bits, val; 519 u32 mask, bits, val;
522 520
@@ -529,8 +527,7 @@ static int qib_tune_pcie_coalesce(struct qib_devdata *dd)
529 qib_devinfo(dd->pcidev, "Parent not root\n"); 527 qib_devinfo(dd->pcidev, "Parent not root\n");
530 return 1; 528 return 1;
531 } 529 }
532 ppos = pci_pcie_cap(parent); 530 if (!pci_is_pcie(parent))
533 if (!ppos)
534 return 1; 531 return 1;
535 if (parent->vendor != 0x8086) 532 if (parent->vendor != 0x8086)
536 return 1; 533 return 1;
@@ -587,7 +584,6 @@ static int qib_tune_pcie_caps(struct qib_devdata *dd)
587{ 584{
588 int ret = 1; /* Assume the worst */ 585 int ret = 1; /* Assume the worst */
589 struct pci_dev *parent; 586 struct pci_dev *parent;
590 int ppos, epos;
591 u16 pcaps, pctl, ecaps, ectl; 587 u16 pcaps, pctl, ecaps, ectl;
592 int rc_sup, ep_sup; 588 int rc_sup, ep_sup;
593 int rc_cur, ep_cur; 589 int rc_cur, ep_cur;
@@ -598,19 +594,15 @@ static int qib_tune_pcie_caps(struct qib_devdata *dd)
598 qib_devinfo(dd->pcidev, "Parent not root\n"); 594 qib_devinfo(dd->pcidev, "Parent not root\n");
599 goto bail; 595 goto bail;
600 } 596 }
601 ppos = pci_pcie_cap(parent); 597
602 if (ppos) { 598 if (!pci_is_pcie(parent) || !pci_is_pcie(dd->pcidev))
603 pci_read_config_word(parent, ppos + PCI_EXP_DEVCAP, &pcaps);
604 pci_read_config_word(parent, ppos + PCI_EXP_DEVCTL, &pctl);
605 } else
606 goto bail; 599 goto bail;
600 pcie_capability_read_word(parent, PCI_EXP_DEVCAP, &pcaps);
601 pcie_capability_read_word(parent, PCI_EXP_DEVCTL, &pctl);
607 /* Find out supported and configured values for endpoint (us) */ 602 /* Find out supported and configured values for endpoint (us) */
608 epos = pci_pcie_cap(dd->pcidev); 603 pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCAP, &ecaps);
609 if (epos) { 604 pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL, &ectl);
610 pci_read_config_word(dd->pcidev, epos + PCI_EXP_DEVCAP, &ecaps); 605
611 pci_read_config_word(dd->pcidev, epos + PCI_EXP_DEVCTL, &ectl);
612 } else
613 goto bail;
614 ret = 0; 606 ret = 0;
615 /* Find max payload supported by root, endpoint */ 607 /* Find max payload supported by root, endpoint */
616 rc_sup = fld2val(pcaps, PCI_EXP_DEVCAP_PAYLOAD); 608 rc_sup = fld2val(pcaps, PCI_EXP_DEVCAP_PAYLOAD);
@@ -629,14 +621,14 @@ static int qib_tune_pcie_caps(struct qib_devdata *dd)
629 rc_cur = rc_sup; 621 rc_cur = rc_sup;
630 pctl = (pctl & ~PCI_EXP_DEVCTL_PAYLOAD) | 622 pctl = (pctl & ~PCI_EXP_DEVCTL_PAYLOAD) |
631 val2fld(rc_cur, PCI_EXP_DEVCTL_PAYLOAD); 623 val2fld(rc_cur, PCI_EXP_DEVCTL_PAYLOAD);
632 pci_write_config_word(parent, ppos + PCI_EXP_DEVCTL, pctl); 624 pcie_capability_write_word(parent, PCI_EXP_DEVCTL, pctl);
633 } 625 }
634 /* If less than (allowed, supported), bump endpoint payload */ 626 /* If less than (allowed, supported), bump endpoint payload */
635 if (rc_sup > ep_cur) { 627 if (rc_sup > ep_cur) {
636 ep_cur = rc_sup; 628 ep_cur = rc_sup;
637 ectl = (ectl & ~PCI_EXP_DEVCTL_PAYLOAD) | 629 ectl = (ectl & ~PCI_EXP_DEVCTL_PAYLOAD) |
638 val2fld(ep_cur, PCI_EXP_DEVCTL_PAYLOAD); 630 val2fld(ep_cur, PCI_EXP_DEVCTL_PAYLOAD);
639 pci_write_config_word(dd->pcidev, epos + PCI_EXP_DEVCTL, ectl); 631 pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL, ectl);
640 } 632 }
641 633
642 /* 634 /*
@@ -654,13 +646,13 @@ static int qib_tune_pcie_caps(struct qib_devdata *dd)
654 rc_cur = rc_sup; 646 rc_cur = rc_sup;
655 pctl = (pctl & ~PCI_EXP_DEVCTL_READRQ) | 647 pctl = (pctl & ~PCI_EXP_DEVCTL_READRQ) |
656 val2fld(rc_cur, PCI_EXP_DEVCTL_READRQ); 648 val2fld(rc_cur, PCI_EXP_DEVCTL_READRQ);
657 pci_write_config_word(parent, ppos + PCI_EXP_DEVCTL, pctl); 649 pcie_capability_write_word(parent, PCI_EXP_DEVCTL, pctl);
658 } 650 }
659 if (rc_sup > ep_cur) { 651 if (rc_sup > ep_cur) {
660 ep_cur = rc_sup; 652 ep_cur = rc_sup;
661 ectl = (ectl & ~PCI_EXP_DEVCTL_READRQ) | 653 ectl = (ectl & ~PCI_EXP_DEVCTL_READRQ) |
662 val2fld(ep_cur, PCI_EXP_DEVCTL_READRQ); 654 val2fld(ep_cur, PCI_EXP_DEVCTL_READRQ);
663 pci_write_config_word(dd->pcidev, epos + PCI_EXP_DEVCTL, ectl); 655 pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL, ectl);
664 } 656 }
665bail: 657bail:
666 return ret; 658 return ret;
@@ -753,7 +745,7 @@ qib_pci_resume(struct pci_dev *pdev)
753 qib_init(dd, 1); /* same as re-init after reset */ 745 qib_init(dd, 1); /* same as re-init after reset */
754} 746}
755 747
756struct pci_error_handlers qib_pci_err_handler = { 748const struct pci_error_handlers qib_pci_err_handler = {
757 .error_detected = qib_pci_error_detected, 749 .error_detected = qib_pci_error_detected,
758 .mmio_enabled = qib_pci_mmio_enabled, 750 .mmio_enabled = qib_pci_mmio_enabled,
759 .link_reset = qib_pci_link_reset, 751 .link_reset = qib_pci_link_reset,
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 2297ec193eb4..db820d7dd0bc 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -2351,7 +2351,7 @@ static int iommu_should_identity_map(struct pci_dev *pdev, int startup)
2351 return 0; 2351 return 0;
2352 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_PCI) 2352 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_PCI)
2353 return 0; 2353 return 0;
2354 } else if (pdev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) 2354 } else if (pci_pcie_type(pdev) == PCI_EXP_TYPE_PCI_BRIDGE)
2355 return 0; 2355 return 0;
2356 2356
2357 /* 2357 /*
@@ -3546,10 +3546,10 @@ found:
3546 struct pci_dev *bridge = bus->self; 3546 struct pci_dev *bridge = bus->self;
3547 3547
3548 if (!bridge || !pci_is_pcie(bridge) || 3548 if (!bridge || !pci_is_pcie(bridge) ||
3549 bridge->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) 3549 pci_pcie_type(bridge) == PCI_EXP_TYPE_PCI_BRIDGE)
3550 return 0; 3550 return 0;
3551 3551
3552 if (bridge->pcie_type == PCI_EXP_TYPE_ROOT_PORT) { 3552 if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT) {
3553 for (i = 0; i < atsru->devices_cnt; i++) 3553 for (i = 0; i < atsru->devices_cnt; i++)
3554 if (atsru->devices[i] == bridge) 3554 if (atsru->devices[i] == bridge)
3555 return 1; 3555 return 1;
diff --git a/drivers/media/dvb/ngene/ngene-cards.c b/drivers/media/dvb/ngene/ngene-cards.c
index 72ee8de02260..0a497be97af8 100644
--- a/drivers/media/dvb/ngene/ngene-cards.c
+++ b/drivers/media/dvb/ngene/ngene-cards.c
@@ -524,7 +524,7 @@ static void ngene_resume(struct pci_dev *dev)
524 printk(KERN_INFO DEVICE_NAME ": resume\n"); 524 printk(KERN_INFO DEVICE_NAME ": resume\n");
525} 525}
526 526
527static struct pci_error_handlers ngene_errors = { 527static const struct pci_error_handlers ngene_errors = {
528 .error_detected = ngene_error_detected, 528 .error_detected = ngene_error_detected,
529 .link_reset = ngene_link_reset, 529 .link_reset = ngene_link_reset,
530 .slot_reset = ngene_slot_reset, 530 .slot_reset = ngene_slot_reset,
diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
index 1bf5bbfe778e..55a2e3795055 100644
--- a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
+++ b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c
@@ -149,7 +149,7 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
149 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 149 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
150 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 150 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
151 /* clear error status */ 151 /* clear error status */
152 pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA, 152 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
153 PCI_EXP_DEVSTA_NFED | 153 PCI_EXP_DEVSTA_NFED |
154 PCI_EXP_DEVSTA_FED | 154 PCI_EXP_DEVSTA_FED |
155 PCI_EXP_DEVSTA_CED | 155 PCI_EXP_DEVSTA_CED |
@@ -2685,7 +2685,7 @@ static void atl1c_io_resume(struct pci_dev *pdev)
2685 netif_device_attach(netdev); 2685 netif_device_attach(netdev);
2686} 2686}
2687 2687
2688static struct pci_error_handlers atl1c_err_handler = { 2688static const struct pci_error_handlers atl1c_err_handler = {
2689 .error_detected = atl1c_io_error_detected, 2689 .error_detected = atl1c_io_error_detected,
2690 .slot_reset = atl1c_io_slot_reset, 2690 .slot_reset = atl1c_io_slot_reset,
2691 .resume = atl1c_io_resume, 2691 .resume = atl1c_io_resume,
diff --git a/drivers/net/ethernet/atheros/atl1e/atl1e_main.c b/drivers/net/ethernet/atheros/atl1e/atl1e_main.c
index a98acc8a956f..e213da29e73d 100644
--- a/drivers/net/ethernet/atheros/atl1e/atl1e_main.c
+++ b/drivers/net/ethernet/atheros/atl1e/atl1e_main.c
@@ -2489,7 +2489,7 @@ static void atl1e_io_resume(struct pci_dev *pdev)
2489 netif_device_attach(netdev); 2489 netif_device_attach(netdev);
2490} 2490}
2491 2491
2492static struct pci_error_handlers atl1e_err_handler = { 2492static const struct pci_error_handlers atl1e_err_handler = {
2493 .error_detected = atl1e_io_error_detected, 2493 .error_detected = atl1e_io_error_detected,
2494 .slot_reset = atl1e_io_slot_reset, 2494 .slot_reset = atl1e_io_slot_reset,
2495 .resume = atl1e_io_resume, 2495 .resume = atl1e_io_resume,
diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c
index e48312f2305d..d4310700c7a7 100644
--- a/drivers/net/ethernet/broadcom/bnx2.c
+++ b/drivers/net/ethernet/broadcom/bnx2.c
@@ -8742,7 +8742,7 @@ static void bnx2_io_resume(struct pci_dev *pdev)
8742 rtnl_unlock(); 8742 rtnl_unlock();
8743} 8743}
8744 8744
8745static struct pci_error_handlers bnx2_err_handler = { 8745static const struct pci_error_handlers bnx2_err_handler = {
8746 .error_detected = bnx2_io_error_detected, 8746 .error_detected = bnx2_io_error_detected,
8747 .slot_reset = bnx2_io_slot_reset, 8747 .slot_reset = bnx2_io_slot_reset,
8748 .resume = bnx2_io_resume, 8748 .resume = bnx2_io_resume,
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 0875ecfe3372..e11485ca037d 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -1162,14 +1162,9 @@ static int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func,
1162 1162
1163static u8 bnx2x_is_pcie_pending(struct pci_dev *dev) 1163static u8 bnx2x_is_pcie_pending(struct pci_dev *dev)
1164{ 1164{
1165 int pos;
1166 u16 status; 1165 u16 status;
1167 1166
1168 pos = pci_pcie_cap(dev); 1167 pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
1169 if (!pos)
1170 return false;
1171
1172 pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status);
1173 return status & PCI_EXP_DEVSTA_TRPND; 1168 return status & PCI_EXP_DEVSTA_TRPND;
1174} 1169}
1175 1170
@@ -6135,8 +6130,7 @@ static void bnx2x_init_pxp(struct bnx2x *bp)
6135 u16 devctl; 6130 u16 devctl;
6136 int r_order, w_order; 6131 int r_order, w_order;
6137 6132
6138 pci_read_config_word(bp->pdev, 6133 pcie_capability_read_word(bp->pdev, PCI_EXP_DEVCTL, &devctl);
6139 pci_pcie_cap(bp->pdev) + PCI_EXP_DEVCTL, &devctl);
6140 DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl); 6134 DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl);
6141 w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5); 6135 w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
6142 if (bp->mrrs == -1) 6136 if (bp->mrrs == -1)
@@ -9380,7 +9374,7 @@ static int __devinit bnx2x_prev_mark_path(struct bnx2x *bp)
9380 9374
9381static int __devinit bnx2x_do_flr(struct bnx2x *bp) 9375static int __devinit bnx2x_do_flr(struct bnx2x *bp)
9382{ 9376{
9383 int i, pos; 9377 int i;
9384 u16 status; 9378 u16 status;
9385 struct pci_dev *dev = bp->pdev; 9379 struct pci_dev *dev = bp->pdev;
9386 9380
@@ -9397,16 +9391,12 @@ static int __devinit bnx2x_do_flr(struct bnx2x *bp)
9397 return -EINVAL; 9391 return -EINVAL;
9398 } 9392 }
9399 9393
9400 pos = pci_pcie_cap(dev);
9401 if (!pos)
9402 return -ENOTTY;
9403
9404 /* Wait for Transaction Pending bit clean */ 9394 /* Wait for Transaction Pending bit clean */
9405 for (i = 0; i < 4; i++) { 9395 for (i = 0; i < 4; i++) {
9406 if (i) 9396 if (i)
9407 msleep((1 << (i - 1)) * 100); 9397 msleep((1 << (i - 1)) * 100);
9408 9398
9409 pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status); 9399 pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
9410 if (!(status & PCI_EXP_DEVSTA_TRPND)) 9400 if (!(status & PCI_EXP_DEVSTA_TRPND))
9411 goto clear; 9401 goto clear;
9412 } 9402 }
@@ -12167,7 +12157,7 @@ static void bnx2x_io_resume(struct pci_dev *pdev)
12167 rtnl_unlock(); 12157 rtnl_unlock();
12168} 12158}
12169 12159
12170static struct pci_error_handlers bnx2x_err_handler = { 12160static const struct pci_error_handlers bnx2x_err_handler = {
12171 .error_detected = bnx2x_io_error_detected, 12161 .error_detected = bnx2x_io_error_detected,
12172 .slot_reset = bnx2x_io_slot_reset, 12162 .slot_reset = bnx2x_io_slot_reset,
12173 .resume = bnx2x_io_resume, 12163 .resume = bnx2x_io_resume,
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index bf906c51d82a..388d32213937 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -3653,17 +3653,9 @@ static int tg3_power_down_prepare(struct tg3 *tp)
3653 tg3_enable_register_access(tp); 3653 tg3_enable_register_access(tp);
3654 3654
3655 /* Restore the CLKREQ setting. */ 3655 /* Restore the CLKREQ setting. */
3656 if (tg3_flag(tp, CLKREQ_BUG)) { 3656 if (tg3_flag(tp, CLKREQ_BUG))
3657 u16 lnkctl; 3657 pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL,
3658 3658 PCI_EXP_LNKCTL_CLKREQ_EN);
3659 pci_read_config_word(tp->pdev,
3660 pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
3661 &lnkctl);
3662 lnkctl |= PCI_EXP_LNKCTL_CLKREQ_EN;
3663 pci_write_config_word(tp->pdev,
3664 pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
3665 lnkctl);
3666 }
3667 3659
3668 misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL); 3660 misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL);
3669 tw32(TG3PCI_MISC_HOST_CTRL, 3661 tw32(TG3PCI_MISC_HOST_CTRL,
@@ -4434,20 +4426,13 @@ relink:
4434 4426
4435 /* Prevent send BD corruption. */ 4427 /* Prevent send BD corruption. */
4436 if (tg3_flag(tp, CLKREQ_BUG)) { 4428 if (tg3_flag(tp, CLKREQ_BUG)) {
4437 u16 oldlnkctl, newlnkctl;
4438
4439 pci_read_config_word(tp->pdev,
4440 pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
4441 &oldlnkctl);
4442 if (tp->link_config.active_speed == SPEED_100 || 4429 if (tp->link_config.active_speed == SPEED_100 ||
4443 tp->link_config.active_speed == SPEED_10) 4430 tp->link_config.active_speed == SPEED_10)
4444 newlnkctl = oldlnkctl & ~PCI_EXP_LNKCTL_CLKREQ_EN; 4431 pcie_capability_clear_word(tp->pdev, PCI_EXP_LNKCTL,
4432 PCI_EXP_LNKCTL_CLKREQ_EN);
4445 else 4433 else
4446 newlnkctl = oldlnkctl | PCI_EXP_LNKCTL_CLKREQ_EN; 4434 pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL,
4447 if (newlnkctl != oldlnkctl) 4435 PCI_EXP_LNKCTL_CLKREQ_EN);
4448 pci_write_config_word(tp->pdev,
4449 pci_pcie_cap(tp->pdev) +
4450 PCI_EXP_LNKCTL, newlnkctl);
4451 } 4436 }
4452 4437
4453 if (current_link_up != netif_carrier_ok(tp->dev)) { 4438 if (current_link_up != netif_carrier_ok(tp->dev)) {
@@ -8054,7 +8039,7 @@ static int tg3_chip_reset(struct tg3 *tp)
8054 8039
8055 udelay(120); 8040 udelay(120);
8056 8041
8057 if (tg3_flag(tp, PCI_EXPRESS) && pci_pcie_cap(tp->pdev)) { 8042 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) {
8058 u16 val16; 8043 u16 val16;
8059 8044
8060 if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A0) { 8045 if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A0) {
@@ -8071,24 +8056,17 @@ static int tg3_chip_reset(struct tg3 *tp)
8071 } 8056 }
8072 8057
8073 /* Clear the "no snoop" and "relaxed ordering" bits. */ 8058 /* Clear the "no snoop" and "relaxed ordering" bits. */
8074 pci_read_config_word(tp->pdev, 8059 val16 = PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_NOSNOOP_EN;
8075 pci_pcie_cap(tp->pdev) + PCI_EXP_DEVCTL,
8076 &val16);
8077 val16 &= ~(PCI_EXP_DEVCTL_RELAX_EN |
8078 PCI_EXP_DEVCTL_NOSNOOP_EN);
8079 /* 8060 /*
8080 * Older PCIe devices only support the 128 byte 8061 * Older PCIe devices only support the 128 byte
8081 * MPS setting. Enforce the restriction. 8062 * MPS setting. Enforce the restriction.
8082 */ 8063 */
8083 if (!tg3_flag(tp, CPMU_PRESENT)) 8064 if (!tg3_flag(tp, CPMU_PRESENT))
8084 val16 &= ~PCI_EXP_DEVCTL_PAYLOAD; 8065 val16 |= PCI_EXP_DEVCTL_PAYLOAD;
8085 pci_write_config_word(tp->pdev, 8066 pcie_capability_clear_word(tp->pdev, PCI_EXP_DEVCTL, val16);
8086 pci_pcie_cap(tp->pdev) + PCI_EXP_DEVCTL,
8087 val16);
8088 8067
8089 /* Clear error status */ 8068 /* Clear error status */
8090 pci_write_config_word(tp->pdev, 8069 pcie_capability_write_word(tp->pdev, PCI_EXP_DEVSTA,
8091 pci_pcie_cap(tp->pdev) + PCI_EXP_DEVSTA,
8092 PCI_EXP_DEVSTA_CED | 8070 PCI_EXP_DEVSTA_CED |
8093 PCI_EXP_DEVSTA_NFED | 8071 PCI_EXP_DEVSTA_NFED |
8094 PCI_EXP_DEVSTA_FED | 8072 PCI_EXP_DEVSTA_FED |
@@ -14565,9 +14543,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
14565 14543
14566 tg3_flag_set(tp, PCI_EXPRESS); 14544 tg3_flag_set(tp, PCI_EXPRESS);
14567 14545
14568 pci_read_config_word(tp->pdev, 14546 pcie_capability_read_word(tp->pdev, PCI_EXP_LNKCTL, &lnkctl);
14569 pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
14570 &lnkctl);
14571 if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) { 14547 if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) {
14572 if (GET_ASIC_REV(tp->pci_chip_rev_id) == 14548 if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
14573 ASIC_REV_5906) { 14549 ASIC_REV_5906) {
@@ -16397,7 +16373,7 @@ done:
16397 rtnl_unlock(); 16373 rtnl_unlock();
16398} 16374}
16399 16375
16400static struct pci_error_handlers tg3_err_handler = { 16376static const struct pci_error_handlers tg3_err_handler = {
16401 .error_detected = tg3_io_error_detected, 16377 .error_detected = tg3_io_error_detected,
16402 .slot_reset = tg3_io_slot_reset, 16378 .slot_reset = tg3_io_slot_reset,
16403 .resume = tg3_io_resume 16379 .resume = tg3_io_resume
diff --git a/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c b/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
index 6505070abcfa..875bbb999aa2 100644
--- a/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
@@ -3036,7 +3036,7 @@ static void t3_io_resume(struct pci_dev *pdev)
3036 t3_resume_ports(adapter); 3036 t3_resume_ports(adapter);
3037} 3037}
3038 3038
3039static struct pci_error_handlers t3_err_handler = { 3039static const struct pci_error_handlers t3_err_handler = {
3040 .error_detected = t3_io_error_detected, 3040 .error_detected = t3_io_error_detected,
3041 .slot_reset = t3_io_slot_reset, 3041 .slot_reset = t3_io_slot_reset,
3042 .resume = t3_io_resume, 3042 .resume = t3_io_resume,
diff --git a/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c b/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c
index bff8a3cdd3df..aef45d3113ba 100644
--- a/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c
@@ -3289,22 +3289,18 @@ static void config_pcie(struct adapter *adap)
3289 unsigned int log2_width, pldsize; 3289 unsigned int log2_width, pldsize;
3290 unsigned int fst_trn_rx, fst_trn_tx, acklat, rpllmt; 3290 unsigned int fst_trn_rx, fst_trn_tx, acklat, rpllmt;
3291 3291
3292 pci_read_config_word(adap->pdev, 3292 pcie_capability_read_word(adap->pdev, PCI_EXP_DEVCTL, &val);
3293 adap->pdev->pcie_cap + PCI_EXP_DEVCTL,
3294 &val);
3295 pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5; 3293 pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
3296 3294
3297 pci_read_config_word(adap->pdev, 0x2, &devid); 3295 pci_read_config_word(adap->pdev, 0x2, &devid);
3298 if (devid == 0x37) { 3296 if (devid == 0x37) {
3299 pci_write_config_word(adap->pdev, 3297 pcie_capability_write_word(adap->pdev, PCI_EXP_DEVCTL,
3300 adap->pdev->pcie_cap + PCI_EXP_DEVCTL, 3298 val & ~PCI_EXP_DEVCTL_READRQ &
3301 val & ~PCI_EXP_DEVCTL_READRQ & 3299 ~PCI_EXP_DEVCTL_PAYLOAD);
3302 ~PCI_EXP_DEVCTL_PAYLOAD);
3303 pldsize = 0; 3300 pldsize = 0;
3304 } 3301 }
3305 3302
3306 pci_read_config_word(adap->pdev, adap->pdev->pcie_cap + PCI_EXP_LNKCTL, 3303 pcie_capability_read_word(adap->pdev, PCI_EXP_LNKCTL, &val);
3307 &val);
3308 3304
3309 fst_trn_tx = G_NUMFSTTRNSEQ(t3_read_reg(adap, A_PCIE_PEX_CTRL0)); 3305 fst_trn_tx = G_NUMFSTTRNSEQ(t3_read_reg(adap, A_PCIE_PEX_CTRL0));
3310 fst_trn_rx = adap->params.rev == 0 ? fst_trn_tx : 3306 fst_trn_rx = adap->params.rev == 0 ? fst_trn_tx :
@@ -3425,15 +3421,13 @@ out_err:
3425static void get_pci_mode(struct adapter *adapter, struct pci_params *p) 3421static void get_pci_mode(struct adapter *adapter, struct pci_params *p)
3426{ 3422{
3427 static unsigned short speed_map[] = { 33, 66, 100, 133 }; 3423 static unsigned short speed_map[] = { 33, 66, 100, 133 };
3428 u32 pci_mode, pcie_cap; 3424 u32 pci_mode;
3429 3425
3430 pcie_cap = pci_pcie_cap(adapter->pdev); 3426 if (pci_is_pcie(adapter->pdev)) {
3431 if (pcie_cap) {
3432 u16 val; 3427 u16 val;
3433 3428
3434 p->variant = PCI_VARIANT_PCIE; 3429 p->variant = PCI_VARIANT_PCIE;
3435 pci_read_config_word(adapter->pdev, pcie_cap + PCI_EXP_LNKSTA, 3430 pcie_capability_read_word(adapter->pdev, PCI_EXP_LNKSTA, &val);
3436 &val);
3437 p->width = (val >> 4) & 0x3f; 3431 p->width = (val >> 4) & 0x3f;
3438 return; 3432 return;
3439 } 3433 }
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 5ed49af23d6a..933985420acb 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -3453,7 +3453,7 @@ static void eeh_resume(struct pci_dev *pdev)
3453 rtnl_unlock(); 3453 rtnl_unlock();
3454} 3454}
3455 3455
3456static struct pci_error_handlers cxgb4_eeh = { 3456static const struct pci_error_handlers cxgb4_eeh = {
3457 .error_detected = eeh_err_detected, 3457 .error_detected = eeh_err_detected,
3458 .slot_reset = eeh_slot_reset, 3458 .slot_reset = eeh_slot_reset,
3459 .resume = eeh_resume, 3459 .resume = eeh_resume,
@@ -3694,15 +3694,7 @@ static void __devinit print_port_info(const struct net_device *dev)
3694 3694
3695static void __devinit enable_pcie_relaxed_ordering(struct pci_dev *dev) 3695static void __devinit enable_pcie_relaxed_ordering(struct pci_dev *dev)
3696{ 3696{
3697 u16 v; 3697 pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN);
3698 int pos;
3699
3700 pos = pci_pcie_cap(dev);
3701 if (pos > 0) {
3702 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &v);
3703 v |= PCI_EXP_DEVCTL_RELAX_EN;
3704 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, v);
3705 }
3706} 3698}
3707 3699
3708/* 3700/*
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index fa947dfa4c30..af1601323173 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -2741,11 +2741,9 @@ static void __devinit get_pci_mode(struct adapter *adapter,
2741 struct pci_params *p) 2741 struct pci_params *p)
2742{ 2742{
2743 u16 val; 2743 u16 val;
2744 u32 pcie_cap = pci_pcie_cap(adapter->pdev);
2745 2744
2746 if (pcie_cap) { 2745 if (pci_is_pcie(adapter->pdev)) {
2747 pci_read_config_word(adapter->pdev, pcie_cap + PCI_EXP_LNKSTA, 2746 pcie_capability_read_word(adapter->pdev, PCI_EXP_LNKSTA, &val);
2748 &val);
2749 p->speed = val & PCI_EXP_LNKSTA_CLS; 2747 p->speed = val & PCI_EXP_LNKSTA_CLS;
2750 p->width = (val & PCI_EXP_LNKSTA_NLW) >> 4; 2748 p->width = (val & PCI_EXP_LNKSTA_NLW) >> 4;
2751 } 2749 }
diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c
index 78b8aa8069f0..95d10472f236 100644
--- a/drivers/net/ethernet/emulex/benet/be_main.c
+++ b/drivers/net/ethernet/emulex/benet/be_main.c
@@ -4106,7 +4106,7 @@ err:
4106 dev_err(&adapter->pdev->dev, "EEH resume failed\n"); 4106 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
4107} 4107}
4108 4108
4109static struct pci_error_handlers be_eeh_handlers = { 4109static const struct pci_error_handlers be_eeh_handlers = {
4110 .error_detected = be_eeh_err_detected, 4110 .error_detected = be_eeh_err_detected,
4111 .slot_reset = be_eeh_reset, 4111 .slot_reset = be_eeh_reset,
4112 .resume = be_eeh_resume, 4112 .resume = be_eeh_resume,
diff --git a/drivers/net/ethernet/intel/e100.c b/drivers/net/ethernet/intel/e100.c
index 535f94fac4a1..29ce9bd27f94 100644
--- a/drivers/net/ethernet/intel/e100.c
+++ b/drivers/net/ethernet/intel/e100.c
@@ -3157,7 +3157,7 @@ static void e100_io_resume(struct pci_dev *pdev)
3157 } 3157 }
3158} 3158}
3159 3159
3160static struct pci_error_handlers e100_err_handler = { 3160static const struct pci_error_handlers e100_err_handler = {
3161 .error_detected = e100_io_error_detected, 3161 .error_detected = e100_io_error_detected,
3162 .slot_reset = e100_io_slot_reset, 3162 .slot_reset = e100_io_slot_reset,
3163 .resume = e100_io_resume, 3163 .resume = e100_io_resume,
diff --git a/drivers/net/ethernet/intel/e1000/e1000_main.c b/drivers/net/ethernet/intel/e1000/e1000_main.c
index bde337ee1a34..f3f9aeb7d1e1 100644
--- a/drivers/net/ethernet/intel/e1000/e1000_main.c
+++ b/drivers/net/ethernet/intel/e1000/e1000_main.c
@@ -192,7 +192,7 @@ static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
192static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); 192static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
193static void e1000_io_resume(struct pci_dev *pdev); 193static void e1000_io_resume(struct pci_dev *pdev);
194 194
195static struct pci_error_handlers e1000_err_handler = { 195static const struct pci_error_handlers e1000_err_handler = {
196 .error_detected = e1000_io_error_detected, 196 .error_detected = e1000_io_error_detected,
197 .slot_reset = e1000_io_slot_reset, 197 .slot_reset = e1000_io_slot_reset,
198 .resume = e1000_io_resume, 198 .resume = e1000_io_resume,
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index d01a099475a1..3f0223ac4c7c 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -5584,16 +5584,15 @@ static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5584 */ 5584 */
5585 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5585 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5586 struct pci_dev *us_dev = pdev->bus->self; 5586 struct pci_dev *us_dev = pdev->bus->self;
5587 int pos = pci_pcie_cap(us_dev);
5588 u16 devctl; 5587 u16 devctl;
5589 5588
5590 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5589 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
5591 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5590 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
5592 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5591 (devctl & ~PCI_EXP_DEVCTL_CERE));
5593 5592
5594 e1000_power_off(pdev, sleep, wake); 5593 e1000_power_off(pdev, sleep, wake);
5595 5594
5596 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5595 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
5597 } else { 5596 } else {
5598 e1000_power_off(pdev, sleep, wake); 5597 e1000_power_off(pdev, sleep, wake);
5599 } 5598 }
@@ -5607,25 +5606,15 @@ static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5607#else 5606#else
5608static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5607static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5609{ 5608{
5610 int pos;
5611 u16 reg16;
5612
5613 /* 5609 /*
5614 * Both device and parent should have the same ASPM setting. 5610 * Both device and parent should have the same ASPM setting.
5615 * Disable ASPM in downstream component first and then upstream. 5611 * Disable ASPM in downstream component first and then upstream.
5616 */ 5612 */
5617 pos = pci_pcie_cap(pdev); 5613 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, state);
5618 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5619 reg16 &= ~state;
5620 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5621
5622 if (!pdev->bus->self)
5623 return;
5624 5614
5625 pos = pci_pcie_cap(pdev->bus->self); 5615 if (pdev->bus->self)
5626 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16); 5616 pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL,
5627 reg16 &= ~state; 5617 state);
5628 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5629} 5618}
5630#endif 5619#endif
5631static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5620static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
@@ -6486,7 +6475,7 @@ static void __devexit e1000_remove(struct pci_dev *pdev)
6486} 6475}
6487 6476
6488/* PCI Error Recovery (ERS) */ 6477/* PCI Error Recovery (ERS) */
6489static struct pci_error_handlers e1000_err_handler = { 6478static const struct pci_error_handlers e1000_err_handler = {
6490 .error_detected = e1000_io_error_detected, 6479 .error_detected = e1000_io_error_detected,
6491 .slot_reset = e1000_io_slot_reset, 6480 .slot_reset = e1000_io_slot_reset,
6492 .resume = e1000_io_resume, 6481 .resume = e1000_io_resume,
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index 48cc4fb1a307..f88c822e57a6 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -217,7 +217,7 @@ static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
217static pci_ers_result_t igb_io_slot_reset(struct pci_dev *); 217static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
218static void igb_io_resume(struct pci_dev *); 218static void igb_io_resume(struct pci_dev *);
219 219
220static struct pci_error_handlers igb_err_handler = { 220static const struct pci_error_handlers igb_err_handler = {
221 .error_detected = igb_io_error_detected, 221 .error_detected = igb_io_error_detected,
222 .slot_reset = igb_io_slot_reset, 222 .slot_reset = igb_io_slot_reset,
223 .resume = igb_io_resume, 223 .resume = igb_io_resume,
@@ -6538,28 +6538,20 @@ static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6538s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value) 6538s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6539{ 6539{
6540 struct igb_adapter *adapter = hw->back; 6540 struct igb_adapter *adapter = hw->back;
6541 u16 cap_offset;
6542 6541
6543 cap_offset = adapter->pdev->pcie_cap; 6542 if (pcie_capability_read_word(adapter->pdev, reg, value))
6544 if (!cap_offset)
6545 return -E1000_ERR_CONFIG; 6543 return -E1000_ERR_CONFIG;
6546 6544
6547 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
6548
6549 return 0; 6545 return 0;
6550} 6546}
6551 6547
6552s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value) 6548s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6553{ 6549{
6554 struct igb_adapter *adapter = hw->back; 6550 struct igb_adapter *adapter = hw->back;
6555 u16 cap_offset;
6556 6551
6557 cap_offset = adapter->pdev->pcie_cap; 6552 if (pcie_capability_write_word(adapter->pdev, reg, *value))
6558 if (!cap_offset)
6559 return -E1000_ERR_CONFIG; 6553 return -E1000_ERR_CONFIG;
6560 6554
6561 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
6562
6563 return 0; 6555 return 0;
6564} 6556}
6565 6557
diff --git a/drivers/net/ethernet/intel/igbvf/netdev.c b/drivers/net/ethernet/intel/igbvf/netdev.c
index 0696abfe9944..0ac11f527a84 100644
--- a/drivers/net/ethernet/intel/igbvf/netdev.c
+++ b/drivers/net/ethernet/intel/igbvf/netdev.c
@@ -2833,7 +2833,7 @@ static void __devexit igbvf_remove(struct pci_dev *pdev)
2833} 2833}
2834 2834
2835/* PCI Error Recovery (ERS) */ 2835/* PCI Error Recovery (ERS) */
2836static struct pci_error_handlers igbvf_err_handler = { 2836static const struct pci_error_handlers igbvf_err_handler = {
2837 .error_detected = igbvf_io_error_detected, 2837 .error_detected = igbvf_io_error_detected,
2838 .slot_reset = igbvf_io_slot_reset, 2838 .slot_reset = igbvf_io_slot_reset,
2839 .resume = igbvf_io_resume, 2839 .resume = igbvf_io_resume,
diff --git a/drivers/net/ethernet/intel/ixgb/ixgb_main.c b/drivers/net/ethernet/intel/ixgb/ixgb_main.c
index d05fc95befc5..d99a2d51b948 100644
--- a/drivers/net/ethernet/intel/ixgb/ixgb_main.c
+++ b/drivers/net/ethernet/intel/ixgb/ixgb_main.c
@@ -115,7 +115,7 @@ static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
115static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev); 115static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
116static void ixgb_io_resume (struct pci_dev *pdev); 116static void ixgb_io_resume (struct pci_dev *pdev);
117 117
118static struct pci_error_handlers ixgb_err_handler = { 118static const struct pci_error_handlers ixgb_err_handler = {
119 .error_detected = ixgb_io_error_detected, 119 .error_detected = ixgb_io_error_detected,
120 .slot_reset = ixgb_io_slot_reset, 120 .slot_reset = ixgb_io_slot_reset,
121 .resume = ixgb_io_resume, 121 .resume = ixgb_io_resume,
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 4326f74f7137..ee61819d6088 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -7527,7 +7527,7 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7527 goto skip_bad_vf_detection; 7527 goto skip_bad_vf_detection;
7528 7528
7529 bdev = pdev->bus->self; 7529 bdev = pdev->bus->self;
7530 while (bdev && (bdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT)) 7530 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
7531 bdev = bdev->bus->self; 7531 bdev = bdev->bus->self;
7532 7532
7533 if (!bdev) 7533 if (!bdev)
@@ -7677,7 +7677,7 @@ static void ixgbe_io_resume(struct pci_dev *pdev)
7677 netif_device_attach(netdev); 7677 netif_device_attach(netdev);
7678} 7678}
7679 7679
7680static struct pci_error_handlers ixgbe_err_handler = { 7680static const struct pci_error_handlers ixgbe_err_handler = {
7681 .error_detected = ixgbe_io_error_detected, 7681 .error_detected = ixgbe_io_error_detected,
7682 .slot_reset = ixgbe_io_slot_reset, 7682 .slot_reset = ixgbe_io_slot_reset,
7683 .resume = ixgbe_io_resume, 7683 .resume = ixgbe_io_resume,
diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c
index 60ef64587412..6647383c4ddc 100644
--- a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c
+++ b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c
@@ -3256,7 +3256,7 @@ static void ixgbevf_io_resume(struct pci_dev *pdev)
3256} 3256}
3257 3257
3258/* PCI Error Recovery (ERS) */ 3258/* PCI Error Recovery (ERS) */
3259static struct pci_error_handlers ixgbevf_err_handler = { 3259static const struct pci_error_handlers ixgbevf_err_handler = {
3260 .error_detected = ixgbevf_io_error_detected, 3260 .error_detected = ixgbevf_io_error_detected,
3261 .slot_reset = ixgbevf_io_slot_reset, 3261 .slot_reset = ixgbevf_io_slot_reset,
3262 .resume = ixgbevf_io_resume, 3262 .resume = ixgbevf_io_resume,
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index 2f816c6aed72..dd6ea942625c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -2300,7 +2300,7 @@ static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)
2300 return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 2300 return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
2301} 2301}
2302 2302
2303static struct pci_error_handlers mlx4_err_handler = { 2303static const struct pci_error_handlers mlx4_err_handler = {
2304 .error_detected = mlx4_pci_err_detected, 2304 .error_detected = mlx4_pci_err_detected,
2305 .slot_reset = mlx4_pci_slot_reset, 2305 .slot_reset = mlx4_pci_slot_reset,
2306}; 2306};
diff --git a/drivers/net/ethernet/mellanox/mlx4/reset.c b/drivers/net/ethernet/mellanox/mlx4/reset.c
index 11e7c1cb99bf..dd1b5093d8b1 100644
--- a/drivers/net/ethernet/mellanox/mlx4/reset.c
+++ b/drivers/net/ethernet/mellanox/mlx4/reset.c
@@ -141,16 +141,16 @@ int mlx4_reset(struct mlx4_dev *dev)
141 /* Now restore the PCI headers */ 141 /* Now restore the PCI headers */
142 if (pcie_cap) { 142 if (pcie_cap) {
143 devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4]; 143 devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4];
144 if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_DEVCTL, 144 if (pcie_capability_write_word(dev->pdev, PCI_EXP_DEVCTL,
145 devctl)) { 145 devctl)) {
146 err = -ENODEV; 146 err = -ENODEV;
147 mlx4_err(dev, "Couldn't restore HCA PCI Express " 147 mlx4_err(dev, "Couldn't restore HCA PCI Express "
148 "Device Control register, aborting.\n"); 148 "Device Control register, aborting.\n");
149 goto out; 149 goto out;
150 } 150 }
151 linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4]; 151 linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4];
152 if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_LNKCTL, 152 if (pcie_capability_write_word(dev->pdev, PCI_EXP_LNKCTL,
153 linkctl)) { 153 linkctl)) {
154 err = -ENODEV; 154 err = -ENODEV;
155 mlx4_err(dev, "Couldn't restore HCA PCI Express " 155 mlx4_err(dev, "Couldn't restore HCA PCI Express "
156 "Link control register, aborting.\n"); 156 "Link control register, aborting.\n");
diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
index fa85cf1353fd..83516e3369c9 100644
--- a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
+++ b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
@@ -1078,22 +1078,16 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
1078#ifdef CONFIG_MYRI10GE_DCA 1078#ifdef CONFIG_MYRI10GE_DCA
1079static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on) 1079static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on)
1080{ 1080{
1081 int ret, cap, err; 1081 int ret;
1082 u16 ctl; 1082 u16 ctl;
1083 1083
1084 cap = pci_pcie_cap(pdev); 1084 pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &ctl);
1085 if (!cap)
1086 return 0;
1087
1088 err = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
1089 if (err)
1090 return 0;
1091 1085
1092 ret = (ctl & PCI_EXP_DEVCTL_RELAX_EN) >> 4; 1086 ret = (ctl & PCI_EXP_DEVCTL_RELAX_EN) >> 4;
1093 if (ret != on) { 1087 if (ret != on) {
1094 ctl &= ~PCI_EXP_DEVCTL_RELAX_EN; 1088 ctl &= ~PCI_EXP_DEVCTL_RELAX_EN;
1095 ctl |= (on << 4); 1089 ctl |= (on << 4);
1096 pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl); 1090 pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, ctl);
1097 } 1091 }
1098 return ret; 1092 return ret;
1099} 1093}
@@ -3192,18 +3186,13 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
3192 struct device *dev = &mgp->pdev->dev; 3186 struct device *dev = &mgp->pdev->dev;
3193 int cap; 3187 int cap;
3194 unsigned err_cap; 3188 unsigned err_cap;
3195 u16 val;
3196 u8 ext_type;
3197 int ret; 3189 int ret;
3198 3190
3199 if (!myri10ge_ecrc_enable || !bridge) 3191 if (!myri10ge_ecrc_enable || !bridge)
3200 return; 3192 return;
3201 3193
3202 /* check that the bridge is a root port */ 3194 /* check that the bridge is a root port */
3203 cap = pci_pcie_cap(bridge); 3195 if (pci_pcie_type(bridge) != PCI_EXP_TYPE_ROOT_PORT) {
3204 pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
3205 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
3206 if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
3207 if (myri10ge_ecrc_enable > 1) { 3196 if (myri10ge_ecrc_enable > 1) {
3208 struct pci_dev *prev_bridge, *old_bridge = bridge; 3197 struct pci_dev *prev_bridge, *old_bridge = bridge;
3209 3198
@@ -3218,11 +3207,8 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
3218 " to force ECRC\n"); 3207 " to force ECRC\n");
3219 return; 3208 return;
3220 } 3209 }
3221 cap = pci_pcie_cap(bridge); 3210 } while (pci_pcie_type(bridge) !=
3222 pci_read_config_word(bridge, 3211 PCI_EXP_TYPE_ROOT_PORT);
3223 cap + PCI_CAP_FLAGS, &val);
3224 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
3225 } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
3226 3212
3227 dev_info(dev, 3213 dev_info(dev,
3228 "Forcing ECRC on non-root port %s" 3214 "Forcing ECRC on non-root port %s"
@@ -3335,11 +3321,10 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
3335 int overridden = 0; 3321 int overridden = 0;
3336 3322
3337 if (myri10ge_force_firmware == 0) { 3323 if (myri10ge_force_firmware == 0) {
3338 int link_width, exp_cap; 3324 int link_width;
3339 u16 lnk; 3325 u16 lnk;
3340 3326
3341 exp_cap = pci_pcie_cap(mgp->pdev); 3327 pcie_capability_read_word(mgp->pdev, PCI_EXP_LNKSTA, &lnk);
3342 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
3343 link_width = (lnk >> 4) & 0x3f; 3328 link_width = (lnk >> 4) & 0x3f;
3344 3329
3345 /* Check to see if Link is less than 8 or if the 3330 /* Check to see if Link is less than 8 or if the
diff --git a/drivers/net/ethernet/neterion/s2io.c b/drivers/net/ethernet/neterion/s2io.c
index d958c2299372..de50547c187d 100644
--- a/drivers/net/ethernet/neterion/s2io.c
+++ b/drivers/net/ethernet/neterion/s2io.c
@@ -484,7 +484,7 @@ static DEFINE_PCI_DEVICE_TABLE(s2io_tbl) = {
484 484
485MODULE_DEVICE_TABLE(pci, s2io_tbl); 485MODULE_DEVICE_TABLE(pci, s2io_tbl);
486 486
487static struct pci_error_handlers s2io_err_handler = { 487static const struct pci_error_handlers s2io_err_handler = {
488 .error_detected = s2io_io_error_detected, 488 .error_detected = s2io_io_error_detected,
489 .slot_reset = s2io_io_slot_reset, 489 .slot_reset = s2io_io_slot_reset,
490 .resume = s2io_io_resume, 490 .resume = s2io_io_resume,
diff --git a/drivers/net/ethernet/neterion/vxge/vxge-config.c b/drivers/net/ethernet/neterion/vxge/vxge-config.c
index 32d06824fe3e..c2e420a84d22 100644
--- a/drivers/net/ethernet/neterion/vxge/vxge-config.c
+++ b/drivers/net/ethernet/neterion/vxge/vxge-config.c
@@ -757,7 +757,7 @@ __vxge_hw_verify_pci_e_info(struct __vxge_hw_device *hldev)
757 u16 lnk; 757 u16 lnk;
758 758
759 /* Get the negotiated link width and speed from PCI config space */ 759 /* Get the negotiated link width and speed from PCI config space */
760 pci_read_config_word(dev, dev->pcie_cap + PCI_EXP_LNKSTA, &lnk); 760 pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnk);
761 761
762 if ((lnk & PCI_EXP_LNKSTA_CLS) != 1) 762 if ((lnk & PCI_EXP_LNKSTA_CLS) != 1)
763 return VXGE_HW_ERR_INVALID_PCI_INFO; 763 return VXGE_HW_ERR_INVALID_PCI_INFO;
@@ -1982,7 +1982,7 @@ u16 vxge_hw_device_link_width_get(struct __vxge_hw_device *hldev)
1982 struct pci_dev *dev = hldev->pdev; 1982 struct pci_dev *dev = hldev->pdev;
1983 u16 lnk; 1983 u16 lnk;
1984 1984
1985 pci_read_config_word(dev, dev->pcie_cap + PCI_EXP_LNKSTA, &lnk); 1985 pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnk);
1986 return (lnk & VXGE_HW_PCI_EXP_LNKCAP_LNK_WIDTH) >> 4; 1986 return (lnk & VXGE_HW_PCI_EXP_LNKCAP_LNK_WIDTH) >> 4;
1987} 1987}
1988 1988
diff --git a/drivers/net/ethernet/neterion/vxge/vxge-main.c b/drivers/net/ethernet/neterion/vxge/vxge-main.c
index de2190443510..cfa71a30dc8d 100644
--- a/drivers/net/ethernet/neterion/vxge/vxge-main.c
+++ b/drivers/net/ethernet/neterion/vxge/vxge-main.c
@@ -4799,7 +4799,7 @@ static void __devexit vxge_remove(struct pci_dev *pdev)
4799 __LINE__); 4799 __LINE__);
4800} 4800}
4801 4801
4802static struct pci_error_handlers vxge_err_handler = { 4802static const struct pci_error_handlers vxge_err_handler = {
4803 .error_detected = vxge_io_error_detected, 4803 .error_detected = vxge_io_error_detected,
4804 .slot_reset = vxge_io_slot_reset, 4804 .slot_reset = vxge_io_slot_reset,
4805 .resume = vxge_io_resume, 4805 .resume = vxge_io_resume,
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
index feb85d56c750..b2a94d02a521 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
@@ -2795,7 +2795,7 @@ static const struct dev_pm_ops pch_gbe_pm_ops = {
2795}; 2795};
2796#endif 2796#endif
2797 2797
2798static struct pci_error_handlers pch_gbe_err_handler = { 2798static const struct pci_error_handlers pch_gbe_err_handler = {
2799 .error_detected = pch_gbe_io_error_detected, 2799 .error_detected = pch_gbe_io_error_detected,
2800 .slot_reset = pch_gbe_io_slot_reset, 2800 .slot_reset = pch_gbe_io_slot_reset,
2801 .resume = pch_gbe_io_resume 2801 .resume = pch_gbe_io_resume
diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
index a77c558d8f40..df450616ab37 100644
--- a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
+++ b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
@@ -1386,7 +1386,7 @@ static void netxen_mask_aer_correctable(struct netxen_adapter *adapter)
1386 adapter->ahw.board_type != NETXEN_BRDTYPE_P3_10G_TP) 1386 adapter->ahw.board_type != NETXEN_BRDTYPE_P3_10G_TP)
1387 return; 1387 return;
1388 1388
1389 if (root->pcie_type != PCI_EXP_TYPE_ROOT_PORT) 1389 if (pci_pcie_type(root) != PCI_EXP_TYPE_ROOT_PORT)
1390 return; 1390 return;
1391 1391
1392 aer_pos = pci_find_ext_capability(root, PCI_EXT_CAP_ID_ERR); 1392 aer_pos = pci_find_ext_capability(root, PCI_EXT_CAP_ID_ERR);
@@ -3340,7 +3340,7 @@ netxen_free_vlan_ip_list(struct netxen_adapter *adapter)
3340{ } 3340{ }
3341#endif 3341#endif
3342 3342
3343static struct pci_error_handlers netxen_err_handler = { 3343static const struct pci_error_handlers netxen_err_handler = {
3344 .error_detected = netxen_io_error_detected, 3344 .error_detected = netxen_io_error_detected,
3345 .slot_reset = netxen_io_slot_reset, 3345 .slot_reset = netxen_io_slot_reset,
3346 .resume = netxen_io_resume, 3346 .resume = netxen_io_resume,
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
index 212c12193275..473ce134ca63 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
@@ -4522,7 +4522,7 @@ static void
4522qlcnic_restore_indev_addr(struct net_device *dev, unsigned long event) 4522qlcnic_restore_indev_addr(struct net_device *dev, unsigned long event)
4523{ } 4523{ }
4524#endif 4524#endif
4525static struct pci_error_handlers qlcnic_err_handler = { 4525static const struct pci_error_handlers qlcnic_err_handler = {
4526 .error_detected = qlcnic_io_error_detected, 4526 .error_detected = qlcnic_io_error_detected,
4527 .slot_reset = qlcnic_io_slot_reset, 4527 .slot_reset = qlcnic_io_slot_reset,
4528 .resume = qlcnic_io_resume, 4528 .resume = qlcnic_io_resume,
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_main.c b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
index b53a3b60b648..b262d6156816 100644
--- a/drivers/net/ethernet/qlogic/qlge/qlge_main.c
+++ b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
@@ -4847,7 +4847,7 @@ static void qlge_io_resume(struct pci_dev *pdev)
4847 netif_device_attach(ndev); 4847 netif_device_attach(ndev);
4848} 4848}
4849 4849
4850static struct pci_error_handlers qlge_err_handler = { 4850static const struct pci_error_handlers qlge_err_handler = {
4851 .error_detected = qlge_io_error_detected, 4851 .error_detected = qlge_io_error_detected,
4852 .slot_reset = qlge_io_slot_reset, 4852 .slot_reset = qlge_io_slot_reset,
4853 .resume = qlge_io_resume, 4853 .resume = qlge_io_resume,
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index b47d5b35024e..a7cc56007b33 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -833,15 +833,8 @@ static void rtl_unlock_work(struct rtl8169_private *tp)
833 833
834static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force) 834static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
835{ 835{
836 int cap = pci_pcie_cap(pdev); 836 pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
837 837 PCI_EXP_DEVCTL_READRQ, force);
838 if (cap) {
839 u16 ctl;
840
841 pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
842 ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force;
843 pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
844 }
845} 838}
846 839
847struct rtl_cond { 840struct rtl_cond {
@@ -4739,28 +4732,14 @@ static void rtl_ephy_init(struct rtl8169_private *tp, const struct ephy_info *e,
4739 4732
4740static void rtl_disable_clock_request(struct pci_dev *pdev) 4733static void rtl_disable_clock_request(struct pci_dev *pdev)
4741{ 4734{
4742 int cap = pci_pcie_cap(pdev); 4735 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
4743 4736 PCI_EXP_LNKCTL_CLKREQ_EN);
4744 if (cap) {
4745 u16 ctl;
4746
4747 pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl);
4748 ctl &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
4749 pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl);
4750 }
4751} 4737}
4752 4738
4753static void rtl_enable_clock_request(struct pci_dev *pdev) 4739static void rtl_enable_clock_request(struct pci_dev *pdev)
4754{ 4740{
4755 int cap = pci_pcie_cap(pdev); 4741 pcie_capability_set_word(pdev, PCI_EXP_LNKCTL,
4756 4742 PCI_EXP_LNKCTL_CLKREQ_EN);
4757 if (cap) {
4758 u16 ctl;
4759
4760 pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl);
4761 ctl |= PCI_EXP_LNKCTL_CLKREQ_EN;
4762 pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl);
4763 }
4764} 4743}
4765 4744
4766#define R8168_CPCMD_QUIRK_MASK (\ 4745#define R8168_CPCMD_QUIRK_MASK (\
@@ -5405,14 +5384,9 @@ static void rtl_hw_start_8101(struct net_device *dev)
5405 tp->event_slow &= ~RxFIFOOver; 5384 tp->event_slow &= ~RxFIFOOver;
5406 5385
5407 if (tp->mac_version == RTL_GIGA_MAC_VER_13 || 5386 if (tp->mac_version == RTL_GIGA_MAC_VER_13 ||
5408 tp->mac_version == RTL_GIGA_MAC_VER_16) { 5387 tp->mac_version == RTL_GIGA_MAC_VER_16)
5409 int cap = pci_pcie_cap(pdev); 5388 pcie_capability_set_word(pdev, PCI_EXP_DEVCTL,
5410 5389 PCI_EXP_DEVCTL_NOSNOOP_EN);
5411 if (cap) {
5412 pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL,
5413 PCI_EXP_DEVCTL_NOSNOOP_EN);
5414 }
5415 }
5416 5390
5417 RTL_W8(Cfg9346, Cfg9346_Unlock); 5391 RTL_W8(Cfg9346, Cfg9346_Unlock);
5418 5392
diff --git a/drivers/net/ethernet/sun/niu.c b/drivers/net/ethernet/sun/niu.c
index c2a0fe393267..3208dca66758 100644
--- a/drivers/net/ethernet/sun/niu.c
+++ b/drivers/net/ethernet/sun/niu.c
@@ -9762,9 +9762,8 @@ static int __devinit niu_pci_init_one(struct pci_dev *pdev,
9762 union niu_parent_id parent_id; 9762 union niu_parent_id parent_id;
9763 struct net_device *dev; 9763 struct net_device *dev;
9764 struct niu *np; 9764 struct niu *np;
9765 int err, pos; 9765 int err;
9766 u64 dma_mask; 9766 u64 dma_mask;
9767 u16 val16;
9768 9767
9769 niu_driver_version(); 9768 niu_driver_version();
9770 9769
@@ -9787,8 +9786,7 @@ static int __devinit niu_pci_init_one(struct pci_dev *pdev,
9787 goto err_out_disable_pdev; 9786 goto err_out_disable_pdev;
9788 } 9787 }
9789 9788
9790 pos = pci_pcie_cap(pdev); 9789 if (!pci_is_pcie(pdev)) {
9791 if (pos <= 0) {
9792 dev_err(&pdev->dev, "Cannot find PCI Express capability, aborting\n"); 9790 dev_err(&pdev->dev, "Cannot find PCI Express capability, aborting\n");
9793 goto err_out_free_res; 9791 goto err_out_free_res;
9794 } 9792 }
@@ -9813,14 +9811,11 @@ static int __devinit niu_pci_init_one(struct pci_dev *pdev,
9813 goto err_out_free_dev; 9811 goto err_out_free_dev;
9814 } 9812 }
9815 9813
9816 pci_read_config_word(pdev, pos + PCI_EXP_DEVCTL, &val16); 9814 pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
9817 val16 &= ~PCI_EXP_DEVCTL_NOSNOOP_EN; 9815 PCI_EXP_DEVCTL_NOSNOOP_EN,
9818 val16 |= (PCI_EXP_DEVCTL_CERE | 9816 PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE |
9819 PCI_EXP_DEVCTL_NFERE | 9817 PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE |
9820 PCI_EXP_DEVCTL_FERE | 9818 PCI_EXP_DEVCTL_RELAX_EN);
9821 PCI_EXP_DEVCTL_URRE |
9822 PCI_EXP_DEVCTL_RELAX_EN);
9823 pci_write_config_word(pdev, pos + PCI_EXP_DEVCTL, val16);
9824 9819
9825 dma_mask = DMA_BIT_MASK(44); 9820 dma_mask = DMA_BIT_MASK(44);
9826 err = pci_set_dma_mask(pdev, dma_mask); 9821 err = pci_set_dma_mask(pdev, dma_mask);
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index a978984d78a5..ef11dc639461 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -113,41 +113,32 @@ static void ath_pci_aspm_init(struct ath_common *common)
113 struct ath_hw *ah = sc->sc_ah; 113 struct ath_hw *ah = sc->sc_ah;
114 struct pci_dev *pdev = to_pci_dev(sc->dev); 114 struct pci_dev *pdev = to_pci_dev(sc->dev);
115 struct pci_dev *parent; 115 struct pci_dev *parent;
116 int pos; 116 u16 aspm;
117 u8 aspm;
118 117
119 if (!ah->is_pciexpress) 118 if (!ah->is_pciexpress)
120 return; 119 return;
121 120
122 pos = pci_pcie_cap(pdev);
123 if (!pos)
124 return;
125
126 parent = pdev->bus->self; 121 parent = pdev->bus->self;
127 if (!parent) 122 if (!parent)
128 return; 123 return;
129 124
130 if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) { 125 if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
131 /* Bluetooth coexistance requires disabling ASPM. */ 126 /* Bluetooth coexistance requires disabling ASPM. */
132 pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &aspm); 127 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
133 aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); 128 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
134 pci_write_config_byte(pdev, pos + PCI_EXP_LNKCTL, aspm);
135 129
136 /* 130 /*
137 * Both upstream and downstream PCIe components should 131 * Both upstream and downstream PCIe components should
138 * have the same ASPM settings. 132 * have the same ASPM settings.
139 */ 133 */
140 pos = pci_pcie_cap(parent); 134 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
141 pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); 135 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
142 aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
143 pci_write_config_byte(parent, pos + PCI_EXP_LNKCTL, aspm);
144 136
145 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n"); 137 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
146 return; 138 return;
147 } 139 }
148 140
149 pos = pci_pcie_cap(parent); 141 pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
150 pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm);
151 if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { 142 if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) {
152 ah->aspm_enabled = true; 143 ah->aspm_enabled = true;
153 /* Initialize PCIe PM and SERDES registers. */ 144 /* Initialize PCIe PM and SERDES registers. */
diff --git a/drivers/net/wireless/iwlegacy/common.h b/drivers/net/wireless/iwlegacy/common.h
index 5f5017767b99..724682669060 100644
--- a/drivers/net/wireless/iwlegacy/common.h
+++ b/drivers/net/wireless/iwlegacy/common.h
@@ -1832,10 +1832,8 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
1832static inline u16 1832static inline u16
1833il_pcie_link_ctl(struct il_priv *il) 1833il_pcie_link_ctl(struct il_priv *il)
1834{ 1834{
1835 int pos;
1836 u16 pci_lnk_ctl; 1835 u16 pci_lnk_ctl;
1837 pos = pci_pcie_cap(il->pci_dev); 1836 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &pci_lnk_ctl);
1838 pci_read_config_word(il->pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
1839 return pci_lnk_ctl; 1837 return pci_lnk_ctl;
1840} 1838}
1841 1839
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c
index dbeebef562d5..063ecaff5b56 100644
--- a/drivers/net/wireless/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/iwlwifi/pcie/trans.c
@@ -675,13 +675,10 @@ static void iwl_set_pwr_vmain(struct iwl_trans *trans)
675static u16 iwl_pciexp_link_ctrl(struct iwl_trans *trans) 675static u16 iwl_pciexp_link_ctrl(struct iwl_trans *trans)
676{ 676{
677 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); 677 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
678 int pos;
679 u16 pci_lnk_ctl; 678 u16 pci_lnk_ctl;
680 679
681 struct pci_dev *pci_dev = trans_pcie->pci_dev; 680 pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL,
682 681 &pci_lnk_ctl);
683 pos = pci_pcie_cap(pci_dev);
684 pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
685 return pci_lnk_ctl; 682 return pci_lnk_ctl;
686} 683}
687 684
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
index 80f75d3ba84a..5983631a1b1a 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -372,13 +372,11 @@ static void rtl_pci_parse_configuration(struct pci_dev *pdev,
372 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); 372 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
373 373
374 u8 tmp; 374 u8 tmp;
375 int pos; 375 u16 linkctrl_reg;
376 u8 linkctrl_reg;
377 376
378 /*Link Control Register */ 377 /*Link Control Register */
379 pos = pci_pcie_cap(pdev); 378 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
380 pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg); 379 pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
381 pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
382 380
383 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n", 381 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
384 pcipriv->ndis_adapter.linkctrl_reg); 382 pcipriv->ndis_adapter.linkctrl_reg);
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index ffddc4f64268..fb6a1fe21b93 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -477,14 +477,12 @@ dino_card_setup(struct pci_bus *bus, void __iomem *base_addr)
477 if (ccio_allocate_resource(dino_dev->hba.dev, res, _8MB, 477 if (ccio_allocate_resource(dino_dev->hba.dev, res, _8MB,
478 F_EXTEND(0xf0000000UL) | _8MB, 478 F_EXTEND(0xf0000000UL) | _8MB,
479 F_EXTEND(0xffffffffUL) &~ _8MB, _8MB) < 0) { 479 F_EXTEND(0xffffffffUL) &~ _8MB, _8MB) < 0) {
480 struct list_head *ln, *tmp_ln; 480 struct pci_dev *dev, *tmp;
481 481
482 printk(KERN_ERR "Dino: cannot attach bus %s\n", 482 printk(KERN_ERR "Dino: cannot attach bus %s\n",
483 dev_name(bus->bridge)); 483 dev_name(bus->bridge));
484 /* kill the bus, we can't do anything with it */ 484 /* kill the bus, we can't do anything with it */
485 list_for_each_safe(ln, tmp_ln, &bus->devices) { 485 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
486 struct pci_dev *dev = pci_dev_b(ln);
487
488 list_del(&dev->bus_list); 486 list_del(&dev->bus_list);
489 } 487 }
490 488
@@ -549,7 +547,6 @@ dino_card_fixup(struct pci_dev *dev)
549static void __init 547static void __init
550dino_fixup_bus(struct pci_bus *bus) 548dino_fixup_bus(struct pci_bus *bus)
551{ 549{
552 struct list_head *ln;
553 struct pci_dev *dev; 550 struct pci_dev *dev;
554 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge)); 551 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
555 552
@@ -596,8 +593,7 @@ dino_fixup_bus(struct pci_bus *bus)
596 } 593 }
597 594
598 595
599 list_for_each(ln, &bus->devices) { 596 list_for_each_entry(dev, &bus->devices, bus_list) {
600 dev = pci_dev_b(ln);
601 if (is_card_dino(&dino_dev->hba.dev->id)) 597 if (is_card_dino(&dino_dev->hba.dev->id))
602 dino_card_fixup(dev); 598 dino_card_fixup(dev);
603 599
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index 4f9cf2456f4e..fdd63a6a62d6 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -629,7 +629,7 @@ truncate_pat_collision(struct resource *root, struct resource *new)
629static void 629static void
630lba_fixup_bus(struct pci_bus *bus) 630lba_fixup_bus(struct pci_bus *bus)
631{ 631{
632 struct list_head *ln; 632 struct pci_dev *dev;
633#ifdef FBB_SUPPORT 633#ifdef FBB_SUPPORT
634 u16 status; 634 u16 status;
635#endif 635#endif
@@ -710,9 +710,8 @@ lba_fixup_bus(struct pci_bus *bus)
710 710
711 } 711 }
712 712
713 list_for_each(ln, &bus->devices) { 713 list_for_each_entry(dev, &bus->devices, bus_list) {
714 int i; 714 int i;
715 struct pci_dev *dev = pci_dev_b(ln);
716 715
717 DBG("lba_fixup_bus() %s\n", pci_name(dev)); 716 DBG("lba_fixup_bus() %s\n", pci_name(dev));
718 717
@@ -770,7 +769,7 @@ lba_fixup_bus(struct pci_bus *bus)
770 } 769 }
771 770
772 /* Lastly enable FBB/PERR/SERR on all devices too */ 771 /* Lastly enable FBB/PERR/SERR on all devices too */
773 list_for_each(ln, &bus->devices) { 772 list_for_each_entry(dev, &bus->devices, bus_list) {
774 (void) pci_read_config_word(dev, PCI_COMMAND, &status); 773 (void) pci_read_config_word(dev, PCI_COMMAND, &status);
775 status |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR | fbb_enable; 774 status |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR | fbb_enable;
776 (void) pci_write_config_word(dev, PCI_COMMAND, status); 775 (void) pci_write_config_word(dev, PCI_COMMAND, status);
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 848bfb84c04c..6d51aa68ec7a 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -3,7 +3,6 @@
3# 3#
4config ARCH_SUPPORTS_MSI 4config ARCH_SUPPORTS_MSI
5 bool 5 bool
6 default n
7 6
8config PCI_MSI 7config PCI_MSI
9 bool "Message Signaled Interrupts (MSI and MSI-X)" 8 bool "Message Signaled Interrupts (MSI and MSI-X)"
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index ba91a7e17519..3af0478c057b 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -469,3 +469,205 @@ void pci_cfg_access_unlock(struct pci_dev *dev)
469 raw_spin_unlock_irqrestore(&pci_lock, flags); 469 raw_spin_unlock_irqrestore(&pci_lock, flags);
470} 470}
471EXPORT_SYMBOL_GPL(pci_cfg_access_unlock); 471EXPORT_SYMBOL_GPL(pci_cfg_access_unlock);
472
473static inline int pcie_cap_version(const struct pci_dev *dev)
474{
475 return dev->pcie_flags_reg & PCI_EXP_FLAGS_VERS;
476}
477
478static inline bool pcie_cap_has_devctl(const struct pci_dev *dev)
479{
480 return true;
481}
482
483static inline bool pcie_cap_has_lnkctl(const struct pci_dev *dev)
484{
485 int type = pci_pcie_type(dev);
486
487 return pcie_cap_version(dev) > 1 ||
488 type == PCI_EXP_TYPE_ROOT_PORT ||
489 type == PCI_EXP_TYPE_ENDPOINT ||
490 type == PCI_EXP_TYPE_LEG_END;
491}
492
493static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev)
494{
495 int type = pci_pcie_type(dev);
496
497 return pcie_cap_version(dev) > 1 ||
498 type == PCI_EXP_TYPE_ROOT_PORT ||
499 (type == PCI_EXP_TYPE_DOWNSTREAM &&
500 dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT);
501}
502
503static inline bool pcie_cap_has_rtctl(const struct pci_dev *dev)
504{
505 int type = pci_pcie_type(dev);
506
507 return pcie_cap_version(dev) > 1 ||
508 type == PCI_EXP_TYPE_ROOT_PORT ||
509 type == PCI_EXP_TYPE_RC_EC;
510}
511
512static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos)
513{
514 if (!pci_is_pcie(dev))
515 return false;
516
517 switch (pos) {
518 case PCI_EXP_FLAGS_TYPE:
519 return true;
520 case PCI_EXP_DEVCAP:
521 case PCI_EXP_DEVCTL:
522 case PCI_EXP_DEVSTA:
523 return pcie_cap_has_devctl(dev);
524 case PCI_EXP_LNKCAP:
525 case PCI_EXP_LNKCTL:
526 case PCI_EXP_LNKSTA:
527 return pcie_cap_has_lnkctl(dev);
528 case PCI_EXP_SLTCAP:
529 case PCI_EXP_SLTCTL:
530 case PCI_EXP_SLTSTA:
531 return pcie_cap_has_sltctl(dev);
532 case PCI_EXP_RTCTL:
533 case PCI_EXP_RTCAP:
534 case PCI_EXP_RTSTA:
535 return pcie_cap_has_rtctl(dev);
536 case PCI_EXP_DEVCAP2:
537 case PCI_EXP_DEVCTL2:
538 case PCI_EXP_LNKCAP2:
539 case PCI_EXP_LNKCTL2:
540 case PCI_EXP_LNKSTA2:
541 return pcie_cap_version(dev) > 1;
542 default:
543 return false;
544 }
545}
546
547/*
548 * Note that these accessor functions are only for the "PCI Express
549 * Capability" (see PCIe spec r3.0, sec 7.8). They do not apply to the
550 * other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.)
551 */
552int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val)
553{
554 int ret;
555
556 *val = 0;
557 if (pos & 1)
558 return -EINVAL;
559
560 if (pcie_capability_reg_implemented(dev, pos)) {
561 ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val);
562 /*
563 * Reset *val to 0 if pci_read_config_word() fails, it may
564 * have been written as 0xFFFF if hardware error happens
565 * during pci_read_config_word().
566 */
567 if (ret)
568 *val = 0;
569 return ret;
570 }
571
572 /*
573 * For Functions that do not implement the Slot Capabilities,
574 * Slot Status, and Slot Control registers, these spaces must
575 * be hardwired to 0b, with the exception of the Presence Detect
576 * State bit in the Slot Status register of Downstream Ports,
577 * which must be hardwired to 1b. (PCIe Base Spec 3.0, sec 7.8)
578 */
579 if (pci_is_pcie(dev) && pos == PCI_EXP_SLTSTA &&
580 pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) {
581 *val = PCI_EXP_SLTSTA_PDS;
582 }
583
584 return 0;
585}
586EXPORT_SYMBOL(pcie_capability_read_word);
587
588int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val)
589{
590 int ret;
591
592 *val = 0;
593 if (pos & 3)
594 return -EINVAL;
595
596 if (pcie_capability_reg_implemented(dev, pos)) {
597 ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
598 /*
599 * Reset *val to 0 if pci_read_config_dword() fails, it may
600 * have been written as 0xFFFFFFFF if hardware error happens
601 * during pci_read_config_dword().
602 */
603 if (ret)
604 *val = 0;
605 return ret;
606 }
607
608 if (pci_is_pcie(dev) && pos == PCI_EXP_SLTCTL &&
609 pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) {
610 *val = PCI_EXP_SLTSTA_PDS;
611 }
612
613 return 0;
614}
615EXPORT_SYMBOL(pcie_capability_read_dword);
616
617int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
618{
619 if (pos & 1)
620 return -EINVAL;
621
622 if (!pcie_capability_reg_implemented(dev, pos))
623 return 0;
624
625 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val);
626}
627EXPORT_SYMBOL(pcie_capability_write_word);
628
629int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val)
630{
631 if (pos & 3)
632 return -EINVAL;
633
634 if (!pcie_capability_reg_implemented(dev, pos))
635 return 0;
636
637 return pci_write_config_dword(dev, pci_pcie_cap(dev) + pos, val);
638}
639EXPORT_SYMBOL(pcie_capability_write_dword);
640
641int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
642 u16 clear, u16 set)
643{
644 int ret;
645 u16 val;
646
647 ret = pcie_capability_read_word(dev, pos, &val);
648 if (!ret) {
649 val &= ~clear;
650 val |= set;
651 ret = pcie_capability_write_word(dev, pos, val);
652 }
653
654 return ret;
655}
656EXPORT_SYMBOL(pcie_capability_clear_and_set_word);
657
658int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
659 u32 clear, u32 set)
660{
661 int ret;
662 u32 val;
663
664 ret = pcie_capability_read_dword(dev, pos, &val);
665 if (!ret) {
666 val &= ~clear;
667 val |= set;
668 ret = pcie_capability_write_dword(dev, pos, val);
669 }
670
671 return ret;
672}
673EXPORT_SYMBOL(pcie_capability_clear_and_set_dword);
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 4b0970b46e0b..6241fd05bd41 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -87,11 +87,15 @@ EXPORT_SYMBOL_GPL(pci_bus_resource_n);
87void pci_bus_remove_resources(struct pci_bus *bus) 87void pci_bus_remove_resources(struct pci_bus *bus)
88{ 88{
89 int i; 89 int i;
90 struct pci_bus_resource *bus_res, *tmp;
90 91
91 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) 92 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
92 bus->resource[i] = NULL; 93 bus->resource[i] = NULL;
93 94
94 pci_free_resource_list(&bus->resources); 95 list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
96 list_del(&bus_res->list);
97 kfree(bus_res);
98 }
95} 99}
96 100
97/** 101/**
diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
index 66f29bc00be4..b0e46dede1a9 100644
--- a/drivers/pci/hotplug/Kconfig
+++ b/drivers/pci/hotplug/Kconfig
@@ -17,28 +17,6 @@ menuconfig HOTPLUG_PCI
17 17
18if HOTPLUG_PCI 18if HOTPLUG_PCI
19 19
20config HOTPLUG_PCI_FAKE
21 tristate "Fake PCI Hotplug driver"
22 help
23 Say Y here if you want to use the fake PCI hotplug driver. It can
24 be used to simulate PCI hotplug events if even if your system is
25 not PCI hotplug capable.
26
27 This driver will "emulate" removing PCI devices from the system.
28 If the "power" file is written to with "0" then the specified PCI
29 device will be completely removed from the kernel.
30
31 WARNING, this does NOT turn off the power to the PCI device.
32 This is a "logical" removal, not a physical or electrical
33 removal.
34
35 Use this module at your own risk. You have been warned!
36
37 To compile this driver as a module, choose M here: the
38 module will be called fakephp.
39
40 When in doubt, say N.
41
42config HOTPLUG_PCI_COMPAQ 20config HOTPLUG_PCI_COMPAQ
43 tristate "Compaq PCI Hotplug driver" 21 tristate "Compaq PCI Hotplug driver"
44 depends on X86 && PCI_BIOS 22 depends on X86 && PCI_BIOS
@@ -143,7 +121,7 @@ config HOTPLUG_PCI_SHPC
143 121
144config HOTPLUG_PCI_RPA 122config HOTPLUG_PCI_RPA
145 tristate "RPA PCI Hotplug driver" 123 tristate "RPA PCI Hotplug driver"
146 depends on PPC_PSERIES && EEH && !HOTPLUG_PCI_FAKE 124 depends on PPC_PSERIES && EEH
147 help 125 help
148 Say Y here if you have a RPA system that supports PCI Hotplug. 126 Say Y here if you have a RPA system that supports PCI Hotplug.
149 127
diff --git a/drivers/pci/hotplug/Makefile b/drivers/pci/hotplug/Makefile
index 6cd9f3c9887d..c459cd4e39c2 100644
--- a/drivers/pci/hotplug/Makefile
+++ b/drivers/pci/hotplug/Makefile
@@ -23,9 +23,6 @@ obj-$(CONFIG_HOTPLUG_PCI_ACPI) += acpiphp.o
23 23
24obj-$(CONFIG_HOTPLUG_PCI_ACPI_IBM) += acpiphp_ibm.o 24obj-$(CONFIG_HOTPLUG_PCI_ACPI_IBM) += acpiphp_ibm.o
25 25
26# Link this last so it doesn't claim devices that have a real hotplug driver
27obj-$(CONFIG_HOTPLUG_PCI_FAKE) += fakephp.o
28
29pci_hotplug-objs := pci_hotplug_core.o pcihp_slot.o 26pci_hotplug-objs := pci_hotplug_core.o pcihp_slot.o
30 27
31ifdef CONFIG_HOTPLUG_PCI_CPCI 28ifdef CONFIG_HOTPLUG_PCI_CPCI
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index ad6fd6695495..3d6d4fd1e3c5 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -115,6 +115,35 @@ static const struct acpi_dock_ops acpiphp_dock_ops = {
115 .handler = handle_hotplug_event_func, 115 .handler = handle_hotplug_event_func,
116}; 116};
117 117
118/* Check whether the PCI device is managed by native PCIe hotplug driver */
119static bool device_is_managed_by_native_pciehp(struct pci_dev *pdev)
120{
121 u32 reg32;
122 acpi_handle tmp;
123 struct acpi_pci_root *root;
124
125 /* Check whether the PCIe port supports native PCIe hotplug */
126 if (pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32))
127 return false;
128 if (!(reg32 & PCI_EXP_SLTCAP_HPC))
129 return false;
130
131 /*
132 * Check whether native PCIe hotplug has been enabled for
133 * this PCIe hierarchy.
134 */
135 tmp = acpi_find_root_bridge_handle(pdev);
136 if (!tmp)
137 return false;
138 root = acpi_pci_find_root(tmp);
139 if (!root)
140 return false;
141 if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
142 return false;
143
144 return true;
145}
146
118/* callback routine to register each ACPI PCI slot object */ 147/* callback routine to register each ACPI PCI slot object */
119static acpi_status 148static acpi_status
120register_slot(acpi_handle handle, u32 lvl, void *context, void **rv) 149register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
@@ -142,16 +171,8 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
142 function = adr & 0xffff; 171 function = adr & 0xffff;
143 172
144 pdev = pbus->self; 173 pdev = pbus->self;
145 if (pdev && pci_is_pcie(pdev)) { 174 if (pdev && device_is_managed_by_native_pciehp(pdev))
146 tmp = acpi_find_root_bridge_handle(pdev); 175 return AE_OK;
147 if (tmp) {
148 struct acpi_pci_root *root = acpi_pci_find_root(tmp);
149
150 if (root && (root->osc_control_set &
151 OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
152 return AE_OK;
153 }
154 }
155 176
156 newfunc = kzalloc(sizeof(struct acpiphp_func), GFP_KERNEL); 177 newfunc = kzalloc(sizeof(struct acpiphp_func), GFP_KERNEL);
157 if (!newfunc) 178 if (!newfunc)
@@ -382,10 +403,10 @@ static inline void config_p2p_bridge_flags(struct acpiphp_bridge *bridge)
382 403
383 404
384/* allocate and initialize host bridge data structure */ 405/* allocate and initialize host bridge data structure */
385static void add_host_bridge(acpi_handle *handle) 406static void add_host_bridge(struct acpi_pci_root *root)
386{ 407{
387 struct acpiphp_bridge *bridge; 408 struct acpiphp_bridge *bridge;
388 struct acpi_pci_root *root = acpi_pci_find_root(handle); 409 acpi_handle handle = root->device->handle;
389 410
390 bridge = kzalloc(sizeof(struct acpiphp_bridge), GFP_KERNEL); 411 bridge = kzalloc(sizeof(struct acpiphp_bridge), GFP_KERNEL);
391 if (bridge == NULL) 412 if (bridge == NULL)
@@ -468,11 +489,12 @@ find_p2p_bridge(acpi_handle handle, u32 lvl, void *context, void **rv)
468 489
469 490
470/* find hot-pluggable slots, and then find P2P bridge */ 491/* find hot-pluggable slots, and then find P2P bridge */
471static int add_bridge(acpi_handle handle) 492static int add_bridge(struct acpi_pci_root *root)
472{ 493{
473 acpi_status status; 494 acpi_status status;
474 unsigned long long tmp; 495 unsigned long long tmp;
475 acpi_handle dummy_handle; 496 acpi_handle dummy_handle;
497 acpi_handle handle = root->device->handle;
476 498
477 /* if the bridge doesn't have _STA, we assume it is always there */ 499 /* if the bridge doesn't have _STA, we assume it is always there */
478 status = acpi_get_handle(handle, "_STA", &dummy_handle); 500 status = acpi_get_handle(handle, "_STA", &dummy_handle);
@@ -490,7 +512,7 @@ static int add_bridge(acpi_handle handle)
490 /* check if this bridge has ejectable slots */ 512 /* check if this bridge has ejectable slots */
491 if (detect_ejectable_slots(handle) > 0) { 513 if (detect_ejectable_slots(handle) > 0) {
492 dbg("found PCI host-bus bridge with hot-pluggable slots\n"); 514 dbg("found PCI host-bus bridge with hot-pluggable slots\n");
493 add_host_bridge(handle); 515 add_host_bridge(root);
494 } 516 }
495 517
496 /* search P2P bridges under this host bridge */ 518 /* search P2P bridges under this host bridge */
@@ -588,9 +610,10 @@ cleanup_p2p_bridge(acpi_handle handle, u32 lvl, void *context, void **rv)
588 return AE_OK; 610 return AE_OK;
589} 611}
590 612
591static void remove_bridge(acpi_handle handle) 613static void remove_bridge(struct acpi_pci_root *root)
592{ 614{
593 struct acpiphp_bridge *bridge; 615 struct acpiphp_bridge *bridge;
616 acpi_handle handle = root->device->handle;
594 617
595 /* cleanup p2p bridges under this host bridge 618 /* cleanup p2p bridges under this host bridge
596 in a depth-first manner */ 619 in a depth-first manner */
@@ -869,17 +892,6 @@ static int __ref enable_device(struct acpiphp_slot *slot)
869 return retval; 892 return retval;
870} 893}
871 894
872static void disable_bridges(struct pci_bus *bus)
873{
874 struct pci_dev *dev;
875 list_for_each_entry(dev, &bus->devices, bus_list) {
876 if (dev->subordinate) {
877 disable_bridges(dev->subordinate);
878 pci_disable_device(dev);
879 }
880 }
881}
882
883/* return first device in slot, acquiring a reference on it */ 895/* return first device in slot, acquiring a reference on it */
884static struct pci_dev *dev_in_slot(struct acpiphp_slot *slot) 896static struct pci_dev *dev_in_slot(struct acpiphp_slot *slot)
885{ 897{
@@ -931,12 +943,7 @@ static int disable_device(struct acpiphp_slot *slot)
931 * here. 943 * here.
932 */ 944 */
933 while ((pdev = dev_in_slot(slot))) { 945 while ((pdev = dev_in_slot(slot))) {
934 pci_stop_bus_device(pdev); 946 pci_stop_and_remove_bus_device(pdev);
935 if (pdev->subordinate) {
936 disable_bridges(pdev->subordinate);
937 pci_disable_device(pdev);
938 }
939 __pci_remove_bus_device(pdev);
940 pci_dev_put(pdev); 947 pci_dev_put(pdev);
941 } 948 }
942 949
@@ -1477,34 +1484,6 @@ int __init acpiphp_get_num_slots(void)
1477} 1484}
1478 1485
1479 1486
1480#if 0
1481/**
1482 * acpiphp_for_each_slot - call function for each slot
1483 * @fn: callback function
1484 * @data: context to be passed to callback function
1485 */
1486static int acpiphp_for_each_slot(acpiphp_callback fn, void *data)
1487{
1488 struct list_head *node;
1489 struct acpiphp_bridge *bridge;
1490 struct acpiphp_slot *slot;
1491 int retval = 0;
1492
1493 list_for_each (node, &bridge_list) {
1494 bridge = (struct acpiphp_bridge *)node;
1495 for (slot = bridge->slots; slot; slot = slot->next) {
1496 retval = fn(slot, data);
1497 if (!retval)
1498 goto err_exit;
1499 }
1500 }
1501
1502 err_exit:
1503 return retval;
1504}
1505#endif
1506
1507
1508/** 1487/**
1509 * acpiphp_enable_slot - power on slot 1488 * acpiphp_enable_slot - power on slot
1510 * @slot: ACPI PHP slot 1489 * @slot: ACPI PHP slot
diff --git a/drivers/pci/hotplug/cpcihp_generic.c b/drivers/pci/hotplug/cpcihp_generic.c
index 81af764c629b..a6a71c41cdf8 100644
--- a/drivers/pci/hotplug/cpcihp_generic.c
+++ b/drivers/pci/hotplug/cpcihp_generic.c
@@ -154,12 +154,8 @@ static int __init cpcihp_generic_init(void)
154 if(!r) 154 if(!r)
155 return -EBUSY; 155 return -EBUSY;
156 156
157 bus = pci_find_bus(0, bridge_busnr); 157 dev = pci_get_domain_bus_and_slot(0, bridge_busnr,
158 if (!bus) { 158 PCI_DEVFN(bridge_slot, 0));
159 err("Invalid bus number %d", bridge_busnr);
160 return -EINVAL;
161 }
162 dev = pci_get_slot(bus, PCI_DEVFN(bridge_slot, 0));
163 if(!dev || dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) { 159 if(!dev || dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
164 err("Invalid bridge device %s", bridge); 160 err("Invalid bridge device %s", bridge);
165 pci_dev_put(dev); 161 pci_dev_put(dev);
diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c
index e43908d9b5df..36112fe212d3 100644
--- a/drivers/pci/hotplug/cpqphp_ctrl.c
+++ b/drivers/pci/hotplug/cpqphp_ctrl.c
@@ -2890,27 +2890,8 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
2890 func->mem_head = mem_node; 2890 func->mem_head = mem_node;
2891 } else 2891 } else
2892 return -ENOMEM; 2892 return -ENOMEM;
2893 } else if ((temp_register & 0x0BL) == 0x04) {
2894 /* Map memory */
2895 base = temp_register & 0xFFFFFFF0;
2896 base = ~base + 1;
2897
2898 dbg("CND: length = 0x%x\n", base);
2899 mem_node = get_resource(&(resources->mem_head), base);
2900
2901 /* allocate the resource to the board */
2902 if (mem_node) {
2903 base = mem_node->base;
2904
2905 mem_node->next = func->mem_head;
2906 func->mem_head = mem_node;
2907 } else
2908 return -ENOMEM;
2909 } else if ((temp_register & 0x0BL) == 0x06) {
2910 /* Those bits are reserved, we can't handle this */
2911 return 1;
2912 } else { 2893 } else {
2913 /* Requesting space below 1M */ 2894 /* Reserved bits or requesting space below 1M */
2914 return NOT_ENOUGH_RESOURCES; 2895 return NOT_ENOUGH_RESOURCES;
2915 } 2896 }
2916 2897
diff --git a/drivers/pci/hotplug/fakephp.c b/drivers/pci/hotplug/fakephp.c
deleted file mode 100644
index a019c9a712be..000000000000
--- a/drivers/pci/hotplug/fakephp.c
+++ /dev/null
@@ -1,164 +0,0 @@
1/* Works like the fakephp driver used to, except a little better.
2 *
3 * - It's possible to remove devices with subordinate busses.
4 * - New PCI devices that appear via any method, not just a fakephp triggered
5 * rescan, will be noticed.
6 * - Devices that are removed via any method, not just a fakephp triggered
7 * removal, will also be noticed.
8 *
9 * Uses nothing from the pci-hotplug subsystem.
10 *
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/list.h>
17#include <linux/kobject.h>
18#include <linux/sysfs.h>
19#include <linux/init.h>
20#include <linux/pci.h>
21#include <linux/device.h>
22#include <linux/slab.h>
23#include "../pci.h"
24
25struct legacy_slot {
26 struct kobject kobj;
27 struct pci_dev *dev;
28 struct list_head list;
29};
30
31static LIST_HEAD(legacy_list);
32
33static ssize_t legacy_show(struct kobject *kobj, struct attribute *attr,
34 char *buf)
35{
36 struct legacy_slot *slot = container_of(kobj, typeof(*slot), kobj);
37 strcpy(buf, "1\n");
38 return 2;
39}
40
41static void remove_callback(void *data)
42{
43 pci_stop_and_remove_bus_device((struct pci_dev *)data);
44}
45
46static ssize_t legacy_store(struct kobject *kobj, struct attribute *attr,
47 const char *buf, size_t len)
48{
49 struct legacy_slot *slot = container_of(kobj, typeof(*slot), kobj);
50 unsigned long val;
51
52 if (strict_strtoul(buf, 0, &val) < 0)
53 return -EINVAL;
54
55 if (val)
56 pci_rescan_bus(slot->dev->bus);
57 else
58 sysfs_schedule_callback(&slot->dev->dev.kobj, remove_callback,
59 slot->dev, THIS_MODULE);
60 return len;
61}
62
63static struct attribute *legacy_attrs[] = {
64 &(struct attribute){ .name = "power", .mode = 0644 },
65 NULL,
66};
67
68static void legacy_release(struct kobject *kobj)
69{
70 struct legacy_slot *slot = container_of(kobj, typeof(*slot), kobj);
71
72 pci_dev_put(slot->dev);
73 kfree(slot);
74}
75
76static struct kobj_type legacy_ktype = {
77 .sysfs_ops = &(const struct sysfs_ops){
78 .store = legacy_store, .show = legacy_show
79 },
80 .release = &legacy_release,
81 .default_attrs = legacy_attrs,
82};
83
84static int legacy_add_slot(struct pci_dev *pdev)
85{
86 struct legacy_slot *slot = kzalloc(sizeof(*slot), GFP_KERNEL);
87
88 if (!slot)
89 return -ENOMEM;
90
91 if (kobject_init_and_add(&slot->kobj, &legacy_ktype,
92 &pci_slots_kset->kobj, "%s",
93 dev_name(&pdev->dev))) {
94 dev_warn(&pdev->dev, "Failed to created legacy fake slot\n");
95 return -EINVAL;
96 }
97 slot->dev = pci_dev_get(pdev);
98
99 list_add(&slot->list, &legacy_list);
100
101 return 0;
102}
103
104static int legacy_notify(struct notifier_block *nb,
105 unsigned long action, void *data)
106{
107 struct pci_dev *pdev = to_pci_dev(data);
108
109 if (action == BUS_NOTIFY_ADD_DEVICE) {
110 legacy_add_slot(pdev);
111 } else if (action == BUS_NOTIFY_DEL_DEVICE) {
112 struct legacy_slot *slot;
113
114 list_for_each_entry(slot, &legacy_list, list)
115 if (slot->dev == pdev)
116 goto found;
117
118 dev_warn(&pdev->dev, "Missing legacy fake slot?");
119 return -ENODEV;
120found:
121 kobject_del(&slot->kobj);
122 list_del(&slot->list);
123 kobject_put(&slot->kobj);
124 }
125
126 return 0;
127}
128
129static struct notifier_block legacy_notifier = {
130 .notifier_call = legacy_notify
131};
132
133static int __init init_legacy(void)
134{
135 struct pci_dev *pdev = NULL;
136
137 /* Add existing devices */
138 for_each_pci_dev(pdev)
139 legacy_add_slot(pdev);
140
141 /* Be alerted of any new ones */
142 bus_register_notifier(&pci_bus_type, &legacy_notifier);
143 return 0;
144}
145module_init(init_legacy);
146
147static void __exit remove_legacy(void)
148{
149 struct legacy_slot *slot, *tmp;
150
151 bus_unregister_notifier(&pci_bus_type, &legacy_notifier);
152
153 list_for_each_entry_safe(slot, tmp, &legacy_list, list) {
154 list_del(&slot->list);
155 kobject_del(&slot->kobj);
156 kobject_put(&slot->kobj);
157 }
158}
159module_exit(remove_legacy);
160
161
162MODULE_AUTHOR("Trent Piepho <xyzzy@speakeasy.org>");
163MODULE_DESCRIPTION("Legacy version of the fakephp interface");
164MODULE_LICENSE("GPL");
diff --git a/drivers/pci/hotplug/pciehp_acpi.c b/drivers/pci/hotplug/pciehp_acpi.c
index 376d70d17176..24d709b7388c 100644
--- a/drivers/pci/hotplug/pciehp_acpi.c
+++ b/drivers/pci/hotplug/pciehp_acpi.c
@@ -81,16 +81,12 @@ static struct list_head __initdata dummy_slots = LIST_HEAD_INIT(dummy_slots);
81/* Dummy driver for dumplicate name detection */ 81/* Dummy driver for dumplicate name detection */
82static int __init dummy_probe(struct pcie_device *dev) 82static int __init dummy_probe(struct pcie_device *dev)
83{ 83{
84 int pos;
85 u32 slot_cap; 84 u32 slot_cap;
86 acpi_handle handle; 85 acpi_handle handle;
87 struct dummy_slot *slot, *tmp; 86 struct dummy_slot *slot, *tmp;
88 struct pci_dev *pdev = dev->port; 87 struct pci_dev *pdev = dev->port;
89 88
90 pos = pci_pcie_cap(pdev); 89 pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap);
91 if (!pos)
92 return -ENODEV;
93 pci_read_config_dword(pdev, pos + PCI_EXP_SLTCAP, &slot_cap);
94 slot = kzalloc(sizeof(*slot), GFP_KERNEL); 90 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
95 if (!slot) 91 if (!slot)
96 return -ENOMEM; 92 return -ENOMEM;
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 365c6b96c642..916bf4f53aba 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -300,24 +300,24 @@ static int pciehp_suspend (struct pcie_device *dev)
300 300
301static int pciehp_resume (struct pcie_device *dev) 301static int pciehp_resume (struct pcie_device *dev)
302{ 302{
303 struct controller *ctrl;
304 struct slot *slot;
305 u8 status;
306
303 dev_info(&dev->device, "%s ENTRY\n", __func__); 307 dev_info(&dev->device, "%s ENTRY\n", __func__);
304 if (pciehp_force) { 308 ctrl = get_service_data(dev);
305 struct controller *ctrl = get_service_data(dev);
306 struct slot *slot;
307 u8 status;
308 309
309 /* reinitialize the chipset's event detection logic */ 310 /* reinitialize the chipset's event detection logic */
310 pcie_enable_notification(ctrl); 311 pcie_enable_notification(ctrl);
311 312
312 slot = ctrl->slot; 313 slot = ctrl->slot;
313 314
314 /* Check if slot is occupied */ 315 /* Check if slot is occupied */
315 pciehp_get_adapter_status(slot, &status); 316 pciehp_get_adapter_status(slot, &status);
316 if (status) 317 if (status)
317 pciehp_enable_slot(slot); 318 pciehp_enable_slot(slot);
318 else 319 else
319 pciehp_disable_slot(slot); 320 pciehp_disable_slot(slot);
320 }
321 return 0; 321 return 0;
322} 322}
323#endif /* PM */ 323#endif /* PM */
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 302451e8289d..13b2eaf7ba43 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -44,25 +44,25 @@
44static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value) 44static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value)
45{ 45{
46 struct pci_dev *dev = ctrl->pcie->port; 46 struct pci_dev *dev = ctrl->pcie->port;
47 return pci_read_config_word(dev, pci_pcie_cap(dev) + reg, value); 47 return pcie_capability_read_word(dev, reg, value);
48} 48}
49 49
50static inline int pciehp_readl(struct controller *ctrl, int reg, u32 *value) 50static inline int pciehp_readl(struct controller *ctrl, int reg, u32 *value)
51{ 51{
52 struct pci_dev *dev = ctrl->pcie->port; 52 struct pci_dev *dev = ctrl->pcie->port;
53 return pci_read_config_dword(dev, pci_pcie_cap(dev) + reg, value); 53 return pcie_capability_read_dword(dev, reg, value);
54} 54}
55 55
56static inline int pciehp_writew(struct controller *ctrl, int reg, u16 value) 56static inline int pciehp_writew(struct controller *ctrl, int reg, u16 value)
57{ 57{
58 struct pci_dev *dev = ctrl->pcie->port; 58 struct pci_dev *dev = ctrl->pcie->port;
59 return pci_write_config_word(dev, pci_pcie_cap(dev) + reg, value); 59 return pcie_capability_write_word(dev, reg, value);
60} 60}
61 61
62static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) 62static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
63{ 63{
64 struct pci_dev *dev = ctrl->pcie->port; 64 struct pci_dev *dev = ctrl->pcie->port;
65 return pci_write_config_dword(dev, pci_pcie_cap(dev) + reg, value); 65 return pcie_capability_write_dword(dev, reg, value);
66} 66}
67 67
68/* Power Control Command */ 68/* Power Control Command */
@@ -855,10 +855,6 @@ struct controller *pcie_init(struct pcie_device *dev)
855 goto abort; 855 goto abort;
856 } 856 }
857 ctrl->pcie = dev; 857 ctrl->pcie = dev;
858 if (!pci_pcie_cap(pdev)) {
859 ctrl_err(ctrl, "Cannot find PCI Express capability\n");
860 goto abort_ctrl;
861 }
862 if (pciehp_readl(ctrl, PCI_EXP_SLTCAP, &slot_cap)) { 858 if (pciehp_readl(ctrl, PCI_EXP_SLTCAP, &slot_cap)) {
863 ctrl_err(ctrl, "Cannot read SLOTCAP register\n"); 859 ctrl_err(ctrl, "Cannot read SLOTCAP register\n");
864 goto abort_ctrl; 860 goto abort_ctrl;
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
index 8c05a18c9770..fec2d5b75440 100644
--- a/drivers/pci/hotplug/pcihp_slot.c
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -96,17 +96,11 @@ static void program_hpp_type1(struct pci_dev *dev, struct hpp_type1 *hpp)
96static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp) 96static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
97{ 97{
98 int pos; 98 int pos;
99 u16 reg16;
100 u32 reg32; 99 u32 reg32;
101 100
102 if (!hpp) 101 if (!hpp)
103 return; 102 return;
104 103
105 /* Find PCI Express capability */
106 pos = pci_pcie_cap(dev);
107 if (!pos)
108 return;
109
110 if (hpp->revision > 1) { 104 if (hpp->revision > 1) {
111 dev_warn(&dev->dev, "PCIe settings rev %d not supported\n", 105 dev_warn(&dev->dev, "PCIe settings rev %d not supported\n",
112 hpp->revision); 106 hpp->revision);
@@ -114,17 +108,13 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
114 } 108 }
115 109
116 /* Initialize Device Control Register */ 110 /* Initialize Device Control Register */
117 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16); 111 pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
118 reg16 = (reg16 & hpp->pci_exp_devctl_and) | hpp->pci_exp_devctl_or; 112 ~hpp->pci_exp_devctl_and, hpp->pci_exp_devctl_or);
119 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
120 113
121 /* Initialize Link Control Register */ 114 /* Initialize Link Control Register */
122 if (dev->subordinate) { 115 if (dev->subordinate)
123 pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &reg16); 116 pcie_capability_clear_and_set_word(dev, PCI_EXP_LNKCTL,
124 reg16 = (reg16 & hpp->pci_exp_lnkctl_and) 117 ~hpp->pci_exp_lnkctl_and, hpp->pci_exp_lnkctl_or);
125 | hpp->pci_exp_lnkctl_or;
126 pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, reg16);
127 }
128 118
129 /* Find Advanced Error Reporting Enhanced Capability */ 119 /* Find Advanced Error Reporting Enhanced Capability */
130 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); 120 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 74bbaf82638d..aeccc911abb8 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -433,8 +433,8 @@ static int sriov_init(struct pci_dev *dev, int pos)
433 struct resource *res; 433 struct resource *res;
434 struct pci_dev *pdev; 434 struct pci_dev *pdev;
435 435
436 if (dev->pcie_type != PCI_EXP_TYPE_RC_END && 436 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
437 dev->pcie_type != PCI_EXP_TYPE_ENDPOINT) 437 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
438 return -ENODEV; 438 return -ENODEV;
439 439
440 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); 440 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
@@ -503,7 +503,7 @@ found:
503 iov->self = dev; 503 iov->self = dev;
504 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); 504 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
505 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); 505 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
506 if (dev->pcie_type == PCI_EXP_TYPE_RC_END) 506 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
507 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); 507 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
508 508
509 if (pdev) 509 if (pdev)
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index d6fd6b6d9d4b..9e1d2959e226 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -139,7 +139,6 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count)
139 return retval; 139 return retval;
140 return count; 140 return count;
141} 141}
142static DRIVER_ATTR(new_id, S_IWUSR, NULL, store_new_id);
143 142
144/** 143/**
145 * store_remove_id - remove a PCI device ID from this driver 144 * store_remove_id - remove a PCI device ID from this driver
@@ -185,38 +184,16 @@ store_remove_id(struct device_driver *driver, const char *buf, size_t count)
185 return retval; 184 return retval;
186 return count; 185 return count;
187} 186}
188static DRIVER_ATTR(remove_id, S_IWUSR, NULL, store_remove_id);
189 187
190static int 188static struct driver_attribute pci_drv_attrs[] = {
191pci_create_newid_files(struct pci_driver *drv) 189 __ATTR(new_id, S_IWUSR, NULL, store_new_id),
192{ 190 __ATTR(remove_id, S_IWUSR, NULL, store_remove_id),
193 int error = 0; 191 __ATTR_NULL,
192};
194 193
195 if (drv->probe != NULL) { 194#else
196 error = driver_create_file(&drv->driver, &driver_attr_new_id); 195#define pci_drv_attrs NULL
197 if (error == 0) { 196#endif /* CONFIG_HOTPLUG */
198 error = driver_create_file(&drv->driver,
199 &driver_attr_remove_id);
200 if (error)
201 driver_remove_file(&drv->driver,
202 &driver_attr_new_id);
203 }
204 }
205 return error;
206}
207
208static void pci_remove_newid_files(struct pci_driver *drv)
209{
210 driver_remove_file(&drv->driver, &driver_attr_remove_id);
211 driver_remove_file(&drv->driver, &driver_attr_new_id);
212}
213#else /* !CONFIG_HOTPLUG */
214static inline int pci_create_newid_files(struct pci_driver *drv)
215{
216 return 0;
217}
218static inline void pci_remove_newid_files(struct pci_driver *drv) {}
219#endif
220 197
221/** 198/**
222 * pci_match_id - See if a pci device matches a given pci_id table 199 * pci_match_id - See if a pci device matches a given pci_id table
@@ -1162,8 +1139,6 @@ const struct dev_pm_ops pci_dev_pm_ops = {
1162int __pci_register_driver(struct pci_driver *drv, struct module *owner, 1139int __pci_register_driver(struct pci_driver *drv, struct module *owner,
1163 const char *mod_name) 1140 const char *mod_name)
1164{ 1141{
1165 int error;
1166
1167 /* initialize common driver fields */ 1142 /* initialize common driver fields */
1168 drv->driver.name = drv->name; 1143 drv->driver.name = drv->name;
1169 drv->driver.bus = &pci_bus_type; 1144 drv->driver.bus = &pci_bus_type;
@@ -1174,19 +1149,7 @@ int __pci_register_driver(struct pci_driver *drv, struct module *owner,
1174 INIT_LIST_HEAD(&drv->dynids.list); 1149 INIT_LIST_HEAD(&drv->dynids.list);
1175 1150
1176 /* register with core */ 1151 /* register with core */
1177 error = driver_register(&drv->driver); 1152 return driver_register(&drv->driver);
1178 if (error)
1179 goto out;
1180
1181 error = pci_create_newid_files(drv);
1182 if (error)
1183 goto out_newid;
1184out:
1185 return error;
1186
1187out_newid:
1188 driver_unregister(&drv->driver);
1189 goto out;
1190} 1153}
1191 1154
1192/** 1155/**
@@ -1202,7 +1165,6 @@ out_newid:
1202void 1165void
1203pci_unregister_driver(struct pci_driver *drv) 1166pci_unregister_driver(struct pci_driver *drv)
1204{ 1167{
1205 pci_remove_newid_files(drv);
1206 driver_unregister(&drv->driver); 1168 driver_unregister(&drv->driver);
1207 pci_free_dynids(drv); 1169 pci_free_dynids(drv);
1208} 1170}
@@ -1302,6 +1264,7 @@ struct bus_type pci_bus_type = {
1302 .shutdown = pci_device_shutdown, 1264 .shutdown = pci_device_shutdown,
1303 .dev_attrs = pci_dev_attrs, 1265 .dev_attrs = pci_dev_attrs,
1304 .bus_attrs = pci_bus_attrs, 1266 .bus_attrs = pci_bus_attrs,
1267 .drv_attrs = pci_drv_attrs,
1305 .pm = PCI_PM_OPS_PTR, 1268 .pm = PCI_PM_OPS_PTR,
1306}; 1269};
1307 1270
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index ab4bf5a4c2f1..54858838f098 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -254,52 +254,17 @@ int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
254} 254}
255 255
256/** 256/**
257 * pci_pcie_cap2 - query for devices' PCI_CAP_ID_EXP v2 capability structure 257 * pci_find_next_ext_capability - Find an extended capability
258 * @dev: PCI device to check
259 *
260 * Like pci_pcie_cap() but also checks that the PCIe capability version is
261 * >= 2. Note that v1 capability structures could be sparse in that not
262 * all register fields were required. v2 requires the entire structure to
263 * be present size wise, while still allowing for non-implemented registers
264 * to exist but they must be hardwired to 0.
265 *
266 * Due to the differences in the versions of capability structures, one
267 * must be careful not to try and access non-existant registers that may
268 * exist in early versions - v1 - of Express devices.
269 *
270 * Returns the offset of the PCIe capability structure as long as the
271 * capability version is >= 2; otherwise 0 is returned.
272 */
273static int pci_pcie_cap2(struct pci_dev *dev)
274{
275 u16 flags;
276 int pos;
277
278 pos = pci_pcie_cap(dev);
279 if (pos) {
280 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
281 if ((flags & PCI_EXP_FLAGS_VERS) < 2)
282 pos = 0;
283 }
284
285 return pos;
286}
287
288/**
289 * pci_find_ext_capability - Find an extended capability
290 * @dev: PCI device to query 258 * @dev: PCI device to query
259 * @start: address at which to start looking (0 to start at beginning of list)
291 * @cap: capability code 260 * @cap: capability code
292 * 261 *
293 * Returns the address of the requested extended capability structure 262 * Returns the address of the next matching extended capability structure
294 * within the device's PCI configuration space or 0 if the device does 263 * within the device's PCI configuration space or 0 if the device does
295 * not support it. Possible values for @cap: 264 * not support it. Some capabilities can occur several times, e.g., the
296 * 265 * vendor-specific capability, and this provides a way to find them all.
297 * %PCI_EXT_CAP_ID_ERR Advanced Error Reporting
298 * %PCI_EXT_CAP_ID_VC Virtual Channel
299 * %PCI_EXT_CAP_ID_DSN Device Serial Number
300 * %PCI_EXT_CAP_ID_PWR Power Budgeting
301 */ 266 */
302int pci_find_ext_capability(struct pci_dev *dev, int cap) 267int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap)
303{ 268{
304 u32 header; 269 u32 header;
305 int ttl; 270 int ttl;
@@ -311,6 +276,9 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
311 if (dev->cfg_size <= PCI_CFG_SPACE_SIZE) 276 if (dev->cfg_size <= PCI_CFG_SPACE_SIZE)
312 return 0; 277 return 0;
313 278
279 if (start)
280 pos = start;
281
314 if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL) 282 if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
315 return 0; 283 return 0;
316 284
@@ -322,7 +290,7 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
322 return 0; 290 return 0;
323 291
324 while (ttl-- > 0) { 292 while (ttl-- > 0) {
325 if (PCI_EXT_CAP_ID(header) == cap) 293 if (PCI_EXT_CAP_ID(header) == cap && pos != start)
326 return pos; 294 return pos;
327 295
328 pos = PCI_EXT_CAP_NEXT(header); 296 pos = PCI_EXT_CAP_NEXT(header);
@@ -335,6 +303,26 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
335 303
336 return 0; 304 return 0;
337} 305}
306EXPORT_SYMBOL_GPL(pci_find_next_ext_capability);
307
308/**
309 * pci_find_ext_capability - Find an extended capability
310 * @dev: PCI device to query
311 * @cap: capability code
312 *
313 * Returns the address of the requested extended capability structure
314 * within the device's PCI configuration space or 0 if the device does
315 * not support it. Possible values for @cap:
316 *
317 * %PCI_EXT_CAP_ID_ERR Advanced Error Reporting
318 * %PCI_EXT_CAP_ID_VC Virtual Channel
319 * %PCI_EXT_CAP_ID_DSN Device Serial Number
320 * %PCI_EXT_CAP_ID_PWR Power Budgeting
321 */
322int pci_find_ext_capability(struct pci_dev *dev, int cap)
323{
324 return pci_find_next_ext_capability(dev, 0, cap);
325}
338EXPORT_SYMBOL_GPL(pci_find_ext_capability); 326EXPORT_SYMBOL_GPL(pci_find_ext_capability);
339 327
340static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap) 328static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
@@ -854,21 +842,6 @@ EXPORT_SYMBOL(pci_choose_state);
854 842
855#define PCI_EXP_SAVE_REGS 7 843#define PCI_EXP_SAVE_REGS 7
856 844
857#define pcie_cap_has_devctl(type, flags) 1
858#define pcie_cap_has_lnkctl(type, flags) \
859 ((flags & PCI_EXP_FLAGS_VERS) > 1 || \
860 (type == PCI_EXP_TYPE_ROOT_PORT || \
861 type == PCI_EXP_TYPE_ENDPOINT || \
862 type == PCI_EXP_TYPE_LEG_END))
863#define pcie_cap_has_sltctl(type, flags) \
864 ((flags & PCI_EXP_FLAGS_VERS) > 1 || \
865 ((type == PCI_EXP_TYPE_ROOT_PORT) || \
866 (type == PCI_EXP_TYPE_DOWNSTREAM && \
867 (flags & PCI_EXP_FLAGS_SLOT))))
868#define pcie_cap_has_rtctl(type, flags) \
869 ((flags & PCI_EXP_FLAGS_VERS) > 1 || \
870 (type == PCI_EXP_TYPE_ROOT_PORT || \
871 type == PCI_EXP_TYPE_RC_EC))
872 845
873static struct pci_cap_saved_state *pci_find_saved_cap( 846static struct pci_cap_saved_state *pci_find_saved_cap(
874 struct pci_dev *pci_dev, char cap) 847 struct pci_dev *pci_dev, char cap)
@@ -885,13 +858,11 @@ static struct pci_cap_saved_state *pci_find_saved_cap(
885 858
886static int pci_save_pcie_state(struct pci_dev *dev) 859static int pci_save_pcie_state(struct pci_dev *dev)
887{ 860{
888 int pos, i = 0; 861 int i = 0;
889 struct pci_cap_saved_state *save_state; 862 struct pci_cap_saved_state *save_state;
890 u16 *cap; 863 u16 *cap;
891 u16 flags;
892 864
893 pos = pci_pcie_cap(dev); 865 if (!pci_is_pcie(dev))
894 if (!pos)
895 return 0; 866 return 0;
896 867
897 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); 868 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
@@ -899,60 +870,37 @@ static int pci_save_pcie_state(struct pci_dev *dev)
899 dev_err(&dev->dev, "buffer not found in %s\n", __func__); 870 dev_err(&dev->dev, "buffer not found in %s\n", __func__);
900 return -ENOMEM; 871 return -ENOMEM;
901 } 872 }
902 cap = (u16 *)&save_state->cap.data[0];
903
904 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
905 873
906 if (pcie_cap_has_devctl(dev->pcie_type, flags)) 874 cap = (u16 *)&save_state->cap.data[0];
907 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]); 875 pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &cap[i++]);
908 if (pcie_cap_has_lnkctl(dev->pcie_type, flags)) 876 pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &cap[i++]);
909 pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]); 877 pcie_capability_read_word(dev, PCI_EXP_SLTCTL, &cap[i++]);
910 if (pcie_cap_has_sltctl(dev->pcie_type, flags)) 878 pcie_capability_read_word(dev, PCI_EXP_RTCTL, &cap[i++]);
911 pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]); 879 pcie_capability_read_word(dev, PCI_EXP_DEVCTL2, &cap[i++]);
912 if (pcie_cap_has_rtctl(dev->pcie_type, flags)) 880 pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &cap[i++]);
913 pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]); 881 pcie_capability_read_word(dev, PCI_EXP_SLTCTL2, &cap[i++]);
914
915 pos = pci_pcie_cap2(dev);
916 if (!pos)
917 return 0;
918 882
919 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]);
920 pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
921 pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
922 return 0; 883 return 0;
923} 884}
924 885
925static void pci_restore_pcie_state(struct pci_dev *dev) 886static void pci_restore_pcie_state(struct pci_dev *dev)
926{ 887{
927 int i = 0, pos; 888 int i = 0;
928 struct pci_cap_saved_state *save_state; 889 struct pci_cap_saved_state *save_state;
929 u16 *cap; 890 u16 *cap;
930 u16 flags;
931 891
932 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); 892 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
933 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 893 if (!save_state)
934 if (!save_state || pos <= 0)
935 return;
936 cap = (u16 *)&save_state->cap.data[0];
937
938 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
939
940 if (pcie_cap_has_devctl(dev->pcie_type, flags))
941 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]);
942 if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
943 pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
944 if (pcie_cap_has_sltctl(dev->pcie_type, flags))
945 pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
946 if (pcie_cap_has_rtctl(dev->pcie_type, flags))
947 pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
948
949 pos = pci_pcie_cap2(dev);
950 if (!pos)
951 return; 894 return;
952 895
953 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]); 896 cap = (u16 *)&save_state->cap.data[0];
954 pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]); 897 pcie_capability_write_word(dev, PCI_EXP_DEVCTL, cap[i++]);
955 pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]); 898 pcie_capability_write_word(dev, PCI_EXP_LNKCTL, cap[i++]);
899 pcie_capability_write_word(dev, PCI_EXP_SLTCTL, cap[i++]);
900 pcie_capability_write_word(dev, PCI_EXP_RTCTL, cap[i++]);
901 pcie_capability_write_word(dev, PCI_EXP_DEVCTL2, cap[i++]);
902 pcie_capability_write_word(dev, PCI_EXP_LNKCTL2, cap[i++]);
903 pcie_capability_write_word(dev, PCI_EXP_SLTCTL2, cap[i++]);
956} 904}
957 905
958 906
@@ -1543,7 +1491,7 @@ void pci_pme_wakeup_bus(struct pci_bus *bus)
1543 1491
1544/** 1492/**
1545 * pci_wakeup - Wake up a PCI device 1493 * pci_wakeup - Wake up a PCI device
1546 * @dev: Device to handle. 1494 * @pci_dev: Device to handle.
1547 * @ign: ignored parameter 1495 * @ign: ignored parameter
1548 */ 1496 */
1549static int pci_wakeup(struct pci_dev *pci_dev, void *ign) 1497static int pci_wakeup(struct pci_dev *pci_dev, void *ign)
@@ -2067,35 +2015,24 @@ void pci_free_cap_save_buffers(struct pci_dev *dev)
2067 */ 2015 */
2068void pci_enable_ari(struct pci_dev *dev) 2016void pci_enable_ari(struct pci_dev *dev)
2069{ 2017{
2070 int pos;
2071 u32 cap; 2018 u32 cap;
2072 u16 ctrl;
2073 struct pci_dev *bridge; 2019 struct pci_dev *bridge;
2074 2020
2075 if (pcie_ari_disabled || !pci_is_pcie(dev) || dev->devfn) 2021 if (pcie_ari_disabled || !pci_is_pcie(dev) || dev->devfn)
2076 return; 2022 return;
2077 2023
2078 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI); 2024 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI))
2079 if (!pos)
2080 return; 2025 return;
2081 2026
2082 bridge = dev->bus->self; 2027 bridge = dev->bus->self;
2083 if (!bridge) 2028 if (!bridge)
2084 return; 2029 return;
2085 2030
2086 /* ARI is a PCIe cap v2 feature */ 2031 pcie_capability_read_dword(bridge, PCI_EXP_DEVCAP2, &cap);
2087 pos = pci_pcie_cap2(bridge);
2088 if (!pos)
2089 return;
2090
2091 pci_read_config_dword(bridge, pos + PCI_EXP_DEVCAP2, &cap);
2092 if (!(cap & PCI_EXP_DEVCAP2_ARI)) 2032 if (!(cap & PCI_EXP_DEVCAP2_ARI))
2093 return; 2033 return;
2094 2034
2095 pci_read_config_word(bridge, pos + PCI_EXP_DEVCTL2, &ctrl); 2035 pcie_capability_set_word(bridge, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_ARI);
2096 ctrl |= PCI_EXP_DEVCTL2_ARI;
2097 pci_write_config_word(bridge, pos + PCI_EXP_DEVCTL2, ctrl);
2098
2099 bridge->ari_enabled = 1; 2036 bridge->ari_enabled = 1;
2100} 2037}
2101 2038
@@ -2110,20 +2047,14 @@ void pci_enable_ari(struct pci_dev *dev)
2110 */ 2047 */
2111void pci_enable_ido(struct pci_dev *dev, unsigned long type) 2048void pci_enable_ido(struct pci_dev *dev, unsigned long type)
2112{ 2049{
2113 int pos; 2050 u16 ctrl = 0;
2114 u16 ctrl;
2115 2051
2116 /* ID-based Ordering is a PCIe cap v2 feature */
2117 pos = pci_pcie_cap2(dev);
2118 if (!pos)
2119 return;
2120
2121 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
2122 if (type & PCI_EXP_IDO_REQUEST) 2052 if (type & PCI_EXP_IDO_REQUEST)
2123 ctrl |= PCI_EXP_IDO_REQ_EN; 2053 ctrl |= PCI_EXP_IDO_REQ_EN;
2124 if (type & PCI_EXP_IDO_COMPLETION) 2054 if (type & PCI_EXP_IDO_COMPLETION)
2125 ctrl |= PCI_EXP_IDO_CMP_EN; 2055 ctrl |= PCI_EXP_IDO_CMP_EN;
2126 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl); 2056 if (ctrl)
2057 pcie_capability_set_word(dev, PCI_EXP_DEVCTL2, ctrl);
2127} 2058}
2128EXPORT_SYMBOL(pci_enable_ido); 2059EXPORT_SYMBOL(pci_enable_ido);
2129 2060
@@ -2134,20 +2065,14 @@ EXPORT_SYMBOL(pci_enable_ido);
2134 */ 2065 */
2135void pci_disable_ido(struct pci_dev *dev, unsigned long type) 2066void pci_disable_ido(struct pci_dev *dev, unsigned long type)
2136{ 2067{
2137 int pos; 2068 u16 ctrl = 0;
2138 u16 ctrl;
2139 2069
2140 /* ID-based Ordering is a PCIe cap v2 feature */
2141 pos = pci_pcie_cap2(dev);
2142 if (!pos)
2143 return;
2144
2145 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
2146 if (type & PCI_EXP_IDO_REQUEST) 2070 if (type & PCI_EXP_IDO_REQUEST)
2147 ctrl &= ~PCI_EXP_IDO_REQ_EN; 2071 ctrl |= PCI_EXP_IDO_REQ_EN;
2148 if (type & PCI_EXP_IDO_COMPLETION) 2072 if (type & PCI_EXP_IDO_COMPLETION)
2149 ctrl &= ~PCI_EXP_IDO_CMP_EN; 2073 ctrl |= PCI_EXP_IDO_CMP_EN;
2150 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl); 2074 if (ctrl)
2075 pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2, ctrl);
2151} 2076}
2152EXPORT_SYMBOL(pci_disable_ido); 2077EXPORT_SYMBOL(pci_disable_ido);
2153 2078
@@ -2172,17 +2097,11 @@ EXPORT_SYMBOL(pci_disable_ido);
2172 */ 2097 */
2173int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type) 2098int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
2174{ 2099{
2175 int pos;
2176 u32 cap; 2100 u32 cap;
2177 u16 ctrl; 2101 u16 ctrl;
2178 int ret; 2102 int ret;
2179 2103
2180 /* OBFF is a PCIe cap v2 feature */ 2104 pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
2181 pos = pci_pcie_cap2(dev);
2182 if (!pos)
2183 return -ENOTSUPP;
2184
2185 pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
2186 if (!(cap & PCI_EXP_OBFF_MASK)) 2105 if (!(cap & PCI_EXP_OBFF_MASK))
2187 return -ENOTSUPP; /* no OBFF support at all */ 2106 return -ENOTSUPP; /* no OBFF support at all */
2188 2107
@@ -2193,7 +2112,7 @@ int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
2193 return ret; 2112 return ret;
2194 } 2113 }
2195 2114
2196 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl); 2115 pcie_capability_read_word(dev, PCI_EXP_DEVCTL2, &ctrl);
2197 if (cap & PCI_EXP_OBFF_WAKE) 2116 if (cap & PCI_EXP_OBFF_WAKE)
2198 ctrl |= PCI_EXP_OBFF_WAKE_EN; 2117 ctrl |= PCI_EXP_OBFF_WAKE_EN;
2199 else { 2118 else {
@@ -2211,7 +2130,7 @@ int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
2211 return -ENOTSUPP; 2130 return -ENOTSUPP;
2212 } 2131 }
2213 } 2132 }
2214 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl); 2133 pcie_capability_write_word(dev, PCI_EXP_DEVCTL2, ctrl);
2215 2134
2216 return 0; 2135 return 0;
2217} 2136}
@@ -2225,17 +2144,7 @@ EXPORT_SYMBOL(pci_enable_obff);
2225 */ 2144 */
2226void pci_disable_obff(struct pci_dev *dev) 2145void pci_disable_obff(struct pci_dev *dev)
2227{ 2146{
2228 int pos; 2147 pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2, PCI_EXP_OBFF_WAKE_EN);
2229 u16 ctrl;
2230
2231 /* OBFF is a PCIe cap v2 feature */
2232 pos = pci_pcie_cap2(dev);
2233 if (!pos)
2234 return;
2235
2236 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
2237 ctrl &= ~PCI_EXP_OBFF_WAKE_EN;
2238 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
2239} 2148}
2240EXPORT_SYMBOL(pci_disable_obff); 2149EXPORT_SYMBOL(pci_disable_obff);
2241 2150
@@ -2248,15 +2157,9 @@ EXPORT_SYMBOL(pci_disable_obff);
2248 */ 2157 */
2249static bool pci_ltr_supported(struct pci_dev *dev) 2158static bool pci_ltr_supported(struct pci_dev *dev)
2250{ 2159{
2251 int pos;
2252 u32 cap; 2160 u32 cap;
2253 2161
2254 /* LTR is a PCIe cap v2 feature */ 2162 pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
2255 pos = pci_pcie_cap2(dev);
2256 if (!pos)
2257 return false;
2258
2259 pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
2260 2163
2261 return cap & PCI_EXP_DEVCAP2_LTR; 2164 return cap & PCI_EXP_DEVCAP2_LTR;
2262} 2165}
@@ -2273,22 +2176,15 @@ static bool pci_ltr_supported(struct pci_dev *dev)
2273 */ 2176 */
2274int pci_enable_ltr(struct pci_dev *dev) 2177int pci_enable_ltr(struct pci_dev *dev)
2275{ 2178{
2276 int pos;
2277 u16 ctrl;
2278 int ret; 2179 int ret;
2279 2180
2280 if (!pci_ltr_supported(dev))
2281 return -ENOTSUPP;
2282
2283 /* LTR is a PCIe cap v2 feature */
2284 pos = pci_pcie_cap2(dev);
2285 if (!pos)
2286 return -ENOTSUPP;
2287
2288 /* Only primary function can enable/disable LTR */ 2181 /* Only primary function can enable/disable LTR */
2289 if (PCI_FUNC(dev->devfn) != 0) 2182 if (PCI_FUNC(dev->devfn) != 0)
2290 return -EINVAL; 2183 return -EINVAL;
2291 2184
2185 if (!pci_ltr_supported(dev))
2186 return -ENOTSUPP;
2187
2292 /* Enable upstream ports first */ 2188 /* Enable upstream ports first */
2293 if (dev->bus->self) { 2189 if (dev->bus->self) {
2294 ret = pci_enable_ltr(dev->bus->self); 2190 ret = pci_enable_ltr(dev->bus->self);
@@ -2296,11 +2192,7 @@ int pci_enable_ltr(struct pci_dev *dev)
2296 return ret; 2192 return ret;
2297 } 2193 }
2298 2194
2299 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl); 2195 return pcie_capability_set_word(dev, PCI_EXP_DEVCTL2, PCI_EXP_LTR_EN);
2300 ctrl |= PCI_EXP_LTR_EN;
2301 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
2302
2303 return 0;
2304} 2196}
2305EXPORT_SYMBOL(pci_enable_ltr); 2197EXPORT_SYMBOL(pci_enable_ltr);
2306 2198
@@ -2310,24 +2202,14 @@ EXPORT_SYMBOL(pci_enable_ltr);
2310 */ 2202 */
2311void pci_disable_ltr(struct pci_dev *dev) 2203void pci_disable_ltr(struct pci_dev *dev)
2312{ 2204{
2313 int pos;
2314 u16 ctrl;
2315
2316 if (!pci_ltr_supported(dev))
2317 return;
2318
2319 /* LTR is a PCIe cap v2 feature */
2320 pos = pci_pcie_cap2(dev);
2321 if (!pos)
2322 return;
2323
2324 /* Only primary function can enable/disable LTR */ 2205 /* Only primary function can enable/disable LTR */
2325 if (PCI_FUNC(dev->devfn) != 0) 2206 if (PCI_FUNC(dev->devfn) != 0)
2326 return; 2207 return;
2327 2208
2328 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl); 2209 if (!pci_ltr_supported(dev))
2329 ctrl &= ~PCI_EXP_LTR_EN; 2210 return;
2330 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl); 2211
2212 pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2, PCI_EXP_LTR_EN);
2331} 2213}
2332EXPORT_SYMBOL(pci_disable_ltr); 2214EXPORT_SYMBOL(pci_disable_ltr);
2333 2215
@@ -2410,9 +2292,6 @@ void pci_enable_acs(struct pci_dev *dev)
2410 if (!pci_acs_enable) 2292 if (!pci_acs_enable)
2411 return; 2293 return;
2412 2294
2413 if (!pci_is_pcie(dev))
2414 return;
2415
2416 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS); 2295 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS);
2417 if (!pos) 2296 if (!pos)
2418 return; 2297 return;
@@ -2460,8 +2339,8 @@ bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags)
2460 acs_flags &= (PCI_ACS_RR | PCI_ACS_CR | 2339 acs_flags &= (PCI_ACS_RR | PCI_ACS_CR |
2461 PCI_ACS_EC | PCI_ACS_DT); 2340 PCI_ACS_EC | PCI_ACS_DT);
2462 2341
2463 if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM || 2342 if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM ||
2464 pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT || 2343 pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
2465 pdev->multifunction) { 2344 pdev->multifunction) {
2466 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ACS); 2345 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ACS);
2467 if (!pos) 2346 if (!pos)
@@ -3177,15 +3056,10 @@ EXPORT_SYMBOL(pci_set_dma_seg_boundary);
3177static int pcie_flr(struct pci_dev *dev, int probe) 3056static int pcie_flr(struct pci_dev *dev, int probe)
3178{ 3057{
3179 int i; 3058 int i;
3180 int pos;
3181 u32 cap; 3059 u32 cap;
3182 u16 status, control; 3060 u16 status;
3183
3184 pos = pci_pcie_cap(dev);
3185 if (!pos)
3186 return -ENOTTY;
3187 3061
3188 pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP, &cap); 3062 pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap);
3189 if (!(cap & PCI_EXP_DEVCAP_FLR)) 3063 if (!(cap & PCI_EXP_DEVCAP_FLR))
3190 return -ENOTTY; 3064 return -ENOTTY;
3191 3065
@@ -3197,7 +3071,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
3197 if (i) 3071 if (i)
3198 msleep((1 << (i - 1)) * 100); 3072 msleep((1 << (i - 1)) * 100);
3199 3073
3200 pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status); 3074 pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
3201 if (!(status & PCI_EXP_DEVSTA_TRPND)) 3075 if (!(status & PCI_EXP_DEVSTA_TRPND))
3202 goto clear; 3076 goto clear;
3203 } 3077 }
@@ -3206,9 +3080,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
3206 "proceeding with reset anyway\n"); 3080 "proceeding with reset anyway\n");
3207 3081
3208clear: 3082clear:
3209 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &control); 3083 pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
3210 control |= PCI_EXP_DEVCTL_BCR_FLR;
3211 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, control);
3212 3084
3213 msleep(100); 3085 msleep(100);
3214 3086
@@ -3576,18 +3448,11 @@ EXPORT_SYMBOL(pcix_set_mmrbc);
3576 */ 3448 */
3577int pcie_get_readrq(struct pci_dev *dev) 3449int pcie_get_readrq(struct pci_dev *dev)
3578{ 3450{
3579 int ret, cap;
3580 u16 ctl; 3451 u16 ctl;
3581 3452
3582 cap = pci_pcie_cap(dev); 3453 pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl);
3583 if (!cap)
3584 return -EINVAL;
3585
3586 ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
3587 if (!ret)
3588 ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
3589 3454
3590 return ret; 3455 return 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
3591} 3456}
3592EXPORT_SYMBOL(pcie_get_readrq); 3457EXPORT_SYMBOL(pcie_get_readrq);
3593 3458
@@ -3601,19 +3466,11 @@ EXPORT_SYMBOL(pcie_get_readrq);
3601 */ 3466 */
3602int pcie_set_readrq(struct pci_dev *dev, int rq) 3467int pcie_set_readrq(struct pci_dev *dev, int rq)
3603{ 3468{
3604 int cap, err = -EINVAL; 3469 u16 v;
3605 u16 ctl, v;
3606 3470
3607 if (rq < 128 || rq > 4096 || !is_power_of_2(rq)) 3471 if (rq < 128 || rq > 4096 || !is_power_of_2(rq))
3608 goto out; 3472 return -EINVAL;
3609
3610 cap = pci_pcie_cap(dev);
3611 if (!cap)
3612 goto out;
3613 3473
3614 err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
3615 if (err)
3616 goto out;
3617 /* 3474 /*
3618 * If using the "performance" PCIe config, we clamp the 3475 * If using the "performance" PCIe config, we clamp the
3619 * read rq size to the max packet size to prevent the 3476 * read rq size to the max packet size to prevent the
@@ -3631,14 +3488,8 @@ int pcie_set_readrq(struct pci_dev *dev, int rq)
3631 3488
3632 v = (ffs(rq) - 8) << 12; 3489 v = (ffs(rq) - 8) << 12;
3633 3490
3634 if ((ctl & PCI_EXP_DEVCTL_READRQ) != v) { 3491 return pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
3635 ctl &= ~PCI_EXP_DEVCTL_READRQ; 3492 PCI_EXP_DEVCTL_READRQ, v);
3636 ctl |= v;
3637 err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, ctl);
3638 }
3639
3640out:
3641 return err;
3642} 3493}
3643EXPORT_SYMBOL(pcie_set_readrq); 3494EXPORT_SYMBOL(pcie_set_readrq);
3644 3495
@@ -3651,18 +3502,11 @@ EXPORT_SYMBOL(pcie_set_readrq);
3651 */ 3502 */
3652int pcie_get_mps(struct pci_dev *dev) 3503int pcie_get_mps(struct pci_dev *dev)
3653{ 3504{
3654 int ret, cap;
3655 u16 ctl; 3505 u16 ctl;
3656 3506
3657 cap = pci_pcie_cap(dev); 3507 pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl);
3658 if (!cap)
3659 return -EINVAL;
3660
3661 ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
3662 if (!ret)
3663 ret = 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
3664 3508
3665 return ret; 3509 return 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
3666} 3510}
3667 3511
3668/** 3512/**
@@ -3675,32 +3519,18 @@ int pcie_get_mps(struct pci_dev *dev)
3675 */ 3519 */
3676int pcie_set_mps(struct pci_dev *dev, int mps) 3520int pcie_set_mps(struct pci_dev *dev, int mps)
3677{ 3521{
3678 int cap, err = -EINVAL; 3522 u16 v;
3679 u16 ctl, v;
3680 3523
3681 if (mps < 128 || mps > 4096 || !is_power_of_2(mps)) 3524 if (mps < 128 || mps > 4096 || !is_power_of_2(mps))
3682 goto out; 3525 return -EINVAL;
3683 3526
3684 v = ffs(mps) - 8; 3527 v = ffs(mps) - 8;
3685 if (v > dev->pcie_mpss) 3528 if (v > dev->pcie_mpss)
3686 goto out; 3529 return -EINVAL;
3687 v <<= 5; 3530 v <<= 5;
3688 3531
3689 cap = pci_pcie_cap(dev); 3532 return pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
3690 if (!cap) 3533 PCI_EXP_DEVCTL_PAYLOAD, v);
3691 goto out;
3692
3693 err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
3694 if (err)
3695 goto out;
3696
3697 if ((ctl & PCI_EXP_DEVCTL_PAYLOAD) != v) {
3698 ctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
3699 ctl |= v;
3700 err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, ctl);
3701 }
3702out:
3703 return err;
3704} 3534}
3705 3535
3706/** 3536/**
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 52229863e9fe..4e24cb8a94ae 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -288,7 +288,7 @@ static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
288 while (1) { 288 while (1) {
289 if (!pci_is_pcie(dev)) 289 if (!pci_is_pcie(dev))
290 break; 290 break;
291 if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) 291 if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
292 return dev; 292 return dev;
293 if (!dev->bus->self) 293 if (!dev->bus->self)
294 break; 294 break;
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 58ad7917553c..030cf12d5468 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -48,7 +48,7 @@ static pci_ers_result_t aer_error_detected(struct pci_dev *dev,
48static void aer_error_resume(struct pci_dev *dev); 48static void aer_error_resume(struct pci_dev *dev);
49static pci_ers_result_t aer_root_reset(struct pci_dev *dev); 49static pci_ers_result_t aer_root_reset(struct pci_dev *dev);
50 50
51static struct pci_error_handlers aer_error_handlers = { 51static const struct pci_error_handlers aer_error_handlers = {
52 .error_detected = aer_error_detected, 52 .error_detected = aer_error_detected,
53 .resume = aer_error_resume, 53 .resume = aer_error_resume,
54}; 54};
@@ -81,10 +81,11 @@ bool pci_aer_available(void)
81static int set_device_error_reporting(struct pci_dev *dev, void *data) 81static int set_device_error_reporting(struct pci_dev *dev, void *data)
82{ 82{
83 bool enable = *((bool *)data); 83 bool enable = *((bool *)data);
84 int type = pci_pcie_type(dev);
84 85
85 if ((dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) || 86 if ((type == PCI_EXP_TYPE_ROOT_PORT) ||
86 (dev->pcie_type == PCI_EXP_TYPE_UPSTREAM) || 87 (type == PCI_EXP_TYPE_UPSTREAM) ||
87 (dev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)) { 88 (type == PCI_EXP_TYPE_DOWNSTREAM)) {
88 if (enable) 89 if (enable)
89 pci_enable_pcie_error_reporting(dev); 90 pci_enable_pcie_error_reporting(dev);
90 else 91 else
@@ -121,19 +122,17 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
121static void aer_enable_rootport(struct aer_rpc *rpc) 122static void aer_enable_rootport(struct aer_rpc *rpc)
122{ 123{
123 struct pci_dev *pdev = rpc->rpd->port; 124 struct pci_dev *pdev = rpc->rpd->port;
124 int pos, aer_pos; 125 int aer_pos;
125 u16 reg16; 126 u16 reg16;
126 u32 reg32; 127 u32 reg32;
127 128
128 pos = pci_pcie_cap(pdev);
129 /* Clear PCIe Capability's Device Status */ 129 /* Clear PCIe Capability's Device Status */
130 pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16); 130 pcie_capability_read_word(pdev, PCI_EXP_DEVSTA, &reg16);
131 pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16); 131 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, reg16);
132 132
133 /* Disable system error generation in response to error messages */ 133 /* Disable system error generation in response to error messages */
134 pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16); 134 pcie_capability_clear_word(pdev, PCI_EXP_RTCTL,
135 reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK); 135 SYSTEM_ERROR_INTR_ON_MESG_MASK);
136 pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
137 136
138 aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 137 aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
139 /* Clear error status */ 138 /* Clear error status */
@@ -395,9 +394,8 @@ static void aer_error_resume(struct pci_dev *dev)
395 u16 reg16; 394 u16 reg16;
396 395
397 /* Clean up Root device status */ 396 /* Clean up Root device status */
398 pos = pci_pcie_cap(dev); 397 pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &reg16);
399 pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &reg16); 398 pcie_capability_write_word(dev, PCI_EXP_DEVSTA, reg16);
400 pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16);
401 399
402 /* Clean AER Root Error Status */ 400 /* Clean AER Root Error Status */
403 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); 401 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 124f20ff11b2..5194a7d41730 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -60,7 +60,7 @@ static int aer_hest_parse(struct acpi_hest_header *hest_hdr, void *data)
60 p = (struct acpi_hest_aer_common *)(hest_hdr + 1); 60 p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
61 if (p->flags & ACPI_HEST_GLOBAL) { 61 if (p->flags & ACPI_HEST_GLOBAL) {
62 if ((pci_is_pcie(info->pci_dev) && 62 if ((pci_is_pcie(info->pci_dev) &&
63 info->pci_dev->pcie_type == pcie_type) || bridge) 63 pci_pcie_type(info->pci_dev) == pcie_type) || bridge)
64 ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST); 64 ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
65 } else 65 } else
66 if (hest_match_pci(p, info->pci_dev)) 66 if (hest_match_pci(p, info->pci_dev))
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 0ca053538146..06bad96af415 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -32,53 +32,28 @@ static bool nosourceid;
32module_param(forceload, bool, 0); 32module_param(forceload, bool, 0);
33module_param(nosourceid, bool, 0); 33module_param(nosourceid, bool, 0);
34 34
35#define PCI_EXP_AER_FLAGS (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
36 PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE)
37
35int pci_enable_pcie_error_reporting(struct pci_dev *dev) 38int pci_enable_pcie_error_reporting(struct pci_dev *dev)
36{ 39{
37 u16 reg16 = 0;
38 int pos;
39
40 if (pcie_aer_get_firmware_first(dev)) 40 if (pcie_aer_get_firmware_first(dev))
41 return -EIO; 41 return -EIO;
42 42
43 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); 43 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))
44 if (!pos)
45 return -EIO; 44 return -EIO;
46 45
47 pos = pci_pcie_cap(dev); 46 return pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_AER_FLAGS);
48 if (!pos)
49 return -EIO;
50
51 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
52 reg16 |= (PCI_EXP_DEVCTL_CERE |
53 PCI_EXP_DEVCTL_NFERE |
54 PCI_EXP_DEVCTL_FERE |
55 PCI_EXP_DEVCTL_URRE);
56 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
57
58 return 0;
59} 47}
60EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting); 48EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
61 49
62int pci_disable_pcie_error_reporting(struct pci_dev *dev) 50int pci_disable_pcie_error_reporting(struct pci_dev *dev)
63{ 51{
64 u16 reg16 = 0;
65 int pos;
66
67 if (pcie_aer_get_firmware_first(dev)) 52 if (pcie_aer_get_firmware_first(dev))
68 return -EIO; 53 return -EIO;
69 54
70 pos = pci_pcie_cap(dev); 55 return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
71 if (!pos) 56 PCI_EXP_AER_FLAGS);
72 return -EIO;
73
74 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
75 reg16 &= ~(PCI_EXP_DEVCTL_CERE |
76 PCI_EXP_DEVCTL_NFERE |
77 PCI_EXP_DEVCTL_FERE |
78 PCI_EXP_DEVCTL_URRE);
79 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
80
81 return 0;
82} 57}
83EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting); 58EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
84 59
@@ -151,18 +126,12 @@ static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
151 */ 126 */
152 if (atomic_read(&dev->enable_cnt) == 0) 127 if (atomic_read(&dev->enable_cnt) == 0)
153 return false; 128 return false;
154 pos = pci_pcie_cap(dev);
155 if (!pos)
156 return false;
157 129
158 /* Check if AER is enabled */ 130 /* Check if AER is enabled */
159 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16); 131 pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &reg16);
160 if (!(reg16 & ( 132 if (!(reg16 & PCI_EXP_AER_FLAGS))
161 PCI_EXP_DEVCTL_CERE |
162 PCI_EXP_DEVCTL_NFERE |
163 PCI_EXP_DEVCTL_FERE |
164 PCI_EXP_DEVCTL_URRE)))
165 return false; 133 return false;
134
166 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); 135 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
167 if (!pos) 136 if (!pos)
168 return false; 137 return false;
@@ -240,7 +209,7 @@ static bool find_source_device(struct pci_dev *parent,
240static int report_error_detected(struct pci_dev *dev, void *data) 209static int report_error_detected(struct pci_dev *dev, void *data)
241{ 210{
242 pci_ers_result_t vote; 211 pci_ers_result_t vote;
243 struct pci_error_handlers *err_handler; 212 const struct pci_error_handlers *err_handler;
244 struct aer_broadcast_data *result_data; 213 struct aer_broadcast_data *result_data;
245 result_data = (struct aer_broadcast_data *) data; 214 result_data = (struct aer_broadcast_data *) data;
246 215
@@ -274,7 +243,7 @@ static int report_error_detected(struct pci_dev *dev, void *data)
274static int report_mmio_enabled(struct pci_dev *dev, void *data) 243static int report_mmio_enabled(struct pci_dev *dev, void *data)
275{ 244{
276 pci_ers_result_t vote; 245 pci_ers_result_t vote;
277 struct pci_error_handlers *err_handler; 246 const struct pci_error_handlers *err_handler;
278 struct aer_broadcast_data *result_data; 247 struct aer_broadcast_data *result_data;
279 result_data = (struct aer_broadcast_data *) data; 248 result_data = (struct aer_broadcast_data *) data;
280 249
@@ -292,7 +261,7 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data)
292static int report_slot_reset(struct pci_dev *dev, void *data) 261static int report_slot_reset(struct pci_dev *dev, void *data)
293{ 262{
294 pci_ers_result_t vote; 263 pci_ers_result_t vote;
295 struct pci_error_handlers *err_handler; 264 const struct pci_error_handlers *err_handler;
296 struct aer_broadcast_data *result_data; 265 struct aer_broadcast_data *result_data;
297 result_data = (struct aer_broadcast_data *) data; 266 result_data = (struct aer_broadcast_data *) data;
298 267
@@ -309,7 +278,7 @@ static int report_slot_reset(struct pci_dev *dev, void *data)
309 278
310static int report_resume(struct pci_dev *dev, void *data) 279static int report_resume(struct pci_dev *dev, void *data)
311{ 280{
312 struct pci_error_handlers *err_handler; 281 const struct pci_error_handlers *err_handler;
313 282
314 dev->error_state = pci_channel_io_normal; 283 dev->error_state = pci_channel_io_normal;
315 284
@@ -465,7 +434,7 @@ static pci_ers_result_t reset_link(struct pci_dev *dev)
465 434
466 if (driver && driver->reset_link) { 435 if (driver && driver->reset_link) {
467 status = driver->reset_link(udev); 436 status = driver->reset_link(udev);
468 } else if (udev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) { 437 } else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM) {
469 status = default_downstream_reset_link(udev); 438 status = default_downstream_reset_link(udev);
470 } else { 439 } else {
471 dev_printk(KERN_DEBUG, &dev->dev, 440 dev_printk(KERN_DEBUG, &dev->dev,
@@ -540,14 +509,12 @@ static void do_recovery(struct pci_dev *dev, int severity)
540 "resume", 509 "resume",
541 report_resume); 510 report_resume);
542 511
543 dev_printk(KERN_DEBUG, &dev->dev, 512 dev_info(&dev->dev, "AER: Device recovery successful\n");
544 "AER driver successfully recovered\n");
545 return; 513 return;
546 514
547failed: 515failed:
548 /* TODO: Should kernel panic here? */ 516 /* TODO: Should kernel panic here? */
549 dev_printk(KERN_DEBUG, &dev->dev, 517 dev_info(&dev->dev, "AER: Device recovery failed\n");
550 "AER driver didn't recover\n");
551} 518}
552 519
553/** 520/**
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index b500840a143b..213753b283a6 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -125,21 +125,16 @@ static int policy_to_clkpm_state(struct pcie_link_state *link)
125 125
126static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable) 126static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
127{ 127{
128 int pos;
129 u16 reg16;
130 struct pci_dev *child; 128 struct pci_dev *child;
131 struct pci_bus *linkbus = link->pdev->subordinate; 129 struct pci_bus *linkbus = link->pdev->subordinate;
132 130
133 list_for_each_entry(child, &linkbus->devices, bus_list) { 131 list_for_each_entry(child, &linkbus->devices, bus_list) {
134 pos = pci_pcie_cap(child);
135 if (!pos)
136 return;
137 pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
138 if (enable) 132 if (enable)
139 reg16 |= PCI_EXP_LNKCTL_CLKREQ_EN; 133 pcie_capability_set_word(child, PCI_EXP_LNKCTL,
134 PCI_EXP_LNKCTL_CLKREQ_EN);
140 else 135 else
141 reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN; 136 pcie_capability_clear_word(child, PCI_EXP_LNKCTL,
142 pci_write_config_word(child, pos + PCI_EXP_LNKCTL, reg16); 137 PCI_EXP_LNKCTL_CLKREQ_EN);
143 } 138 }
144 link->clkpm_enabled = !!enable; 139 link->clkpm_enabled = !!enable;
145} 140}
@@ -157,7 +152,7 @@ static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
157 152
158static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) 153static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
159{ 154{
160 int pos, capable = 1, enabled = 1; 155 int capable = 1, enabled = 1;
161 u32 reg32; 156 u32 reg32;
162 u16 reg16; 157 u16 reg16;
163 struct pci_dev *child; 158 struct pci_dev *child;
@@ -165,16 +160,13 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
165 160
166 /* All functions should have the same cap and state, take the worst */ 161 /* All functions should have the same cap and state, take the worst */
167 list_for_each_entry(child, &linkbus->devices, bus_list) { 162 list_for_each_entry(child, &linkbus->devices, bus_list) {
168 pos = pci_pcie_cap(child); 163 pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &reg32);
169 if (!pos)
170 return;
171 pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, &reg32);
172 if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) { 164 if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) {
173 capable = 0; 165 capable = 0;
174 enabled = 0; 166 enabled = 0;
175 break; 167 break;
176 } 168 }
177 pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16); 169 pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
178 if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN)) 170 if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN))
179 enabled = 0; 171 enabled = 0;
180 } 172 }
@@ -190,7 +182,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
190 */ 182 */
191static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) 183static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
192{ 184{
193 int ppos, cpos, same_clock = 1; 185 int same_clock = 1;
194 u16 reg16, parent_reg, child_reg[8]; 186 u16 reg16, parent_reg, child_reg[8];
195 unsigned long start_jiffies; 187 unsigned long start_jiffies;
196 struct pci_dev *child, *parent = link->pdev; 188 struct pci_dev *child, *parent = link->pdev;
@@ -203,46 +195,43 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
203 BUG_ON(!pci_is_pcie(child)); 195 BUG_ON(!pci_is_pcie(child));
204 196
205 /* Check downstream component if bit Slot Clock Configuration is 1 */ 197 /* Check downstream component if bit Slot Clock Configuration is 1 */
206 cpos = pci_pcie_cap(child); 198 pcie_capability_read_word(child, PCI_EXP_LNKSTA, &reg16);
207 pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, &reg16);
208 if (!(reg16 & PCI_EXP_LNKSTA_SLC)) 199 if (!(reg16 & PCI_EXP_LNKSTA_SLC))
209 same_clock = 0; 200 same_clock = 0;
210 201
211 /* Check upstream component if bit Slot Clock Configuration is 1 */ 202 /* Check upstream component if bit Slot Clock Configuration is 1 */
212 ppos = pci_pcie_cap(parent); 203 pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
213 pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
214 if (!(reg16 & PCI_EXP_LNKSTA_SLC)) 204 if (!(reg16 & PCI_EXP_LNKSTA_SLC))
215 same_clock = 0; 205 same_clock = 0;
216 206
217 /* Configure downstream component, all functions */ 207 /* Configure downstream component, all functions */
218 list_for_each_entry(child, &linkbus->devices, bus_list) { 208 list_for_each_entry(child, &linkbus->devices, bus_list) {
219 cpos = pci_pcie_cap(child); 209 pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
220 pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, &reg16);
221 child_reg[PCI_FUNC(child->devfn)] = reg16; 210 child_reg[PCI_FUNC(child->devfn)] = reg16;
222 if (same_clock) 211 if (same_clock)
223 reg16 |= PCI_EXP_LNKCTL_CCC; 212 reg16 |= PCI_EXP_LNKCTL_CCC;
224 else 213 else
225 reg16 &= ~PCI_EXP_LNKCTL_CCC; 214 reg16 &= ~PCI_EXP_LNKCTL_CCC;
226 pci_write_config_word(child, cpos + PCI_EXP_LNKCTL, reg16); 215 pcie_capability_write_word(child, PCI_EXP_LNKCTL, reg16);
227 } 216 }
228 217
229 /* Configure upstream component */ 218 /* Configure upstream component */
230 pci_read_config_word(parent, ppos + PCI_EXP_LNKCTL, &reg16); 219 pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &reg16);
231 parent_reg = reg16; 220 parent_reg = reg16;
232 if (same_clock) 221 if (same_clock)
233 reg16 |= PCI_EXP_LNKCTL_CCC; 222 reg16 |= PCI_EXP_LNKCTL_CCC;
234 else 223 else
235 reg16 &= ~PCI_EXP_LNKCTL_CCC; 224 reg16 &= ~PCI_EXP_LNKCTL_CCC;
236 pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16); 225 pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
237 226
238 /* Retrain link */ 227 /* Retrain link */
239 reg16 |= PCI_EXP_LNKCTL_RL; 228 reg16 |= PCI_EXP_LNKCTL_RL;
240 pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16); 229 pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
241 230
242 /* Wait for link training end. Break out after waiting for timeout */ 231 /* Wait for link training end. Break out after waiting for timeout */
243 start_jiffies = jiffies; 232 start_jiffies = jiffies;
244 for (;;) { 233 for (;;) {
245 pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16); 234 pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
246 if (!(reg16 & PCI_EXP_LNKSTA_LT)) 235 if (!(reg16 & PCI_EXP_LNKSTA_LT))
247 break; 236 break;
248 if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT)) 237 if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))
@@ -255,12 +244,10 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
255 /* Training failed. Restore common clock configurations */ 244 /* Training failed. Restore common clock configurations */
256 dev_printk(KERN_ERR, &parent->dev, 245 dev_printk(KERN_ERR, &parent->dev,
257 "ASPM: Could not configure common clock\n"); 246 "ASPM: Could not configure common clock\n");
258 list_for_each_entry(child, &linkbus->devices, bus_list) { 247 list_for_each_entry(child, &linkbus->devices, bus_list)
259 cpos = pci_pcie_cap(child); 248 pcie_capability_write_word(child, PCI_EXP_LNKCTL,
260 pci_write_config_word(child, cpos + PCI_EXP_LNKCTL, 249 child_reg[PCI_FUNC(child->devfn)]);
261 child_reg[PCI_FUNC(child->devfn)]); 250 pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
262 }
263 pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, parent_reg);
264} 251}
265 252
266/* Convert L0s latency encoding to ns */ 253/* Convert L0s latency encoding to ns */
@@ -305,16 +292,14 @@ struct aspm_register_info {
305static void pcie_get_aspm_reg(struct pci_dev *pdev, 292static void pcie_get_aspm_reg(struct pci_dev *pdev,
306 struct aspm_register_info *info) 293 struct aspm_register_info *info)
307{ 294{
308 int pos;
309 u16 reg16; 295 u16 reg16;
310 u32 reg32; 296 u32 reg32;
311 297
312 pos = pci_pcie_cap(pdev); 298 pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &reg32);
313 pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, &reg32);
314 info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10; 299 info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;
315 info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12; 300 info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;
316 info->latency_encoding_l1 = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15; 301 info->latency_encoding_l1 = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15;
317 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16); 302 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &reg16);
318 info->enabled = reg16 & PCI_EXP_LNKCTL_ASPMC; 303 info->enabled = reg16 & PCI_EXP_LNKCTL_ASPMC;
319} 304}
320 305
@@ -412,7 +397,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
412 * do ASPM for now. 397 * do ASPM for now.
413 */ 398 */
414 list_for_each_entry(child, &linkbus->devices, bus_list) { 399 list_for_each_entry(child, &linkbus->devices, bus_list) {
415 if (child->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) { 400 if (pci_pcie_type(child) == PCI_EXP_TYPE_PCI_BRIDGE) {
416 link->aspm_disable = ASPM_STATE_ALL; 401 link->aspm_disable = ASPM_STATE_ALL;
417 break; 402 break;
418 } 403 }
@@ -420,17 +405,15 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
420 405
421 /* Get and check endpoint acceptable latencies */ 406 /* Get and check endpoint acceptable latencies */
422 list_for_each_entry(child, &linkbus->devices, bus_list) { 407 list_for_each_entry(child, &linkbus->devices, bus_list) {
423 int pos;
424 u32 reg32, encoding; 408 u32 reg32, encoding;
425 struct aspm_latency *acceptable = 409 struct aspm_latency *acceptable =
426 &link->acceptable[PCI_FUNC(child->devfn)]; 410 &link->acceptable[PCI_FUNC(child->devfn)];
427 411
428 if (child->pcie_type != PCI_EXP_TYPE_ENDPOINT && 412 if (pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT &&
429 child->pcie_type != PCI_EXP_TYPE_LEG_END) 413 pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END)
430 continue; 414 continue;
431 415
432 pos = pci_pcie_cap(child); 416 pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
433 pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
434 /* Calculate endpoint L0s acceptable latency */ 417 /* Calculate endpoint L0s acceptable latency */
435 encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6; 418 encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
436 acceptable->l0s = calc_l0s_acceptable(encoding); 419 acceptable->l0s = calc_l0s_acceptable(encoding);
@@ -444,13 +427,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
444 427
445static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val) 428static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
446{ 429{
447 u16 reg16; 430 pcie_capability_clear_and_set_word(pdev, PCI_EXP_LNKCTL, 0x3, val);
448 int pos = pci_pcie_cap(pdev);
449
450 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
451 reg16 &= ~0x3;
452 reg16 |= val;
453 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
454} 431}
455 432
456static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state) 433static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)
@@ -505,7 +482,6 @@ static void free_link_state(struct pcie_link_state *link)
505static int pcie_aspm_sanity_check(struct pci_dev *pdev) 482static int pcie_aspm_sanity_check(struct pci_dev *pdev)
506{ 483{
507 struct pci_dev *child; 484 struct pci_dev *child;
508 int pos;
509 u32 reg32; 485 u32 reg32;
510 486
511 /* 487 /*
@@ -513,8 +489,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
513 * very strange. Disable ASPM for the whole slot 489 * very strange. Disable ASPM for the whole slot
514 */ 490 */
515 list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { 491 list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
516 pos = pci_pcie_cap(child); 492 if (!pci_is_pcie(child))
517 if (!pos)
518 return -EINVAL; 493 return -EINVAL;
519 494
520 /* 495 /*
@@ -530,7 +505,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
530 * Disable ASPM for pre-1.1 PCIe device, we follow MS to use 505 * Disable ASPM for pre-1.1 PCIe device, we follow MS to use
531 * RBER bit to determine if a function is 1.1 version device 506 * RBER bit to determine if a function is 1.1 version device
532 */ 507 */
533 pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32); 508 pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
534 if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) { 509 if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) {
535 dev_printk(KERN_INFO, &child->dev, "disabling ASPM" 510 dev_printk(KERN_INFO, &child->dev, "disabling ASPM"
536 " on pre-1.1 PCIe device. You can enable it" 511 " on pre-1.1 PCIe device. You can enable it"
@@ -552,7 +527,7 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev)
552 INIT_LIST_HEAD(&link->children); 527 INIT_LIST_HEAD(&link->children);
553 INIT_LIST_HEAD(&link->link); 528 INIT_LIST_HEAD(&link->link);
554 link->pdev = pdev; 529 link->pdev = pdev;
555 if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) { 530 if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM) {
556 struct pcie_link_state *parent; 531 struct pcie_link_state *parent;
557 parent = pdev->bus->parent->self->link_state; 532 parent = pdev->bus->parent->self->link_state;
558 if (!parent) { 533 if (!parent) {
@@ -585,12 +560,12 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
585 560
586 if (!pci_is_pcie(pdev) || pdev->link_state) 561 if (!pci_is_pcie(pdev) || pdev->link_state)
587 return; 562 return;
588 if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && 563 if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
589 pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) 564 pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM)
590 return; 565 return;
591 566
592 /* VIA has a strange chipset, root port is under a bridge */ 567 /* VIA has a strange chipset, root port is under a bridge */
593 if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT && 568 if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT &&
594 pdev->bus->self) 569 pdev->bus->self)
595 return; 570 return;
596 571
@@ -647,8 +622,8 @@ static void pcie_update_aspm_capable(struct pcie_link_state *root)
647 if (link->root != root) 622 if (link->root != root)
648 continue; 623 continue;
649 list_for_each_entry(child, &linkbus->devices, bus_list) { 624 list_for_each_entry(child, &linkbus->devices, bus_list) {
650 if ((child->pcie_type != PCI_EXP_TYPE_ENDPOINT) && 625 if ((pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT) &&
651 (child->pcie_type != PCI_EXP_TYPE_LEG_END)) 626 (pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END))
652 continue; 627 continue;
653 pcie_aspm_check_latency(child); 628 pcie_aspm_check_latency(child);
654 } 629 }
@@ -663,8 +638,8 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
663 638
664 if (!pci_is_pcie(pdev) || !parent || !parent->link_state) 639 if (!pci_is_pcie(pdev) || !parent || !parent->link_state)
665 return; 640 return;
666 if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) && 641 if ((pci_pcie_type(parent) != PCI_EXP_TYPE_ROOT_PORT) &&
667 (parent->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)) 642 (pci_pcie_type(parent) != PCI_EXP_TYPE_DOWNSTREAM))
668 return; 643 return;
669 644
670 down_read(&pci_bus_sem); 645 down_read(&pci_bus_sem);
@@ -704,8 +679,8 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
704 679
705 if (aspm_disabled || !pci_is_pcie(pdev) || !link) 680 if (aspm_disabled || !pci_is_pcie(pdev) || !link)
706 return; 681 return;
707 if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) && 682 if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
708 (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)) 683 (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
709 return; 684 return;
710 /* 685 /*
711 * Devices changed PM state, we should recheck if latency 686 * Devices changed PM state, we should recheck if latency
@@ -729,8 +704,8 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
729 if (aspm_policy != POLICY_POWERSAVE) 704 if (aspm_policy != POLICY_POWERSAVE)
730 return; 705 return;
731 706
732 if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) && 707 if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
733 (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)) 708 (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
734 return; 709 return;
735 710
736 down_read(&pci_bus_sem); 711 down_read(&pci_bus_sem);
@@ -757,8 +732,8 @@ static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem,
757 if (!pci_is_pcie(pdev)) 732 if (!pci_is_pcie(pdev))
758 return; 733 return;
759 734
760 if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT || 735 if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
761 pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) 736 pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM)
762 parent = pdev; 737 parent = pdev;
763 if (!parent || !parent->link_state) 738 if (!parent || !parent->link_state)
764 return; 739 return;
@@ -933,8 +908,8 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
933 struct pcie_link_state *link_state = pdev->link_state; 908 struct pcie_link_state *link_state = pdev->link_state;
934 909
935 if (!pci_is_pcie(pdev) || 910 if (!pci_is_pcie(pdev) ||
936 (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && 911 (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
937 pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state) 912 pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
938 return; 913 return;
939 914
940 if (link_state->aspm_support) 915 if (link_state->aspm_support)
@@ -950,8 +925,8 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
950 struct pcie_link_state *link_state = pdev->link_state; 925 struct pcie_link_state *link_state = pdev->link_state;
951 926
952 if (!pci_is_pcie(pdev) || 927 if (!pci_is_pcie(pdev) ||
953 (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && 928 (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
954 pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state) 929 pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
955 return; 930 return;
956 931
957 if (link_state->aspm_support) 932 if (link_state->aspm_support)
diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
index 001f1b78f39c..9ca0dc9ffd84 100644
--- a/drivers/pci/pcie/pme.c
+++ b/drivers/pci/pcie/pme.c
@@ -57,17 +57,12 @@ struct pcie_pme_service_data {
57 */ 57 */
58void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable) 58void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
59{ 59{
60 int rtctl_pos;
61 u16 rtctl;
62
63 rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
64
65 pci_read_config_word(dev, rtctl_pos, &rtctl);
66 if (enable) 60 if (enable)
67 rtctl |= PCI_EXP_RTCTL_PMEIE; 61 pcie_capability_set_word(dev, PCI_EXP_RTCTL,
62 PCI_EXP_RTCTL_PMEIE);
68 else 63 else
69 rtctl &= ~PCI_EXP_RTCTL_PMEIE; 64 pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
70 pci_write_config_word(dev, rtctl_pos, rtctl); 65 PCI_EXP_RTCTL_PMEIE);
71} 66}
72 67
73/** 68/**
@@ -120,7 +115,7 @@ static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
120 if (!dev) 115 if (!dev)
121 return false; 116 return false;
122 117
123 if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) { 118 if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
124 down_read(&pci_bus_sem); 119 down_read(&pci_bus_sem);
125 if (pcie_pme_walk_bus(bus)) 120 if (pcie_pme_walk_bus(bus))
126 found = true; 121 found = true;
@@ -226,18 +221,15 @@ static void pcie_pme_work_fn(struct work_struct *work)
226 struct pcie_pme_service_data *data = 221 struct pcie_pme_service_data *data =
227 container_of(work, struct pcie_pme_service_data, work); 222 container_of(work, struct pcie_pme_service_data, work);
228 struct pci_dev *port = data->srv->port; 223 struct pci_dev *port = data->srv->port;
229 int rtsta_pos;
230 u32 rtsta; 224 u32 rtsta;
231 225
232 rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
233
234 spin_lock_irq(&data->lock); 226 spin_lock_irq(&data->lock);
235 227
236 for (;;) { 228 for (;;) {
237 if (data->noirq) 229 if (data->noirq)
238 break; 230 break;
239 231
240 pci_read_config_dword(port, rtsta_pos, &rtsta); 232 pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
241 if (rtsta & PCI_EXP_RTSTA_PME) { 233 if (rtsta & PCI_EXP_RTSTA_PME) {
242 /* 234 /*
243 * Clear PME status of the port. If there are other 235 * Clear PME status of the port. If there are other
@@ -276,17 +268,14 @@ static irqreturn_t pcie_pme_irq(int irq, void *context)
276{ 268{
277 struct pci_dev *port; 269 struct pci_dev *port;
278 struct pcie_pme_service_data *data; 270 struct pcie_pme_service_data *data;
279 int rtsta_pos;
280 u32 rtsta; 271 u32 rtsta;
281 unsigned long flags; 272 unsigned long flags;
282 273
283 port = ((struct pcie_device *)context)->port; 274 port = ((struct pcie_device *)context)->port;
284 data = get_service_data((struct pcie_device *)context); 275 data = get_service_data((struct pcie_device *)context);
285 276
286 rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
287
288 spin_lock_irqsave(&data->lock, flags); 277 spin_lock_irqsave(&data->lock, flags);
289 pci_read_config_dword(port, rtsta_pos, &rtsta); 278 pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
290 279
291 if (!(rtsta & PCI_EXP_RTSTA_PME)) { 280 if (!(rtsta & PCI_EXP_RTSTA_PME)) {
292 spin_unlock_irqrestore(&data->lock, flags); 281 spin_unlock_irqrestore(&data->lock, flags);
@@ -335,13 +324,13 @@ static void pcie_pme_mark_devices(struct pci_dev *port)
335 struct pci_dev *dev; 324 struct pci_dev *dev;
336 325
337 /* Check if this is a root port event collector. */ 326 /* Check if this is a root port event collector. */
338 if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus) 327 if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
339 return; 328 return;
340 329
341 down_read(&pci_bus_sem); 330 down_read(&pci_bus_sem);
342 list_for_each_entry(dev, &bus->devices, bus_list) 331 list_for_each_entry(dev, &bus->devices, bus_list)
343 if (pci_is_pcie(dev) 332 if (pci_is_pcie(dev)
344 && dev->pcie_type == PCI_EXP_TYPE_RC_END) 333 && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
345 pcie_pme_set_native(dev, NULL); 334 pcie_pme_set_native(dev, NULL);
346 up_read(&pci_bus_sem); 335 up_read(&pci_bus_sem);
347 } 336 }
diff --git a/drivers/pci/pcie/portdrv_bus.c b/drivers/pci/pcie/portdrv_bus.c
index 18bf90f748f6..67be55a7f260 100644
--- a/drivers/pci/pcie/portdrv_bus.c
+++ b/drivers/pci/pcie/portdrv_bus.c
@@ -38,7 +38,7 @@ static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
38 return 0; 38 return 0;
39 39
40 if ((driver->port_type != PCIE_ANY_PORT) && 40 if ((driver->port_type != PCIE_ANY_PORT) &&
41 (driver->port_type != pciedev->port->pcie_type)) 41 (driver->port_type != pci_pcie_type(pciedev->port)))
42 return 0; 42 return 0;
43 43
44 return 1; 44 return 1;
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 75915b30ad19..d03a7a39b2d8 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -200,10 +200,13 @@ static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
200{ 200{
201 int i, irq = -1; 201 int i, irq = -1;
202 202
203 /* We have to use INTx if MSI cannot be used for PCIe PME or pciehp. */ 203 /*
204 * If MSI cannot be used for PCIe PME or hotplug, we have to use
205 * INTx or other interrupts, e.g. system shared interrupt.
206 */
204 if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) || 207 if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
205 ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) { 208 ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
206 if (dev->pin) 209 if (dev->irq)
207 irq = dev->irq; 210 irq = dev->irq;
208 goto no_msi; 211 goto no_msi;
209 } 212 }
@@ -212,8 +215,12 @@ static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
212 if (!pcie_port_enable_msix(dev, irqs, mask)) 215 if (!pcie_port_enable_msix(dev, irqs, mask))
213 return 0; 216 return 0;
214 217
215 /* We're not going to use MSI-X, so try MSI and fall back to INTx */ 218 /*
216 if (!pci_enable_msi(dev) || dev->pin) 219 * We're not going to use MSI-X, so try MSI and fall back to INTx.
220 * If neither MSI/MSI-X nor INTx available, try other interrupt. On
221 * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
222 */
223 if (!pci_enable_msi(dev) || dev->irq)
217 irq = dev->irq; 224 irq = dev->irq;
218 225
219 no_msi: 226 no_msi:
@@ -246,8 +253,7 @@ static void cleanup_service_irqs(struct pci_dev *dev)
246 */ 253 */
247static int get_port_device_capability(struct pci_dev *dev) 254static int get_port_device_capability(struct pci_dev *dev)
248{ 255{
249 int services = 0, pos; 256 int services = 0;
250 u16 reg16;
251 u32 reg32; 257 u32 reg32;
252 int cap_mask = 0; 258 int cap_mask = 0;
253 int err; 259 int err;
@@ -265,11 +271,9 @@ static int get_port_device_capability(struct pci_dev *dev)
265 return 0; 271 return 0;
266 } 272 }
267 273
268 pos = pci_pcie_cap(dev);
269 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
270 /* Hot-Plug Capable */ 274 /* Hot-Plug Capable */
271 if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) { 275 if (cap_mask & PCIE_PORT_SERVICE_HP) {
272 pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32); 276 pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
273 if (reg32 & PCI_EXP_SLTCAP_HPC) { 277 if (reg32 & PCI_EXP_SLTCAP_HPC) {
274 services |= PCIE_PORT_SERVICE_HP; 278 services |= PCIE_PORT_SERVICE_HP;
275 /* 279 /*
@@ -277,10 +281,8 @@ static int get_port_device_capability(struct pci_dev *dev)
277 * enabled by the BIOS and the hot-plug service driver 281 * enabled by the BIOS and the hot-plug service driver
278 * is not loaded. 282 * is not loaded.
279 */ 283 */
280 pos += PCI_EXP_SLTCTL; 284 pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
281 pci_read_config_word(dev, pos, &reg16); 285 PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
282 reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
283 pci_write_config_word(dev, pos, reg16);
284 } 286 }
285 } 287 }
286 /* AER capable */ 288 /* AER capable */
@@ -298,7 +300,7 @@ static int get_port_device_capability(struct pci_dev *dev)
298 services |= PCIE_PORT_SERVICE_VC; 300 services |= PCIE_PORT_SERVICE_VC;
299 /* Root ports are capable of generating PME too */ 301 /* Root ports are capable of generating PME too */
300 if ((cap_mask & PCIE_PORT_SERVICE_PME) 302 if ((cap_mask & PCIE_PORT_SERVICE_PME)
301 && dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) { 303 && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
302 services |= PCIE_PORT_SERVICE_PME; 304 services |= PCIE_PORT_SERVICE_PME;
303 /* 305 /*
304 * Disable PME interrupt on this port in case it's been enabled 306 * Disable PME interrupt on this port in case it's been enabled
@@ -336,7 +338,7 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
336 device->release = release_pcie_device; /* callback to free pcie dev */ 338 device->release = release_pcie_device; /* callback to free pcie dev */
337 dev_set_name(device, "%s:pcie%02x", 339 dev_set_name(device, "%s:pcie%02x",
338 pci_name(pdev), 340 pci_name(pdev),
339 get_descriptor_id(pdev->pcie_type, service)); 341 get_descriptor_id(pci_pcie_type(pdev), service));
340 device->parent = &pdev->dev; 342 device->parent = &pdev->dev;
341 device_enable_async_suspend(device); 343 device_enable_async_suspend(device);
342 344
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index e76b44777dbf..0761d90ca279 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -64,14 +64,7 @@ __setup("pcie_ports=", pcie_port_setup);
64 */ 64 */
65void pcie_clear_root_pme_status(struct pci_dev *dev) 65void pcie_clear_root_pme_status(struct pci_dev *dev)
66{ 66{
67 int rtsta_pos; 67 pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
68 u32 rtsta;
69
70 rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
71
72 pci_read_config_dword(dev, rtsta_pos, &rtsta);
73 rtsta |= PCI_EXP_RTSTA_PME;
74 pci_write_config_dword(dev, rtsta_pos, rtsta);
75} 68}
76 69
77static int pcie_portdrv_restore_config(struct pci_dev *dev) 70static int pcie_portdrv_restore_config(struct pci_dev *dev)
@@ -95,7 +88,7 @@ static int pcie_port_resume_noirq(struct device *dev)
95 * which breaks ACPI-based runtime wakeup on PCI Express, so clear those 88 * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
96 * bits now just in case (shouldn't hurt). 89 * bits now just in case (shouldn't hurt).
97 */ 90 */
98 if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) 91 if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
99 pcie_clear_root_pme_status(pdev); 92 pcie_clear_root_pme_status(pdev);
100 return 0; 93 return 0;
101} 94}
@@ -195,9 +188,9 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
195 int status; 188 int status;
196 189
197 if (!pci_is_pcie(dev) || 190 if (!pci_is_pcie(dev) ||
198 ((dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) && 191 ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
199 (dev->pcie_type != PCI_EXP_TYPE_UPSTREAM) && 192 (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
200 (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))) 193 (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
201 return -ENODEV; 194 return -ENODEV;
202 195
203 if (!dev->irq && dev->pin) { 196 if (!dev->irq && dev->pin) {
@@ -385,11 +378,11 @@ static const struct pci_device_id port_pci_ids[] = { {
385}; 378};
386MODULE_DEVICE_TABLE(pci, port_pci_ids); 379MODULE_DEVICE_TABLE(pci, port_pci_ids);
387 380
388static struct pci_error_handlers pcie_portdrv_err_handler = { 381static const struct pci_error_handlers pcie_portdrv_err_handler = {
389 .error_detected = pcie_portdrv_error_detected, 382 .error_detected = pcie_portdrv_error_detected,
390 .mmio_enabled = pcie_portdrv_mmio_enabled, 383 .mmio_enabled = pcie_portdrv_mmio_enabled,
391 .slot_reset = pcie_portdrv_slot_reset, 384 .slot_reset = pcie_portdrv_slot_reset,
392 .resume = pcie_portdrv_err_resume, 385 .resume = pcie_portdrv_err_resume,
393}; 386};
394 387
395static struct pci_driver pcie_portdriver = { 388static struct pci_driver pcie_portdriver = {
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 9f8a6b79a8ec..ec909afa90b6 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -606,10 +606,10 @@ static void pci_set_bus_speed(struct pci_bus *bus)
606 u32 linkcap; 606 u32 linkcap;
607 u16 linksta; 607 u16 linksta;
608 608
609 pci_read_config_dword(bridge, pos + PCI_EXP_LNKCAP, &linkcap); 609 pcie_capability_read_dword(bridge, PCI_EXP_LNKCAP, &linkcap);
610 bus->max_bus_speed = pcie_link_speed[linkcap & 0xf]; 610 bus->max_bus_speed = pcie_link_speed[linkcap & 0xf];
611 611
612 pci_read_config_word(bridge, pos + PCI_EXP_LNKSTA, &linksta); 612 pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta);
613 pcie_update_link_speed(bus, linksta); 613 pcie_update_link_speed(bus, linksta);
614 } 614 }
615} 615}
@@ -729,8 +729,10 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
729 729
730 /* Check if setup is sensible at all */ 730 /* Check if setup is sensible at all */
731 if (!pass && 731 if (!pass &&
732 (primary != bus->number || secondary <= bus->number)) { 732 (primary != bus->number || secondary <= bus->number ||
733 dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n"); 733 secondary > subordinate)) {
734 dev_info(&dev->dev, "bridge configuration invalid ([bus %02x-%02x]), reconfiguring\n",
735 secondary, subordinate);
734 broken = 1; 736 broken = 1;
735 } 737 }
736 738
@@ -932,24 +934,16 @@ void set_pcie_port_type(struct pci_dev *pdev)
932 pdev->is_pcie = 1; 934 pdev->is_pcie = 1;
933 pdev->pcie_cap = pos; 935 pdev->pcie_cap = pos;
934 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16); 936 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
935 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4; 937 pdev->pcie_flags_reg = reg16;
936 pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, &reg16); 938 pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, &reg16);
937 pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD; 939 pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
938} 940}
939 941
940void set_pcie_hotplug_bridge(struct pci_dev *pdev) 942void set_pcie_hotplug_bridge(struct pci_dev *pdev)
941{ 943{
942 int pos;
943 u16 reg16;
944 u32 reg32; 944 u32 reg32;
945 945
946 pos = pci_pcie_cap(pdev); 946 pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32);
947 if (!pos)
948 return;
949 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
950 if (!(reg16 & PCI_EXP_FLAGS_SLOT))
951 return;
952 pci_read_config_dword(pdev, pos + PCI_EXP_SLTCAP, &reg32);
953 if (reg32 & PCI_EXP_SLTCAP_HPC) 947 if (reg32 & PCI_EXP_SLTCAP_HPC)
954 pdev->is_hotplug_bridge = 1; 948 pdev->is_hotplug_bridge = 1;
955} 949}
@@ -1163,8 +1157,7 @@ int pci_cfg_space_size(struct pci_dev *dev)
1163 if (class == PCI_CLASS_BRIDGE_HOST) 1157 if (class == PCI_CLASS_BRIDGE_HOST)
1164 return pci_cfg_space_size_ext(dev); 1158 return pci_cfg_space_size_ext(dev);
1165 1159
1166 pos = pci_pcie_cap(dev); 1160 if (!pci_is_pcie(dev)) {
1167 if (!pos) {
1168 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); 1161 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
1169 if (!pos) 1162 if (!pos)
1170 goto fail; 1163 goto fail;
@@ -1386,9 +1379,9 @@ static int only_one_child(struct pci_bus *bus)
1386 1379
1387 if (!parent || !pci_is_pcie(parent)) 1380 if (!parent || !pci_is_pcie(parent))
1388 return 0; 1381 return 0;
1389 if (parent->pcie_type == PCI_EXP_TYPE_ROOT_PORT) 1382 if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
1390 return 1; 1383 return 1;
1391 if (parent->pcie_type == PCI_EXP_TYPE_DOWNSTREAM && 1384 if (pci_pcie_type(parent) == PCI_EXP_TYPE_DOWNSTREAM &&
1392 !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS)) 1385 !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
1393 return 1; 1386 return 1;
1394 return 0; 1387 return 0;
@@ -1465,7 +1458,7 @@ static int pcie_find_smpss(struct pci_dev *dev, void *data)
1465 */ 1458 */
1466 if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) || 1459 if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) ||
1467 (dev->bus->self && 1460 (dev->bus->self &&
1468 dev->bus->self->pcie_type != PCI_EXP_TYPE_ROOT_PORT))) 1461 pci_pcie_type(dev->bus->self) != PCI_EXP_TYPE_ROOT_PORT)))
1469 *smpss = 0; 1462 *smpss = 0;
1470 1463
1471 if (*smpss > dev->pcie_mpss) 1464 if (*smpss > dev->pcie_mpss)
@@ -1481,7 +1474,8 @@ static void pcie_write_mps(struct pci_dev *dev, int mps)
1481 if (pcie_bus_config == PCIE_BUS_PERFORMANCE) { 1474 if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
1482 mps = 128 << dev->pcie_mpss; 1475 mps = 128 << dev->pcie_mpss;
1483 1476
1484 if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && dev->bus->self) 1477 if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT &&
1478 dev->bus->self)
1485 /* For "Performance", the assumption is made that 1479 /* For "Performance", the assumption is made that
1486 * downstream communication will never be larger than 1480 * downstream communication will never be larger than
1487 * the MRRS. So, the MPS only needs to be configured 1481 * the MRRS. So, the MPS only needs to be configured
@@ -1756,11 +1750,6 @@ int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int bus_max)
1756 "busn_res: can not insert %pR under %s%pR (conflicts with %s %pR)\n", 1750 "busn_res: can not insert %pR under %s%pR (conflicts with %s %pR)\n",
1757 res, pci_is_root_bus(b) ? "domain " : "", 1751 res, pci_is_root_bus(b) ? "domain " : "",
1758 parent_res, conflict->name, conflict); 1752 parent_res, conflict->name, conflict);
1759 else
1760 dev_printk(KERN_DEBUG, &b->dev,
1761 "busn_res: %pR is inserted under %s%pR\n",
1762 res, pci_is_root_bus(b) ? "domain " : "",
1763 parent_res);
1764 1753
1765 return conflict == NULL; 1754 return conflict == NULL;
1766} 1755}
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 27911b55c2a5..eb907a8faf2a 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -434,25 +434,6 @@ int pci_proc_detach_device(struct pci_dev *dev)
434 return 0; 434 return 0;
435} 435}
436 436
437#if 0
438int pci_proc_attach_bus(struct pci_bus* bus)
439{
440 struct proc_dir_entry *de = bus->procdir;
441
442 if (!proc_initialized)
443 return -EACCES;
444
445 if (!de) {
446 char name[16];
447 sprintf(name, "%02x", bus->number);
448 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
449 if (!de)
450 return -ENOMEM;
451 }
452 return 0;
453}
454#endif /* 0 */
455
456int pci_proc_detach_bus(struct pci_bus* bus) 437int pci_proc_detach_bus(struct pci_bus* bus)
457{ 438{
458 struct proc_dir_entry *de = bus->procdir; 439 struct proc_dir_entry *de = bus->procdir;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 51553179e967..7a451ff56ecc 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3081,17 +3081,36 @@ static int reset_intel_generic_dev(struct pci_dev *dev, int probe)
3081 3081
3082static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe) 3082static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe)
3083{ 3083{
3084 int pos; 3084 int i;
3085 u16 status;
3085 3086
3086 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 3087 /*
3087 if (!pos) 3088 * http://www.intel.com/content/dam/doc/datasheet/82599-10-gbe-controller-datasheet.pdf
3088 return -ENOTTY; 3089 *
3090 * The 82599 supports FLR on VFs, but FLR support is reported only
3091 * in the PF DEVCAP (sec 9.3.10.4), not in the VF DEVCAP (sec 9.5).
3092 * Therefore, we can't use pcie_flr(), which checks the VF DEVCAP.
3093 */
3089 3094
3090 if (probe) 3095 if (probe)
3091 return 0; 3096 return 0;
3092 3097
3093 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, 3098 /* Wait for Transaction Pending bit clean */
3094 PCI_EXP_DEVCTL_BCR_FLR); 3099 for (i = 0; i < 4; i++) {
3100 if (i)
3101 msleep((1 << (i - 1)) * 100);
3102
3103 pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
3104 if (!(status & PCI_EXP_DEVSTA_TRPND))
3105 goto clear;
3106 }
3107
3108 dev_err(&dev->dev, "transaction is not cleared; "
3109 "proceeding with reset anyway\n");
3110
3111clear:
3112 pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
3113
3095 msleep(100); 3114 msleep(100);
3096 3115
3097 return 0; 3116 return 0;
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 04a4861b4749..513972f3ed13 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -32,152 +32,82 @@ static void pci_stop_dev(struct pci_dev *dev)
32 32
33static void pci_destroy_dev(struct pci_dev *dev) 33static void pci_destroy_dev(struct pci_dev *dev)
34{ 34{
35 /* Remove the device from the device lists, and prevent any further
36 * list accesses from this device */
37 down_write(&pci_bus_sem); 35 down_write(&pci_bus_sem);
38 list_del(&dev->bus_list); 36 list_del(&dev->bus_list);
39 dev->bus_list.next = dev->bus_list.prev = NULL;
40 up_write(&pci_bus_sem); 37 up_write(&pci_bus_sem);
41 38
42 pci_free_resources(dev); 39 pci_free_resources(dev);
43 pci_dev_put(dev); 40 pci_dev_put(dev);
44} 41}
45 42
46/** 43void pci_remove_bus(struct pci_bus *bus)
47 * pci_remove_device_safe - remove an unused hotplug device
48 * @dev: the device to remove
49 *
50 * Delete the device structure from the device lists and
51 * notify userspace (/sbin/hotplug), but only if the device
52 * in question is not being used by a driver.
53 * Returns 0 on success.
54 */
55#if 0
56int pci_remove_device_safe(struct pci_dev *dev)
57{
58 if (pci_dev_driver(dev))
59 return -EBUSY;
60 pci_destroy_dev(dev);
61 return 0;
62}
63#endif /* 0 */
64
65void pci_remove_bus(struct pci_bus *pci_bus)
66{ 44{
67 pci_proc_detach_bus(pci_bus); 45 pci_proc_detach_bus(bus);
68 46
69 down_write(&pci_bus_sem); 47 down_write(&pci_bus_sem);
70 list_del(&pci_bus->node); 48 list_del(&bus->node);
71 pci_bus_release_busn_res(pci_bus); 49 pci_bus_release_busn_res(bus);
72 up_write(&pci_bus_sem); 50 up_write(&pci_bus_sem);
73 if (!pci_bus->is_added) 51 if (!bus->is_added)
74 return; 52 return;
75 53
76 pci_remove_legacy_files(pci_bus); 54 pci_remove_legacy_files(bus);
77 device_unregister(&pci_bus->dev); 55 device_unregister(&bus->dev);
78} 56}
79EXPORT_SYMBOL(pci_remove_bus); 57EXPORT_SYMBOL(pci_remove_bus);
80 58
81static void __pci_remove_behind_bridge(struct pci_dev *dev); 59static void pci_stop_bus_device(struct pci_dev *dev)
82/**
83 * pci_stop_and_remove_bus_device - remove a PCI device and any children
84 * @dev: the device to remove
85 *
86 * Remove a PCI device from the device lists, informing the drivers
87 * that the device has been removed. We also remove any subordinate
88 * buses and children in a depth-first manner.
89 *
90 * For each device we remove, delete the device structure from the
91 * device lists, remove the /proc entry, and notify userspace
92 * (/sbin/hotplug).
93 */
94void __pci_remove_bus_device(struct pci_dev *dev)
95{ 60{
96 if (dev->subordinate) { 61 struct pci_bus *bus = dev->subordinate;
97 struct pci_bus *b = dev->subordinate; 62 struct pci_dev *child, *tmp;
98 63
99 __pci_remove_behind_bridge(dev); 64 /*
100 pci_remove_bus(b); 65 * Stopping an SR-IOV PF device removes all the associated VFs,
101 dev->subordinate = NULL; 66 * which will update the bus->devices list and confuse the
67 * iterator. Therefore, iterate in reverse so we remove the VFs
68 * first, then the PF.
69 */
70 if (bus) {
71 list_for_each_entry_safe_reverse(child, tmp,
72 &bus->devices, bus_list)
73 pci_stop_bus_device(child);
102 } 74 }
103 75
104 pci_destroy_dev(dev); 76 pci_stop_dev(dev);
105}
106EXPORT_SYMBOL(__pci_remove_bus_device);
107
108void pci_stop_and_remove_bus_device(struct pci_dev *dev)
109{
110 pci_stop_bus_device(dev);
111 __pci_remove_bus_device(dev);
112} 77}
113 78
114static void __pci_remove_behind_bridge(struct pci_dev *dev) 79static void pci_remove_bus_device(struct pci_dev *dev)
115{ 80{
116 struct list_head *l, *n; 81 struct pci_bus *bus = dev->subordinate;
82 struct pci_dev *child, *tmp;
117 83
118 if (dev->subordinate) 84 if (bus) {
119 list_for_each_safe(l, n, &dev->subordinate->devices) 85 list_for_each_entry_safe(child, tmp,
120 __pci_remove_bus_device(pci_dev_b(l)); 86 &bus->devices, bus_list)
121} 87 pci_remove_bus_device(child);
122 88
123static void pci_stop_behind_bridge(struct pci_dev *dev) 89 pci_remove_bus(bus);
124{ 90 dev->subordinate = NULL;
125 struct list_head *l, *n; 91 }
126 92
127 if (dev->subordinate) 93 pci_destroy_dev(dev);
128 list_for_each_safe(l, n, &dev->subordinate->devices)
129 pci_stop_bus_device(pci_dev_b(l));
130} 94}
131 95
132/** 96/**
133 * pci_stop_and_remove_behind_bridge - stop and remove all devices behind 97 * pci_stop_and_remove_bus_device - remove a PCI device and any children
134 * a PCI bridge 98 * @dev: the device to remove
135 * @dev: PCI bridge device
136 * 99 *
137 * Remove all devices on the bus, except for the parent bridge. 100 * Remove a PCI device from the device lists, informing the drivers
138 * This also removes any child buses, and any devices they may 101 * that the device has been removed. We also remove any subordinate
139 * contain in a depth-first manner. 102 * buses and children in a depth-first manner.
140 */
141void pci_stop_and_remove_behind_bridge(struct pci_dev *dev)
142{
143 pci_stop_behind_bridge(dev);
144 __pci_remove_behind_bridge(dev);
145}
146
147static void pci_stop_bus_devices(struct pci_bus *bus)
148{
149 struct list_head *l, *n;
150
151 /*
152 * VFs could be removed by pci_stop_and_remove_bus_device() in the
153 * pci_stop_bus_devices() code path for PF.
154 * aka, bus->devices get updated in the process.
155 * but VFs are inserted after PFs when SRIOV is enabled for PF,
156 * We can iterate the list backwards to get prev valid PF instead
157 * of removed VF.
158 */
159 list_for_each_prev_safe(l, n, &bus->devices) {
160 struct pci_dev *dev = pci_dev_b(l);
161 pci_stop_bus_device(dev);
162 }
163}
164
165/**
166 * pci_stop_bus_device - stop a PCI device and any children
167 * @dev: the device to stop
168 * 103 *
169 * Stop a PCI device (detach the driver, remove from the global list 104 * For each device we remove, delete the device structure from the
170 * and so on). This also stop any subordinate buses and children in a 105 * device lists, remove the /proc entry, and notify userspace
171 * depth-first manner. 106 * (/sbin/hotplug).
172 */ 107 */
173void pci_stop_bus_device(struct pci_dev *dev) 108void pci_stop_and_remove_bus_device(struct pci_dev *dev)
174{ 109{
175 if (dev->subordinate) 110 pci_stop_bus_device(dev);
176 pci_stop_bus_devices(dev->subordinate); 111 pci_remove_bus_device(dev);
177
178 pci_stop_dev(dev);
179} 112}
180
181EXPORT_SYMBOL(pci_stop_and_remove_bus_device); 113EXPORT_SYMBOL(pci_stop_and_remove_bus_device);
182EXPORT_SYMBOL(pci_stop_and_remove_behind_bridge);
183EXPORT_SYMBOL_GPL(pci_stop_bus_device);
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index 48ebdb237f3f..0b3037ab8b93 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -167,44 +167,6 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
167 return rom; 167 return rom;
168} 168}
169 169
170#if 0
171/**
172 * pci_map_rom_copy - map a PCI ROM to kernel space, create a copy
173 * @pdev: pointer to pci device struct
174 * @size: pointer to receive size of pci window over ROM
175 *
176 * Return: kernel virtual pointer to image of ROM
177 *
178 * Map a PCI ROM into kernel space. If ROM is boot video ROM,
179 * the shadow BIOS copy will be returned instead of the
180 * actual ROM.
181 */
182void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size)
183{
184 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
185 void __iomem *rom;
186
187 rom = pci_map_rom(pdev, size);
188 if (!rom)
189 return NULL;
190
191 if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW |
192 IORESOURCE_ROM_BIOS_COPY))
193 return rom;
194
195 res->start = (unsigned long)kmalloc(*size, GFP_KERNEL);
196 if (!res->start)
197 return rom;
198
199 res->end = res->start + *size;
200 memcpy_fromio((void*)(unsigned long)res->start, rom, *size);
201 pci_unmap_rom(pdev, rom);
202 res->flags |= IORESOURCE_ROM_COPY;
203
204 return (void __iomem *)(unsigned long)res->start;
205}
206#endif /* 0 */
207
208/** 170/**
209 * pci_unmap_rom - unmap the ROM from kernel space 171 * pci_unmap_rom - unmap the ROM from kernel space
210 * @pdev: pointer to pci device struct 172 * @pdev: pointer to pci device struct
@@ -226,27 +188,6 @@ void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
226 pci_disable_rom(pdev); 188 pci_disable_rom(pdev);
227} 189}
228 190
229#if 0
230/**
231 * pci_remove_rom - disable the ROM and remove its sysfs attribute
232 * @pdev: pointer to pci device struct
233 *
234 * Remove the rom file in sysfs and disable ROM decoding.
235 */
236void pci_remove_rom(struct pci_dev *pdev)
237{
238 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
239
240 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
241 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
242 if (!(res->flags & (IORESOURCE_ROM_ENABLE |
243 IORESOURCE_ROM_SHADOW |
244 IORESOURCE_ROM_BIOS_COPY |
245 IORESOURCE_ROM_COPY)))
246 pci_disable_rom(pdev);
247}
248#endif /* 0 */
249
250/** 191/**
251 * pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy 192 * pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy
252 * @pdev: pointer to pci device struct 193 * @pdev: pointer to pci device struct
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index 993d4a0a2469..bf969ba58e59 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -41,7 +41,7 @@ pci_find_upstream_pcie_bridge(struct pci_dev *pdev)
41 continue; 41 continue;
42 } 42 }
43 /* PCI device should connect to a PCIe bridge */ 43 /* PCI device should connect to a PCIe bridge */
44 if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) { 44 if (pci_pcie_type(pdev) != PCI_EXP_TYPE_PCI_BRIDGE) {
45 /* Busted hardware? */ 45 /* Busted hardware? */
46 WARN_ON_ONCE(1); 46 WARN_ON_ONCE(1);
47 return NULL; 47 return NULL;
@@ -130,16 +130,14 @@ pci_find_next_bus(const struct pci_bus *from)
130 * decrement the reference count by calling pci_dev_put(). 130 * decrement the reference count by calling pci_dev_put().
131 * If no device is found, %NULL is returned. 131 * If no device is found, %NULL is returned.
132 */ 132 */
133struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn) 133struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn)
134{ 134{
135 struct list_head *tmp;
136 struct pci_dev *dev; 135 struct pci_dev *dev;
137 136
138 WARN_ON(in_interrupt()); 137 WARN_ON(in_interrupt());
139 down_read(&pci_bus_sem); 138 down_read(&pci_bus_sem);
140 139
141 list_for_each(tmp, &bus->devices) { 140 list_for_each_entry(dev, &bus->devices, bus_list) {
142 dev = pci_dev_b(tmp);
143 if (dev->devfn == devfn) 141 if (dev->devfn == devfn)
144 goto out; 142 goto out;
145 } 143 }
@@ -245,30 +243,14 @@ struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
245 unsigned int ss_vendor, unsigned int ss_device, 243 unsigned int ss_vendor, unsigned int ss_device,
246 struct pci_dev *from) 244 struct pci_dev *from)
247{ 245{
248 struct pci_dev *pdev; 246 struct pci_device_id id = {
249 struct pci_device_id *id; 247 .vendor = vendor,
250 248 .device = device,
251 /* 249 .subvendor = ss_vendor,
252 * pci_find_subsys() can be called on the ide_setup() path, 250 .subdevice = ss_device,
253 * super-early in boot. But the down_read() will enable local 251 };
254 * interrupts, which can cause some machines to crash. So here we 252
255 * detect and flag that situation and bail out early. 253 return pci_get_dev_by_id(&id, from);
256 */
257 if (unlikely(no_pci_devices()))
258 return NULL;
259
260 id = kzalloc(sizeof(*id), GFP_KERNEL);
261 if (!id)
262 return NULL;
263 id->vendor = vendor;
264 id->device = device;
265 id->subvendor = ss_vendor;
266 id->subdevice = ss_device;
267
268 pdev = pci_get_dev_by_id(id, from);
269 kfree(id);
270
271 return pdev;
272} 254}
273 255
274/** 256/**
@@ -307,19 +289,16 @@ pci_get_device(unsigned int vendor, unsigned int device, struct pci_dev *from)
307 */ 289 */
308struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from) 290struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
309{ 291{
310 struct pci_dev *dev; 292 struct pci_device_id id = {
311 struct pci_device_id *id; 293 .vendor = PCI_ANY_ID,
312 294 .device = PCI_ANY_ID,
313 id = kzalloc(sizeof(*id), GFP_KERNEL); 295 .subvendor = PCI_ANY_ID,
314 if (!id) 296 .subdevice = PCI_ANY_ID,
315 return NULL; 297 .class_mask = PCI_ANY_ID,
316 id->vendor = id->device = id->subvendor = id->subdevice = PCI_ANY_ID; 298 .class = class,
317 id->class_mask = PCI_ANY_ID; 299 };
318 id->class = class; 300
319 301 return pci_get_dev_by_id(&id, from);
320 dev = pci_get_dev_by_id(id, from);
321 kfree(id);
322 return dev;
323} 302}
324 303
325/** 304/**
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index fb506137aaee..1e808ca338f8 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -697,6 +697,38 @@ static resource_size_t calculate_memsize(resource_size_t size,
697 return size; 697 return size;
698} 698}
699 699
700resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
701 unsigned long type)
702{
703 return 1;
704}
705
706#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */
707#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
708#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
709
710static resource_size_t window_alignment(struct pci_bus *bus,
711 unsigned long type)
712{
713 resource_size_t align = 1, arch_align;
714
715 if (type & IORESOURCE_MEM)
716 align = PCI_P2P_DEFAULT_MEM_ALIGN;
717 else if (type & IORESOURCE_IO) {
718 /*
719 * Per spec, I/O windows are 4K-aligned, but some
720 * bridges have an extension to support 1K alignment.
721 */
722 if (bus->self->io_window_1k)
723 align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
724 else
725 align = PCI_P2P_DEFAULT_IO_ALIGN;
726 }
727
728 arch_align = pcibios_window_alignment(bus, type);
729 return max(align, arch_align);
730}
731
700/** 732/**
701 * pbus_size_io() - size the io window of a given bus 733 * pbus_size_io() - size the io window of a given bus
702 * 734 *
@@ -717,17 +749,12 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
717 struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO); 749 struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
718 unsigned long size = 0, size0 = 0, size1 = 0; 750 unsigned long size = 0, size0 = 0, size1 = 0;
719 resource_size_t children_add_size = 0; 751 resource_size_t children_add_size = 0;
720 resource_size_t min_align = 4096, align; 752 resource_size_t min_align, io_align, align;
721 753
722 if (!b_res) 754 if (!b_res)
723 return; 755 return;
724 756
725 /* 757 io_align = min_align = window_alignment(bus, IORESOURCE_IO);
726 * Per spec, I/O windows are 4K-aligned, but some bridges have an
727 * extension to support 1K alignment.
728 */
729 if (bus->self->io_window_1k)
730 min_align = 1024;
731 list_for_each_entry(dev, &bus->devices, bus_list) { 758 list_for_each_entry(dev, &bus->devices, bus_list) {
732 int i; 759 int i;
733 760
@@ -754,8 +781,8 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
754 } 781 }
755 } 782 }
756 783
757 if (min_align > 4096) 784 if (min_align > io_align)
758 min_align = 4096; 785 min_align = io_align;
759 786
760 size0 = calculate_iosize(size, min_size, size1, 787 size0 = calculate_iosize(size, min_size, size1,
761 resource_size(b_res), min_align); 788 resource_size(b_res), min_align);
@@ -785,6 +812,28 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
785 } 812 }
786} 813}
787 814
815static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
816 int max_order)
817{
818 resource_size_t align = 0;
819 resource_size_t min_align = 0;
820 int order;
821
822 for (order = 0; order <= max_order; order++) {
823 resource_size_t align1 = 1;
824
825 align1 <<= (order + 20);
826
827 if (!align)
828 min_align = align1;
829 else if (ALIGN(align + min_align, min_align) < align1)
830 min_align = align1 >> 1;
831 align += aligns[order];
832 }
833
834 return min_align;
835}
836
788/** 837/**
789 * pbus_size_mem() - size the memory window of a given bus 838 * pbus_size_mem() - size the memory window of a given bus
790 * 839 *
@@ -864,19 +913,9 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
864 children_add_size += get_res_add_size(realloc_head, r); 913 children_add_size += get_res_add_size(realloc_head, r);
865 } 914 }
866 } 915 }
867 align = 0;
868 min_align = 0;
869 for (order = 0; order <= max_order; order++) {
870 resource_size_t align1 = 1;
871 916
872 align1 <<= (order + 20); 917 min_align = calculate_mem_align(aligns, max_order);
873 918 min_align = max(min_align, window_alignment(bus, b_res->flags & mask));
874 if (!align)
875 min_align = align1;
876 else if (ALIGN(align + min_align, min_align) < align1)
877 min_align = align1 >> 1;
878 align += aligns[order];
879 }
880 size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align); 919 size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
881 if (children_add_size > add_size) 920 if (children_add_size > add_size)
882 add_size = children_add_size; 921 add_size = children_add_size;
diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c
index eb219a1d16f7..9bd6864ec5d3 100644
--- a/drivers/pci/setup-irq.c
+++ b/drivers/pci/setup-irq.c
@@ -17,8 +17,13 @@
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/cache.h> 18#include <linux/cache.h>
19 19
20void __weak pcibios_update_irq(struct pci_dev *dev, int irq)
21{
22 dev_dbg(&dev->dev, "assigning IRQ %02d\n", irq);
23 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
24}
20 25
21static void __init 26static void
22pdev_fixup_irq(struct pci_dev *dev, 27pdev_fixup_irq(struct pci_dev *dev,
23 u8 (*swizzle)(struct pci_dev *, u8 *), 28 u8 (*swizzle)(struct pci_dev *, u8 *),
24 int (*map_irq)(const struct pci_dev *, u8, u8)) 29 int (*map_irq)(const struct pci_dev *, u8, u8))
@@ -54,7 +59,7 @@ pdev_fixup_irq(struct pci_dev *dev,
54 pcibios_update_irq(dev, irq); 59 pcibios_update_irq(dev, irq);
55} 60}
56 61
57void __init 62void
58pci_fixup_irqs(u8 (*swizzle)(struct pci_dev *, u8 *), 63pci_fixup_irqs(u8 (*swizzle)(struct pci_dev *, u8 *),
59 int (*map_irq)(const struct pci_dev *, u8, u8)) 64 int (*map_irq)(const struct pci_dev *, u8, u8))
60{ 65{
diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c
index d6cc62cb4cf7..def8d0b5620c 100644
--- a/drivers/pci/xen-pcifront.c
+++ b/drivers/pci/xen-pcifront.c
@@ -982,7 +982,6 @@ static int pcifront_detach_devices(struct pcifront_device *pdev)
982 int err = 0; 982 int err = 0;
983 int i, num_devs; 983 int i, num_devs;
984 unsigned int domain, bus, slot, func; 984 unsigned int domain, bus, slot, func;
985 struct pci_bus *pci_bus;
986 struct pci_dev *pci_dev; 985 struct pci_dev *pci_dev;
987 char str[64]; 986 char str[64];
988 987
@@ -1032,13 +1031,8 @@ static int pcifront_detach_devices(struct pcifront_device *pdev)
1032 goto out; 1031 goto out;
1033 } 1032 }
1034 1033
1035 pci_bus = pci_find_bus(domain, bus); 1034 pci_dev = pci_get_domain_bus_and_slot(domain, bus,
1036 if (!pci_bus) { 1035 PCI_DEVFN(slot, func));
1037 dev_dbg(&pdev->xdev->dev, "Cannot get bus %04x:%02x\n",
1038 domain, bus);
1039 continue;
1040 }
1041 pci_dev = pci_get_slot(pci_bus, PCI_DEVFN(slot, func));
1042 if (!pci_dev) { 1036 if (!pci_dev) {
1043 dev_dbg(&pdev->xdev->dev, 1037 dev_dbg(&pdev->xdev->dev,
1044 "Cannot get PCI device %04x:%02x:%02x.%d\n", 1038 "Cannot get PCI device %04x:%02x:%02x.%d\n",
diff --git a/drivers/pcmcia/cardbus.c b/drivers/pcmcia/cardbus.c
index 24caeaf50529..9d3ac998fc1f 100644
--- a/drivers/pcmcia/cardbus.c
+++ b/drivers/pcmcia/cardbus.c
@@ -105,8 +105,17 @@ int __ref cb_alloc(struct pcmcia_socket *s)
105 */ 105 */
106void cb_free(struct pcmcia_socket *s) 106void cb_free(struct pcmcia_socket *s)
107{ 107{
108 struct pci_dev *bridge = s->cb_dev; 108 struct pci_dev *bridge, *dev, *tmp;
109 struct pci_bus *bus;
109 110
110 if (bridge) 111 bridge = s->cb_dev;
111 pci_stop_and_remove_behind_bridge(bridge); 112 if (!bridge)
113 return;
114
115 bus = bridge->subordinate;
116 if (!bus)
117 return;
118
119 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list)
120 pci_stop_and_remove_bus_device(dev);
112} 121}
diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c
index 5d44252b7342..d5e1625bbac2 100644
--- a/drivers/rapidio/devices/tsi721.c
+++ b/drivers/rapidio/devices/tsi721.c
@@ -2219,9 +2219,7 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,
2219 const struct pci_device_id *id) 2219 const struct pci_device_id *id)
2220{ 2220{
2221 struct tsi721_device *priv; 2221 struct tsi721_device *priv;
2222 int cap;
2223 int err; 2222 int err;
2224 u32 regval;
2225 2223
2226 priv = kzalloc(sizeof(struct tsi721_device), GFP_KERNEL); 2224 priv = kzalloc(sizeof(struct tsi721_device), GFP_KERNEL);
2227 if (priv == NULL) { 2225 if (priv == NULL) {
@@ -2330,20 +2328,16 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,
2330 dev_info(&pdev->dev, "Unable to set consistent DMA mask\n"); 2328 dev_info(&pdev->dev, "Unable to set consistent DMA mask\n");
2331 } 2329 }
2332 2330
2333 cap = pci_pcie_cap(pdev); 2331 BUG_ON(!pci_is_pcie(pdev));
2334 BUG_ON(cap == 0);
2335 2332
2336 /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */ 2333 /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */
2337 pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL, &regval); 2334 pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
2338 regval &= ~(PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN | 2335 PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
2339 PCI_EXP_DEVCTL_NOSNOOP_EN); 2336 PCI_EXP_DEVCTL_NOSNOOP_EN,
2340 regval |= 0x2 << MAX_READ_REQUEST_SZ_SHIFT; 2337 0x2 << MAX_READ_REQUEST_SZ_SHIFT);
2341 pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL, regval);
2342 2338
2343 /* Adjust PCIe completion timeout. */ 2339 /* Adjust PCIe completion timeout. */
2344 pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL2, &regval); 2340 pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL2, 0xf, 0x2);
2345 regval &= ~(0x0f);
2346 pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL2, regval | 0x2);
2347 2341
2348 /* 2342 /*
2349 * FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block 2343 * FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 1059c99690e6..0a2c5a8ebb82 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -9228,7 +9228,7 @@ static struct pci_device_id ipr_pci_table[] __devinitdata = {
9228}; 9228};
9229MODULE_DEVICE_TABLE(pci, ipr_pci_table); 9229MODULE_DEVICE_TABLE(pci, ipr_pci_table);
9230 9230
9231static struct pci_error_handlers ipr_err_handler = { 9231static const struct pci_error_handlers ipr_err_handler = {
9232 .error_detected = ipr_pci_error_detected, 9232 .error_detected = ipr_pci_error_detected,
9233 .slot_reset = ipr_pci_slot_reset, 9233 .slot_reset = ipr_pci_slot_reset,
9234}; 9234};
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 29937b606c84..628a703abddb 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -10425,7 +10425,7 @@ static struct pci_device_id lpfc_id_table[] = {
10425 10425
10426MODULE_DEVICE_TABLE(pci, lpfc_id_table); 10426MODULE_DEVICE_TABLE(pci, lpfc_id_table);
10427 10427
10428static struct pci_error_handlers lpfc_err_handler = { 10428static const struct pci_error_handlers lpfc_err_handler = {
10429 .error_detected = lpfc_io_error_detected, 10429 .error_detected = lpfc_io_error_detected,
10430 .slot_reset = lpfc_io_slot_reset, 10430 .slot_reset = lpfc_io_slot_reset,
10431 .resume = lpfc_io_resume, 10431 .resume = lpfc_io_resume,
diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
index b1ebd6f8dab3..1ccae45c5270 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
@@ -8306,7 +8306,7 @@ _scsih_pci_mmio_enabled(struct pci_dev *pdev)
8306 return PCI_ERS_RESULT_NEED_RESET; 8306 return PCI_ERS_RESULT_NEED_RESET;
8307} 8307}
8308 8308
8309static struct pci_error_handlers _scsih_err_handler = { 8309static const struct pci_error_handlers _scsih_err_handler = {
8310 .error_detected = _scsih_pci_error_detected, 8310 .error_detected = _scsih_pci_error_detected,
8311 .mmio_enabled = _scsih_pci_mmio_enabled, 8311 .mmio_enabled = _scsih_pci_mmio_enabled,
8312 .slot_reset = _scsih_pci_slot_reset, 8312 .slot_reset = _scsih_pci_slot_reset,
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c
index 9ce3a8f8754f..7cfdf2bd8edb 100644
--- a/drivers/scsi/qla2xxx/qla_nx.c
+++ b/drivers/scsi/qla2xxx/qla_nx.c
@@ -1615,13 +1615,11 @@ qla82xx_get_fw_offs(struct qla_hw_data *ha)
1615char * 1615char *
1616qla82xx_pci_info_str(struct scsi_qla_host *vha, char *str) 1616qla82xx_pci_info_str(struct scsi_qla_host *vha, char *str)
1617{ 1617{
1618 int pcie_reg;
1619 struct qla_hw_data *ha = vha->hw; 1618 struct qla_hw_data *ha = vha->hw;
1620 char lwstr[6]; 1619 char lwstr[6];
1621 uint16_t lnk; 1620 uint16_t lnk;
1622 1621
1623 pcie_reg = pci_pcie_cap(ha->pdev); 1622 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk);
1624 pci_read_config_word(ha->pdev, pcie_reg + PCI_EXP_LNKSTA, &lnk);
1625 ha->link_width = (lnk >> 4) & 0x3f; 1623 ha->link_width = (lnk >> 4) & 0x3f;
1626 1624
1627 strcpy(str, "PCIe ("); 1625 strcpy(str, "PCIe (");
@@ -2497,7 +2495,6 @@ fw_load_failed:
2497int 2495int
2498qla82xx_start_firmware(scsi_qla_host_t *vha) 2496qla82xx_start_firmware(scsi_qla_host_t *vha)
2499{ 2497{
2500 int pcie_cap;
2501 uint16_t lnk; 2498 uint16_t lnk;
2502 struct qla_hw_data *ha = vha->hw; 2499 struct qla_hw_data *ha = vha->hw;
2503 2500
@@ -2528,8 +2525,7 @@ qla82xx_start_firmware(scsi_qla_host_t *vha)
2528 } 2525 }
2529 2526
2530 /* Negotiated Link width */ 2527 /* Negotiated Link width */
2531 pcie_cap = pci_pcie_cap(ha->pdev); 2528 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk);
2532 pci_read_config_word(ha->pdev, pcie_cap + PCI_EXP_LNKSTA, &lnk);
2533 ha->link_width = (lnk >> 4) & 0x3f; 2529 ha->link_width = (lnk >> 4) & 0x3f;
2534 2530
2535 /* Synchronize with Receive peg */ 2531 /* Synchronize with Receive peg */
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index fb8cd3847d4b..d3052622e77a 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -4471,7 +4471,7 @@ qla2xxx_pci_resume(struct pci_dev *pdev)
4471 ha->flags.eeh_busy = 0; 4471 ha->flags.eeh_busy = 0;
4472} 4472}
4473 4473
4474static struct pci_error_handlers qla2xxx_err_handler = { 4474static const struct pci_error_handlers qla2xxx_err_handler = {
4475 .error_detected = qla2xxx_pci_error_detected, 4475 .error_detected = qla2xxx_pci_error_detected,
4476 .mmio_enabled = qla2xxx_pci_mmio_enabled, 4476 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4477 .slot_reset = qla2xxx_pci_slot_reset, 4477 .slot_reset = qla2xxx_pci_slot_reset,
diff --git a/drivers/scsi/qla4xxx/ql4_nx.c b/drivers/scsi/qla4xxx/ql4_nx.c
index 939d7261c37a..807bf76f1b6a 100644
--- a/drivers/scsi/qla4xxx/ql4_nx.c
+++ b/drivers/scsi/qla4xxx/ql4_nx.c
@@ -1566,7 +1566,6 @@ qla4_8xxx_set_qsnt_ready(struct scsi_qla_host *ha)
1566static int 1566static int
1567qla4_8xxx_start_firmware(struct scsi_qla_host *ha, uint32_t image_start) 1567qla4_8xxx_start_firmware(struct scsi_qla_host *ha, uint32_t image_start)
1568{ 1568{
1569 int pcie_cap;
1570 uint16_t lnk; 1569 uint16_t lnk;
1571 1570
1572 /* scrub dma mask expansion register */ 1571 /* scrub dma mask expansion register */
@@ -1590,8 +1589,7 @@ qla4_8xxx_start_firmware(struct scsi_qla_host *ha, uint32_t image_start)
1590 } 1589 }
1591 1590
1592 /* Negotiated Link width */ 1591 /* Negotiated Link width */
1593 pcie_cap = pci_pcie_cap(ha->pdev); 1592 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk);
1594 pci_read_config_word(ha->pdev, pcie_cap + PCI_EXP_LNKSTA, &lnk);
1595 ha->link_width = (lnk >> 4) & 0x3f; 1593 ha->link_width = (lnk >> 4) & 0x3f;
1596 1594
1597 /* Synchronize with Receive peg */ 1595 /* Synchronize with Receive peg */
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c
index 487e3c8411c9..79243b76d17e 100644
--- a/drivers/scsi/qla4xxx/ql4_os.c
+++ b/drivers/scsi/qla4xxx/ql4_os.c
@@ -6148,7 +6148,7 @@ qla4xxx_pci_resume(struct pci_dev *pdev)
6148 clear_bit(AF_EEH_BUSY, &ha->flags); 6148 clear_bit(AF_EEH_BUSY, &ha->flags);
6149} 6149}
6150 6150
6151static struct pci_error_handlers qla4xxx_err_handler = { 6151static const struct pci_error_handlers qla4xxx_err_handler = {
6152 .error_detected = qla4xxx_pci_error_detected, 6152 .error_detected = qla4xxx_pci_error_detected,
6153 .mmio_enabled = qla4xxx_pci_mmio_enabled, 6153 .mmio_enabled = qla4xxx_pci_mmio_enabled,
6154 .slot_reset = qla4xxx_pci_slot_reset, 6154 .slot_reset = qla4xxx_pci_slot_reset,
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c
index 36d1ed7817eb..e2b8e68b57e7 100644
--- a/drivers/scsi/sym53c8xx_2/sym_glue.c
+++ b/drivers/scsi/sym53c8xx_2/sym_glue.c
@@ -2117,7 +2117,7 @@ static struct pci_device_id sym2_id_table[] __devinitdata = {
2117 2117
2118MODULE_DEVICE_TABLE(pci, sym2_id_table); 2118MODULE_DEVICE_TABLE(pci, sym2_id_table);
2119 2119
2120static struct pci_error_handlers sym2_err_handler = { 2120static const struct pci_error_handlers sym2_err_handler = {
2121 .error_detected = sym2_io_error_detected, 2121 .error_detected = sym2_io_error_detected,
2122 .mmio_enabled = sym2_io_slot_dump, 2122 .mmio_enabled = sym2_io_slot_dump,
2123 .slot_reset = sym2_io_slot_reset, 2123 .slot_reset = sym2_io_slot_reset,
diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c
index 029725c89e58..49553f88c7b3 100644
--- a/drivers/staging/et131x/et131x.c
+++ b/drivers/staging/et131x/et131x.c
@@ -3995,16 +3995,14 @@ static void et131x_hwaddr_init(struct et131x_adapter *adapter)
3995static int et131x_pci_init(struct et131x_adapter *adapter, 3995static int et131x_pci_init(struct et131x_adapter *adapter,
3996 struct pci_dev *pdev) 3996 struct pci_dev *pdev)
3997{ 3997{
3998 int cap = pci_pcie_cap(pdev);
3999 u16 max_payload; 3998 u16 max_payload;
4000 u16 ctl;
4001 int i, rc; 3999 int i, rc;
4002 4000
4003 rc = et131x_init_eeprom(adapter); 4001 rc = et131x_init_eeprom(adapter);
4004 if (rc < 0) 4002 if (rc < 0)
4005 goto out; 4003 goto out;
4006 4004
4007 if (!cap) { 4005 if (!pci_is_pcie(pdev)) {
4008 dev_err(&pdev->dev, "Missing PCIe capabilities\n"); 4006 dev_err(&pdev->dev, "Missing PCIe capabilities\n");
4009 goto err_out; 4007 goto err_out;
4010 } 4008 }
@@ -4012,7 +4010,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
4012 /* Let's set up the PORT LOGIC Register. First we need to know what 4010 /* Let's set up the PORT LOGIC Register. First we need to know what
4013 * the max_payload_size is 4011 * the max_payload_size is
4014 */ 4012 */
4015 if (pci_read_config_word(pdev, cap + PCI_EXP_DEVCAP, &max_payload)) { 4013 if (pcie_capability_read_word(pdev, PCI_EXP_DEVCAP, &max_payload)) {
4016 dev_err(&pdev->dev, 4014 dev_err(&pdev->dev,
4017 "Could not read PCI config space for Max Payload Size\n"); 4015 "Could not read PCI config space for Max Payload Size\n");
4018 goto err_out; 4016 goto err_out;
@@ -4049,17 +4047,10 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
4049 } 4047 }
4050 4048
4051 /* Change the max read size to 2k */ 4049 /* Change the max read size to 2k */
4052 if (pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl)) { 4050 if (pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
4051 PCI_EXP_DEVCTL_READRQ, 0x4 << 12)) {
4053 dev_err(&pdev->dev, 4052 dev_err(&pdev->dev,
4054 "Could not read PCI config space for Max read size\n"); 4053 "Couldn't change PCI config space for Max read size\n");
4055 goto err_out;
4056 }
4057
4058 ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | (0x04 << 12);
4059
4060 if (pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl)) {
4061 dev_err(&pdev->dev,
4062 "Could not write PCI config space for Max read size\n");
4063 goto err_out; 4054 goto err_out;
4064 } 4055 }
4065 4056
diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
index ddadcc3e4e7c..5abbee37cdca 100644
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
@@ -31,12 +31,10 @@ static void rtl8192_parse_pci_configuration(struct pci_dev *pdev,
31 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev); 31 struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
32 32
33 u8 tmp; 33 u8 tmp;
34 int pos; 34 u16 LinkCtrlReg;
35 u8 LinkCtrlReg;
36 35
37 pos = pci_find_capability(priv->pdev, PCI_CAP_ID_EXP); 36 pcie_capability_read_word(priv->pdev, PCI_EXP_LNKCTL, &LinkCtrlReg);
38 pci_read_config_byte(priv->pdev, pos + PCI_EXP_LNKCTL, &LinkCtrlReg); 37 priv->NdisAdapter.LinkCtrlReg = (u8)LinkCtrlReg;
39 priv->NdisAdapter.LinkCtrlReg = LinkCtrlReg;
40 38
41 RT_TRACE(COMP_INIT, "Link Control Register =%x\n", 39 RT_TRACE(COMP_INIT, "Link Control Register =%x\n",
42 priv->NdisAdapter.LinkCtrlReg); 40 priv->NdisAdapter.LinkCtrlReg);
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 28e7c7cce893..452278efef29 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -4236,7 +4236,7 @@ static void serial8250_io_resume(struct pci_dev *dev)
4236 pciserial_resume_ports(priv); 4236 pciserial_resume_ports(priv);
4237} 4237}
4238 4238
4239static struct pci_error_handlers serial8250_err_handler = { 4239static const struct pci_error_handlers serial8250_err_handler = {
4240 .error_detected = serial8250_io_error_detected, 4240 .error_detected = serial8250_io_error_detected,
4241 .slot_reset = serial8250_io_slot_reset, 4241 .slot_reset = serial8250_io_slot_reset,
4242 .resume = serial8250_io_resume, 4242 .resume = serial8250_io_resume,
diff --git a/drivers/tty/serial/jsm/jsm_driver.c b/drivers/tty/serial/jsm/jsm_driver.c
index 7545fe1b9925..5ab3c3b595e4 100644
--- a/drivers/tty/serial/jsm/jsm_driver.c
+++ b/drivers/tty/serial/jsm/jsm_driver.c
@@ -54,7 +54,7 @@ static pci_ers_result_t jsm_io_error_detected(struct pci_dev *pdev,
54static pci_ers_result_t jsm_io_slot_reset(struct pci_dev *pdev); 54static pci_ers_result_t jsm_io_slot_reset(struct pci_dev *pdev);
55static void jsm_io_resume(struct pci_dev *pdev); 55static void jsm_io_resume(struct pci_dev *pdev);
56 56
57static struct pci_error_handlers jsm_err_handler = { 57static const struct pci_error_handlers jsm_err_handler = {
58 .error_detected = jsm_io_error_detected, 58 .error_detected = jsm_io_error_detected,
59 .slot_reset = jsm_io_slot_reset, 59 .slot_reset = jsm_io_slot_reset,
60 .resume = jsm_io_resume, 60 .resume = jsm_io_resume,
diff --git a/drivers/xen/xen-pciback/pci_stub.c b/drivers/xen/xen-pciback/pci_stub.c
index 03342728bf23..92ff01dbeb10 100644
--- a/drivers/xen/xen-pciback/pci_stub.c
+++ b/drivers/xen/xen-pciback/pci_stub.c
@@ -871,7 +871,7 @@ end:
871} 871}
872 872
873/*add xen_pcibk AER handling*/ 873/*add xen_pcibk AER handling*/
874static struct pci_error_handlers xen_pcibk_error_handler = { 874static const struct pci_error_handlers xen_pcibk_error_handler = {
875 .error_detected = xen_pcibk_error_detected, 875 .error_detected = xen_pcibk_error_detected,
876 .mmio_enabled = xen_pcibk_mmio_enabled, 876 .mmio_enabled = xen_pcibk_mmio_enabled,
877 .slot_reset = xen_pcibk_slot_reset, 877 .slot_reset = xen_pcibk_slot_reset,