diff options
author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2014-05-29 07:28:14 -0400 |
---|---|---|
committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2014-05-29 07:28:14 -0400 |
commit | f70977fbd6359efb17bb93adac37b9f226d910a7 (patch) | |
tree | d36c3ace7ae638ec447b7cce39617d950d121265 /drivers | |
parent | 2807bd18cc60ec471917b5158e98e4d7b7e030fb (diff) | |
parent | e6f8a4d60b905eae1a20cbb0c72c67b26b2f02fd (diff) |
Merge back earlier ACPI thermal material.
Diffstat (limited to 'drivers')
75 files changed, 1989 insertions, 706 deletions
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index cf925c4f36b7..8445d570f60a 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c | |||
@@ -132,6 +132,21 @@ void acpi_bus_private_data_handler(acpi_handle handle, | |||
132 | } | 132 | } |
133 | EXPORT_SYMBOL(acpi_bus_private_data_handler); | 133 | EXPORT_SYMBOL(acpi_bus_private_data_handler); |
134 | 134 | ||
135 | int acpi_bus_attach_private_data(acpi_handle handle, void *data) | ||
136 | { | ||
137 | acpi_status status; | ||
138 | |||
139 | status = acpi_attach_data(handle, | ||
140 | acpi_bus_private_data_handler, data); | ||
141 | if (ACPI_FAILURE(status)) { | ||
142 | acpi_handle_debug(handle, "Error attaching device data\n"); | ||
143 | return -ENODEV; | ||
144 | } | ||
145 | |||
146 | return 0; | ||
147 | } | ||
148 | EXPORT_SYMBOL_GPL(acpi_bus_attach_private_data); | ||
149 | |||
135 | int acpi_bus_get_private_data(acpi_handle handle, void **data) | 150 | int acpi_bus_get_private_data(acpi_handle handle, void **data) |
136 | { | 151 | { |
137 | acpi_status status; | 152 | acpi_status status; |
@@ -140,15 +155,20 @@ int acpi_bus_get_private_data(acpi_handle handle, void **data) | |||
140 | return -EINVAL; | 155 | return -EINVAL; |
141 | 156 | ||
142 | status = acpi_get_data(handle, acpi_bus_private_data_handler, data); | 157 | status = acpi_get_data(handle, acpi_bus_private_data_handler, data); |
143 | if (ACPI_FAILURE(status) || !*data) { | 158 | if (ACPI_FAILURE(status)) { |
144 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No context for object [%p]\n", | 159 | acpi_handle_debug(handle, "No context for object\n"); |
145 | handle)); | ||
146 | return -ENODEV; | 160 | return -ENODEV; |
147 | } | 161 | } |
148 | 162 | ||
149 | return 0; | 163 | return 0; |
150 | } | 164 | } |
151 | EXPORT_SYMBOL(acpi_bus_get_private_data); | 165 | EXPORT_SYMBOL_GPL(acpi_bus_get_private_data); |
166 | |||
167 | void acpi_bus_detach_private_data(acpi_handle handle) | ||
168 | { | ||
169 | acpi_detach_data(handle, acpi_bus_private_data_handler); | ||
170 | } | ||
171 | EXPORT_SYMBOL_GPL(acpi_bus_detach_private_data); | ||
152 | 172 | ||
153 | void acpi_bus_no_hotplug(acpi_handle handle) | 173 | void acpi_bus_no_hotplug(acpi_handle handle) |
154 | { | 174 | { |
diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c index 25bbc55dca89..112817e963e0 100644 --- a/drivers/acpi/thermal.c +++ b/drivers/acpi/thermal.c | |||
@@ -925,13 +925,10 @@ static int acpi_thermal_register_thermal_zone(struct acpi_thermal *tz) | |||
925 | if (result) | 925 | if (result) |
926 | return result; | 926 | return result; |
927 | 927 | ||
928 | status = acpi_attach_data(tz->device->handle, | 928 | status = acpi_bus_attach_private_data(tz->device->handle, |
929 | acpi_bus_private_data_handler, | 929 | tz->thermal_zone); |
930 | tz->thermal_zone); | 930 | if (ACPI_FAILURE(status)) |
931 | if (ACPI_FAILURE(status)) { | ||
932 | pr_err(PREFIX "Error attaching device data\n"); | ||
933 | return -ENODEV; | 931 | return -ENODEV; |
934 | } | ||
935 | 932 | ||
936 | tz->tz_enabled = 1; | 933 | tz->tz_enabled = 1; |
937 | 934 | ||
@@ -946,7 +943,7 @@ static void acpi_thermal_unregister_thermal_zone(struct acpi_thermal *tz) | |||
946 | sysfs_remove_link(&tz->thermal_zone->device.kobj, "device"); | 943 | sysfs_remove_link(&tz->thermal_zone->device.kobj, "device"); |
947 | thermal_zone_device_unregister(tz->thermal_zone); | 944 | thermal_zone_device_unregister(tz->thermal_zone); |
948 | tz->thermal_zone = NULL; | 945 | tz->thermal_zone = NULL; |
949 | acpi_detach_data(tz->device->handle, acpi_bus_private_data_handler); | 946 | acpi_bus_detach_private_data(tz->device->handle); |
950 | } | 947 | } |
951 | 948 | ||
952 | 949 | ||
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index a886713937fd..d5d30ed863ce 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c | |||
@@ -1009,6 +1009,7 @@ static void dmaengine_unmap(struct kref *kref) | |||
1009 | dma_unmap_page(dev, unmap->addr[i], unmap->len, | 1009 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
1010 | DMA_BIDIRECTIONAL); | 1010 | DMA_BIDIRECTIONAL); |
1011 | } | 1011 | } |
1012 | cnt = unmap->map_cnt; | ||
1012 | mempool_free(unmap, __get_unmap_pool(cnt)->pool); | 1013 | mempool_free(unmap, __get_unmap_pool(cnt)->pool); |
1013 | } | 1014 | } |
1014 | 1015 | ||
@@ -1074,6 +1075,7 @@ dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) | |||
1074 | memset(unmap, 0, sizeof(*unmap)); | 1075 | memset(unmap, 0, sizeof(*unmap)); |
1075 | kref_init(&unmap->kref); | 1076 | kref_init(&unmap->kref); |
1076 | unmap->dev = dev; | 1077 | unmap->dev = dev; |
1078 | unmap->map_cnt = nr; | ||
1077 | 1079 | ||
1078 | return unmap; | 1080 | return unmap; |
1079 | } | 1081 | } |
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index 766b68ed505c..394cbc5c93e3 100644 --- a/drivers/dma/mv_xor.c +++ b/drivers/dma/mv_xor.c | |||
@@ -191,12 +191,10 @@ static void mv_set_mode(struct mv_xor_chan *chan, | |||
191 | 191 | ||
192 | static void mv_chan_activate(struct mv_xor_chan *chan) | 192 | static void mv_chan_activate(struct mv_xor_chan *chan) |
193 | { | 193 | { |
194 | u32 activation; | ||
195 | |||
196 | dev_dbg(mv_chan_to_devp(chan), " activate chan.\n"); | 194 | dev_dbg(mv_chan_to_devp(chan), " activate chan.\n"); |
197 | activation = readl_relaxed(XOR_ACTIVATION(chan)); | 195 | |
198 | activation |= 0x1; | 196 | /* writel ensures all descriptors are flushed before activation */ |
199 | writel_relaxed(activation, XOR_ACTIVATION(chan)); | 197 | writel(BIT(0), XOR_ACTIVATION(chan)); |
200 | } | 198 | } |
201 | 199 | ||
202 | static char mv_chan_is_busy(struct mv_xor_chan *chan) | 200 | static char mv_chan_is_busy(struct mv_xor_chan *chan) |
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c b/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c index 7762665ad8fd..876de9ac3793 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c | |||
@@ -1009,7 +1009,7 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, | |||
1009 | } | 1009 | } |
1010 | 1010 | ||
1011 | if (outp == 8) | 1011 | if (outp == 8) |
1012 | return false; | 1012 | return conf; |
1013 | 1013 | ||
1014 | data = exec_lookup(priv, head, outp, ctrl, dcb, &ver, &hdr, &cnt, &len, &info1); | 1014 | data = exec_lookup(priv, head, outp, ctrl, dcb, &ver, &hdr, &cnt, &len, &info1); |
1015 | if (data == 0x0000) | 1015 | if (data == 0x0000) |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/nvd0.c b/drivers/gpu/drm/nouveau/core/subdev/therm/nvd0.c index 43fec17ea540..bbf117be572f 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/nvd0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/nvd0.c | |||
@@ -40,6 +40,7 @@ pwm_info(struct nouveau_therm *therm, int line) | |||
40 | case 0x00: return 2; | 40 | case 0x00: return 2; |
41 | case 0x19: return 1; | 41 | case 0x19: return 1; |
42 | case 0x1c: return 0; | 42 | case 0x1c: return 0; |
43 | case 0x1e: return 2; | ||
43 | default: | 44 | default: |
44 | break; | 45 | break; |
45 | } | 46 | } |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 68528619834a..8149e7cf4303 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -1642,6 +1642,7 @@ struct radeon_vce { | |||
1642 | unsigned fb_version; | 1642 | unsigned fb_version; |
1643 | atomic_t handles[RADEON_MAX_VCE_HANDLES]; | 1643 | atomic_t handles[RADEON_MAX_VCE_HANDLES]; |
1644 | struct drm_file *filp[RADEON_MAX_VCE_HANDLES]; | 1644 | struct drm_file *filp[RADEON_MAX_VCE_HANDLES]; |
1645 | unsigned img_size[RADEON_MAX_VCE_HANDLES]; | ||
1645 | struct delayed_work idle_work; | 1646 | struct delayed_work idle_work; |
1646 | }; | 1647 | }; |
1647 | 1648 | ||
@@ -1655,7 +1656,7 @@ int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, | |||
1655 | uint32_t handle, struct radeon_fence **fence); | 1656 | uint32_t handle, struct radeon_fence **fence); |
1656 | void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp); | 1657 | void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp); |
1657 | void radeon_vce_note_usage(struct radeon_device *rdev); | 1658 | void radeon_vce_note_usage(struct radeon_device *rdev); |
1658 | int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi); | 1659 | int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi, unsigned size); |
1659 | int radeon_vce_cs_parse(struct radeon_cs_parser *p); | 1660 | int radeon_vce_cs_parse(struct radeon_cs_parser *p); |
1660 | bool radeon_vce_semaphore_emit(struct radeon_device *rdev, | 1661 | bool radeon_vce_semaphore_emit(struct radeon_device *rdev, |
1661 | struct radeon_ring *ring, | 1662 | struct radeon_ring *ring, |
@@ -2640,7 +2641,8 @@ void r100_pll_errata_after_index(struct radeon_device *rdev); | |||
2640 | #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE)) | 2641 | #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE)) |
2641 | #define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI)) | 2642 | #define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI)) |
2642 | #define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE)) | 2643 | #define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE)) |
2643 | #define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI)) | 2644 | #define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI) || \ |
2645 | (rdev->family == CHIP_MULLINS)) | ||
2644 | 2646 | ||
2645 | #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \ | 2647 | #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \ |
2646 | (rdev->ddev->pdev->device == 0x6850) || \ | 2648 | (rdev->ddev->pdev->device == 0x6850) || \ |
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index b3633d9a5317..9ab30976287d 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c | |||
@@ -196,6 +196,20 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) | |||
196 | } | 196 | } |
197 | } | 197 | } |
198 | 198 | ||
199 | if (!found) { | ||
200 | while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) { | ||
201 | dhandle = ACPI_HANDLE(&pdev->dev); | ||
202 | if (!dhandle) | ||
203 | continue; | ||
204 | |||
205 | status = acpi_get_handle(dhandle, "ATRM", &atrm_handle); | ||
206 | if (!ACPI_FAILURE(status)) { | ||
207 | found = true; | ||
208 | break; | ||
209 | } | ||
210 | } | ||
211 | } | ||
212 | |||
199 | if (!found) | 213 | if (!found) |
200 | return false; | 214 | return false; |
201 | 215 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 408b6ac53f0b..f00dbbf4d806 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -999,7 +999,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, | |||
999 | 999 | ||
1000 | /* avoid high jitter with small fractional dividers */ | 1000 | /* avoid high jitter with small fractional dividers */ |
1001 | if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) { | 1001 | if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) { |
1002 | fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 60); | 1002 | fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 50); |
1003 | if (fb_div < fb_div_min) { | 1003 | if (fb_div < fb_div_min) { |
1004 | unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div); | 1004 | unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div); |
1005 | fb_div *= tmp; | 1005 | fb_div *= tmp; |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 0cc47f12d995..eaaedba04675 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -577,28 +577,29 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) | |||
577 | return r; | 577 | return r; |
578 | } | 578 | } |
579 | 579 | ||
580 | r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); | 580 | if (rdev->accel_working) { |
581 | if (r) { | 581 | r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); |
582 | radeon_vm_fini(rdev, &fpriv->vm); | 582 | if (r) { |
583 | kfree(fpriv); | 583 | radeon_vm_fini(rdev, &fpriv->vm); |
584 | return r; | 584 | kfree(fpriv); |
585 | } | 585 | return r; |
586 | } | ||
586 | 587 | ||
587 | /* map the ib pool buffer read only into | 588 | /* map the ib pool buffer read only into |
588 | * virtual address space */ | 589 | * virtual address space */ |
589 | bo_va = radeon_vm_bo_add(rdev, &fpriv->vm, | 590 | bo_va = radeon_vm_bo_add(rdev, &fpriv->vm, |
590 | rdev->ring_tmp_bo.bo); | 591 | rdev->ring_tmp_bo.bo); |
591 | r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET, | 592 | r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET, |
592 | RADEON_VM_PAGE_READABLE | | 593 | RADEON_VM_PAGE_READABLE | |
593 | RADEON_VM_PAGE_SNOOPED); | 594 | RADEON_VM_PAGE_SNOOPED); |
594 | 595 | ||
595 | radeon_bo_unreserve(rdev->ring_tmp_bo.bo); | 596 | radeon_bo_unreserve(rdev->ring_tmp_bo.bo); |
596 | if (r) { | 597 | if (r) { |
597 | radeon_vm_fini(rdev, &fpriv->vm); | 598 | radeon_vm_fini(rdev, &fpriv->vm); |
598 | kfree(fpriv); | 599 | kfree(fpriv); |
599 | return r; | 600 | return r; |
601 | } | ||
600 | } | 602 | } |
601 | |||
602 | file_priv->driver_priv = fpriv; | 603 | file_priv->driver_priv = fpriv; |
603 | } | 604 | } |
604 | 605 | ||
@@ -626,13 +627,15 @@ void radeon_driver_postclose_kms(struct drm_device *dev, | |||
626 | struct radeon_bo_va *bo_va; | 627 | struct radeon_bo_va *bo_va; |
627 | int r; | 628 | int r; |
628 | 629 | ||
629 | r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); | 630 | if (rdev->accel_working) { |
630 | if (!r) { | 631 | r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); |
631 | bo_va = radeon_vm_bo_find(&fpriv->vm, | 632 | if (!r) { |
632 | rdev->ring_tmp_bo.bo); | 633 | bo_va = radeon_vm_bo_find(&fpriv->vm, |
633 | if (bo_va) | 634 | rdev->ring_tmp_bo.bo); |
634 | radeon_vm_bo_rmv(rdev, bo_va); | 635 | if (bo_va) |
635 | radeon_bo_unreserve(rdev->ring_tmp_bo.bo); | 636 | radeon_vm_bo_rmv(rdev, bo_va); |
637 | radeon_bo_unreserve(rdev->ring_tmp_bo.bo); | ||
638 | } | ||
636 | } | 639 | } |
637 | 640 | ||
638 | radeon_vm_fini(rdev, &fpriv->vm); | 641 | radeon_vm_fini(rdev, &fpriv->vm); |
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 19bec0dbfa38..4faa4d6f9bb4 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
@@ -458,7 +458,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev, | |||
458 | * into account. We don't want to disallow buffer moves | 458 | * into account. We don't want to disallow buffer moves |
459 | * completely. | 459 | * completely. |
460 | */ | 460 | */ |
461 | if (current_domain != RADEON_GEM_DOMAIN_CPU && | 461 | if ((lobj->alt_domain & current_domain) != 0 && |
462 | (domain & current_domain) == 0 && /* will be moved */ | 462 | (domain & current_domain) == 0 && /* will be moved */ |
463 | bytes_moved > bytes_moved_threshold) { | 463 | bytes_moved > bytes_moved_threshold) { |
464 | /* don't move it */ | 464 | /* don't move it */ |
@@ -699,22 +699,30 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) | |||
699 | rbo = container_of(bo, struct radeon_bo, tbo); | 699 | rbo = container_of(bo, struct radeon_bo, tbo); |
700 | radeon_bo_check_tiling(rbo, 0, 0); | 700 | radeon_bo_check_tiling(rbo, 0, 0); |
701 | rdev = rbo->rdev; | 701 | rdev = rbo->rdev; |
702 | if (bo->mem.mem_type == TTM_PL_VRAM) { | 702 | if (bo->mem.mem_type != TTM_PL_VRAM) |
703 | size = bo->mem.num_pages << PAGE_SHIFT; | 703 | return 0; |
704 | offset = bo->mem.start << PAGE_SHIFT; | 704 | |
705 | if ((offset + size) > rdev->mc.visible_vram_size) { | 705 | size = bo->mem.num_pages << PAGE_SHIFT; |
706 | /* hurrah the memory is not visible ! */ | 706 | offset = bo->mem.start << PAGE_SHIFT; |
707 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM); | 707 | if ((offset + size) <= rdev->mc.visible_vram_size) |
708 | rbo->placement.lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT; | 708 | return 0; |
709 | r = ttm_bo_validate(bo, &rbo->placement, false, false); | 709 | |
710 | if (unlikely(r != 0)) | 710 | /* hurrah the memory is not visible ! */ |
711 | return r; | 711 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM); |
712 | offset = bo->mem.start << PAGE_SHIFT; | 712 | rbo->placement.lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT; |
713 | /* this should not happen */ | 713 | r = ttm_bo_validate(bo, &rbo->placement, false, false); |
714 | if ((offset + size) > rdev->mc.visible_vram_size) | 714 | if (unlikely(r == -ENOMEM)) { |
715 | return -EINVAL; | 715 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); |
716 | } | 716 | return ttm_bo_validate(bo, &rbo->placement, false, false); |
717 | } else if (unlikely(r != 0)) { | ||
718 | return r; | ||
717 | } | 719 | } |
720 | |||
721 | offset = bo->mem.start << PAGE_SHIFT; | ||
722 | /* this should never happen */ | ||
723 | if ((offset + size) > rdev->mc.visible_vram_size) | ||
724 | return -EINVAL; | ||
725 | |||
718 | return 0; | 726 | return 0; |
719 | } | 727 | } |
720 | 728 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index f30b8426eee2..53d6e1bb48dc 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -361,6 +361,11 @@ static ssize_t radeon_set_pm_profile(struct device *dev, | |||
361 | struct drm_device *ddev = dev_get_drvdata(dev); | 361 | struct drm_device *ddev = dev_get_drvdata(dev); |
362 | struct radeon_device *rdev = ddev->dev_private; | 362 | struct radeon_device *rdev = ddev->dev_private; |
363 | 363 | ||
364 | /* Can't set profile when the card is off */ | ||
365 | if ((rdev->flags & RADEON_IS_PX) && | ||
366 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | ||
367 | return -EINVAL; | ||
368 | |||
364 | mutex_lock(&rdev->pm.mutex); | 369 | mutex_lock(&rdev->pm.mutex); |
365 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { | 370 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
366 | if (strncmp("default", buf, strlen("default")) == 0) | 371 | if (strncmp("default", buf, strlen("default")) == 0) |
@@ -409,6 +414,13 @@ static ssize_t radeon_set_pm_method(struct device *dev, | |||
409 | struct drm_device *ddev = dev_get_drvdata(dev); | 414 | struct drm_device *ddev = dev_get_drvdata(dev); |
410 | struct radeon_device *rdev = ddev->dev_private; | 415 | struct radeon_device *rdev = ddev->dev_private; |
411 | 416 | ||
417 | /* Can't set method when the card is off */ | ||
418 | if ((rdev->flags & RADEON_IS_PX) && | ||
419 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { | ||
420 | count = -EINVAL; | ||
421 | goto fail; | ||
422 | } | ||
423 | |||
412 | /* we don't support the legacy modes with dpm */ | 424 | /* we don't support the legacy modes with dpm */ |
413 | if (rdev->pm.pm_method == PM_METHOD_DPM) { | 425 | if (rdev->pm.pm_method == PM_METHOD_DPM) { |
414 | count = -EINVAL; | 426 | count = -EINVAL; |
@@ -446,6 +458,10 @@ static ssize_t radeon_get_dpm_state(struct device *dev, | |||
446 | struct radeon_device *rdev = ddev->dev_private; | 458 | struct radeon_device *rdev = ddev->dev_private; |
447 | enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; | 459 | enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; |
448 | 460 | ||
461 | if ((rdev->flags & RADEON_IS_PX) && | ||
462 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | ||
463 | return snprintf(buf, PAGE_SIZE, "off\n"); | ||
464 | |||
449 | return snprintf(buf, PAGE_SIZE, "%s\n", | 465 | return snprintf(buf, PAGE_SIZE, "%s\n", |
450 | (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : | 466 | (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : |
451 | (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance"); | 467 | (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance"); |
@@ -459,6 +475,11 @@ static ssize_t radeon_set_dpm_state(struct device *dev, | |||
459 | struct drm_device *ddev = dev_get_drvdata(dev); | 475 | struct drm_device *ddev = dev_get_drvdata(dev); |
460 | struct radeon_device *rdev = ddev->dev_private; | 476 | struct radeon_device *rdev = ddev->dev_private; |
461 | 477 | ||
478 | /* Can't set dpm state when the card is off */ | ||
479 | if ((rdev->flags & RADEON_IS_PX) && | ||
480 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | ||
481 | return -EINVAL; | ||
482 | |||
462 | mutex_lock(&rdev->pm.mutex); | 483 | mutex_lock(&rdev->pm.mutex); |
463 | if (strncmp("battery", buf, strlen("battery")) == 0) | 484 | if (strncmp("battery", buf, strlen("battery")) == 0) |
464 | rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; | 485 | rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; |
@@ -485,6 +506,10 @@ static ssize_t radeon_get_dpm_forced_performance_level(struct device *dev, | |||
485 | struct radeon_device *rdev = ddev->dev_private; | 506 | struct radeon_device *rdev = ddev->dev_private; |
486 | enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; | 507 | enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; |
487 | 508 | ||
509 | if ((rdev->flags & RADEON_IS_PX) && | ||
510 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | ||
511 | return snprintf(buf, PAGE_SIZE, "off\n"); | ||
512 | |||
488 | return snprintf(buf, PAGE_SIZE, "%s\n", | 513 | return snprintf(buf, PAGE_SIZE, "%s\n", |
489 | (level == RADEON_DPM_FORCED_LEVEL_AUTO) ? "auto" : | 514 | (level == RADEON_DPM_FORCED_LEVEL_AUTO) ? "auto" : |
490 | (level == RADEON_DPM_FORCED_LEVEL_LOW) ? "low" : "high"); | 515 | (level == RADEON_DPM_FORCED_LEVEL_LOW) ? "low" : "high"); |
@@ -500,6 +525,11 @@ static ssize_t radeon_set_dpm_forced_performance_level(struct device *dev, | |||
500 | enum radeon_dpm_forced_level level; | 525 | enum radeon_dpm_forced_level level; |
501 | int ret = 0; | 526 | int ret = 0; |
502 | 527 | ||
528 | /* Can't force performance level when the card is off */ | ||
529 | if ((rdev->flags & RADEON_IS_PX) && | ||
530 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | ||
531 | return -EINVAL; | ||
532 | |||
503 | mutex_lock(&rdev->pm.mutex); | 533 | mutex_lock(&rdev->pm.mutex); |
504 | if (strncmp("low", buf, strlen("low")) == 0) { | 534 | if (strncmp("low", buf, strlen("low")) == 0) { |
505 | level = RADEON_DPM_FORCED_LEVEL_LOW; | 535 | level = RADEON_DPM_FORCED_LEVEL_LOW; |
@@ -538,8 +568,14 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, | |||
538 | char *buf) | 568 | char *buf) |
539 | { | 569 | { |
540 | struct radeon_device *rdev = dev_get_drvdata(dev); | 570 | struct radeon_device *rdev = dev_get_drvdata(dev); |
571 | struct drm_device *ddev = rdev->ddev; | ||
541 | int temp; | 572 | int temp; |
542 | 573 | ||
574 | /* Can't get temperature when the card is off */ | ||
575 | if ((rdev->flags & RADEON_IS_PX) && | ||
576 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | ||
577 | return -EINVAL; | ||
578 | |||
543 | if (rdev->asic->pm.get_temperature) | 579 | if (rdev->asic->pm.get_temperature) |
544 | temp = radeon_get_temperature(rdev); | 580 | temp = radeon_get_temperature(rdev); |
545 | else | 581 | else |
@@ -1614,8 +1650,12 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data) | |||
1614 | struct drm_info_node *node = (struct drm_info_node *) m->private; | 1650 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
1615 | struct drm_device *dev = node->minor->dev; | 1651 | struct drm_device *dev = node->minor->dev; |
1616 | struct radeon_device *rdev = dev->dev_private; | 1652 | struct radeon_device *rdev = dev->dev_private; |
1653 | struct drm_device *ddev = rdev->ddev; | ||
1617 | 1654 | ||
1618 | if (rdev->pm.dpm_enabled) { | 1655 | if ((rdev->flags & RADEON_IS_PX) && |
1656 | (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { | ||
1657 | seq_printf(m, "PX asic powered off\n"); | ||
1658 | } else if (rdev->pm.dpm_enabled) { | ||
1619 | mutex_lock(&rdev->pm.mutex); | 1659 | mutex_lock(&rdev->pm.mutex); |
1620 | if (rdev->asic->dpm.debugfs_print_current_performance_level) | 1660 | if (rdev->asic->dpm.debugfs_print_current_performance_level) |
1621 | radeon_dpm_debugfs_print_current_performance_level(rdev, m); | 1661 | radeon_dpm_debugfs_print_current_performance_level(rdev, m); |
diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c index f73324c81491..3971d968af6c 100644 --- a/drivers/gpu/drm/radeon/radeon_vce.c +++ b/drivers/gpu/drm/radeon/radeon_vce.c | |||
@@ -443,13 +443,16 @@ int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, | |||
443 | * @p: parser context | 443 | * @p: parser context |
444 | * @lo: address of lower dword | 444 | * @lo: address of lower dword |
445 | * @hi: address of higher dword | 445 | * @hi: address of higher dword |
446 | * @size: size of checker for relocation buffer | ||
446 | * | 447 | * |
447 | * Patch relocation inside command stream with real buffer address | 448 | * Patch relocation inside command stream with real buffer address |
448 | */ | 449 | */ |
449 | int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi) | 450 | int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi, |
451 | unsigned size) | ||
450 | { | 452 | { |
451 | struct radeon_cs_chunk *relocs_chunk; | 453 | struct radeon_cs_chunk *relocs_chunk; |
452 | uint64_t offset; | 454 | struct radeon_cs_reloc *reloc; |
455 | uint64_t start, end, offset; | ||
453 | unsigned idx; | 456 | unsigned idx; |
454 | 457 | ||
455 | relocs_chunk = &p->chunks[p->chunk_relocs_idx]; | 458 | relocs_chunk = &p->chunks[p->chunk_relocs_idx]; |
@@ -462,15 +465,60 @@ int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi) | |||
462 | return -EINVAL; | 465 | return -EINVAL; |
463 | } | 466 | } |
464 | 467 | ||
465 | offset += p->relocs_ptr[(idx / 4)]->gpu_offset; | 468 | reloc = p->relocs_ptr[(idx / 4)]; |
469 | start = reloc->gpu_offset; | ||
470 | end = start + radeon_bo_size(reloc->robj); | ||
471 | start += offset; | ||
466 | 472 | ||
467 | p->ib.ptr[lo] = offset & 0xFFFFFFFF; | 473 | p->ib.ptr[lo] = start & 0xFFFFFFFF; |
468 | p->ib.ptr[hi] = offset >> 32; | 474 | p->ib.ptr[hi] = start >> 32; |
475 | |||
476 | if (end <= start) { | ||
477 | DRM_ERROR("invalid reloc offset %llX!\n", offset); | ||
478 | return -EINVAL; | ||
479 | } | ||
480 | if ((end - start) < size) { | ||
481 | DRM_ERROR("buffer to small (%d / %d)!\n", | ||
482 | (unsigned)(end - start), size); | ||
483 | return -EINVAL; | ||
484 | } | ||
469 | 485 | ||
470 | return 0; | 486 | return 0; |
471 | } | 487 | } |
472 | 488 | ||
473 | /** | 489 | /** |
490 | * radeon_vce_validate_handle - validate stream handle | ||
491 | * | ||
492 | * @p: parser context | ||
493 | * @handle: handle to validate | ||
494 | * | ||
495 | * Validates the handle and return the found session index or -EINVAL | ||
496 | * we we don't have another free session index. | ||
497 | */ | ||
498 | int radeon_vce_validate_handle(struct radeon_cs_parser *p, uint32_t handle) | ||
499 | { | ||
500 | unsigned i; | ||
501 | |||
502 | /* validate the handle */ | ||
503 | for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | ||
504 | if (atomic_read(&p->rdev->vce.handles[i]) == handle) | ||
505 | return i; | ||
506 | } | ||
507 | |||
508 | /* handle not found try to alloc a new one */ | ||
509 | for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | ||
510 | if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { | ||
511 | p->rdev->vce.filp[i] = p->filp; | ||
512 | p->rdev->vce.img_size[i] = 0; | ||
513 | return i; | ||
514 | } | ||
515 | } | ||
516 | |||
517 | DRM_ERROR("No more free VCE handles!\n"); | ||
518 | return -EINVAL; | ||
519 | } | ||
520 | |||
521 | /** | ||
474 | * radeon_vce_cs_parse - parse and validate the command stream | 522 | * radeon_vce_cs_parse - parse and validate the command stream |
475 | * | 523 | * |
476 | * @p: parser context | 524 | * @p: parser context |
@@ -478,8 +526,10 @@ int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi) | |||
478 | */ | 526 | */ |
479 | int radeon_vce_cs_parse(struct radeon_cs_parser *p) | 527 | int radeon_vce_cs_parse(struct radeon_cs_parser *p) |
480 | { | 528 | { |
481 | uint32_t handle = 0; | 529 | int session_idx = -1; |
482 | bool destroy = false; | 530 | bool destroyed = false; |
531 | uint32_t tmp, handle = 0; | ||
532 | uint32_t *size = &tmp; | ||
483 | int i, r; | 533 | int i, r; |
484 | 534 | ||
485 | while (p->idx < p->chunks[p->chunk_ib_idx].length_dw) { | 535 | while (p->idx < p->chunks[p->chunk_ib_idx].length_dw) { |
@@ -491,13 +541,29 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p) | |||
491 | return -EINVAL; | 541 | return -EINVAL; |
492 | } | 542 | } |
493 | 543 | ||
544 | if (destroyed) { | ||
545 | DRM_ERROR("No other command allowed after destroy!\n"); | ||
546 | return -EINVAL; | ||
547 | } | ||
548 | |||
494 | switch (cmd) { | 549 | switch (cmd) { |
495 | case 0x00000001: // session | 550 | case 0x00000001: // session |
496 | handle = radeon_get_ib_value(p, p->idx + 2); | 551 | handle = radeon_get_ib_value(p, p->idx + 2); |
552 | session_idx = radeon_vce_validate_handle(p, handle); | ||
553 | if (session_idx < 0) | ||
554 | return session_idx; | ||
555 | size = &p->rdev->vce.img_size[session_idx]; | ||
497 | break; | 556 | break; |
498 | 557 | ||
499 | case 0x00000002: // task info | 558 | case 0x00000002: // task info |
559 | break; | ||
560 | |||
500 | case 0x01000001: // create | 561 | case 0x01000001: // create |
562 | *size = radeon_get_ib_value(p, p->idx + 8) * | ||
563 | radeon_get_ib_value(p, p->idx + 10) * | ||
564 | 8 * 3 / 2; | ||
565 | break; | ||
566 | |||
501 | case 0x04000001: // config extension | 567 | case 0x04000001: // config extension |
502 | case 0x04000002: // pic control | 568 | case 0x04000002: // pic control |
503 | case 0x04000005: // rate control | 569 | case 0x04000005: // rate control |
@@ -506,23 +572,39 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p) | |||
506 | break; | 572 | break; |
507 | 573 | ||
508 | case 0x03000001: // encode | 574 | case 0x03000001: // encode |
509 | r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9); | 575 | r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9, |
576 | *size); | ||
510 | if (r) | 577 | if (r) |
511 | return r; | 578 | return r; |
512 | 579 | ||
513 | r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11); | 580 | r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11, |
581 | *size / 3); | ||
514 | if (r) | 582 | if (r) |
515 | return r; | 583 | return r; |
516 | break; | 584 | break; |
517 | 585 | ||
518 | case 0x02000001: // destroy | 586 | case 0x02000001: // destroy |
519 | destroy = true; | 587 | destroyed = true; |
520 | break; | 588 | break; |
521 | 589 | ||
522 | case 0x05000001: // context buffer | 590 | case 0x05000001: // context buffer |
591 | r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, | ||
592 | *size * 2); | ||
593 | if (r) | ||
594 | return r; | ||
595 | break; | ||
596 | |||
523 | case 0x05000004: // video bitstream buffer | 597 | case 0x05000004: // video bitstream buffer |
598 | tmp = radeon_get_ib_value(p, p->idx + 4); | ||
599 | r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, | ||
600 | tmp); | ||
601 | if (r) | ||
602 | return r; | ||
603 | break; | ||
604 | |||
524 | case 0x05000005: // feedback buffer | 605 | case 0x05000005: // feedback buffer |
525 | r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2); | 606 | r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, |
607 | 4096); | ||
526 | if (r) | 608 | if (r) |
527 | return r; | 609 | return r; |
528 | break; | 610 | break; |
@@ -532,33 +614,21 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p) | |||
532 | return -EINVAL; | 614 | return -EINVAL; |
533 | } | 615 | } |
534 | 616 | ||
617 | if (session_idx == -1) { | ||
618 | DRM_ERROR("no session command at start of IB\n"); | ||
619 | return -EINVAL; | ||
620 | } | ||
621 | |||
535 | p->idx += len / 4; | 622 | p->idx += len / 4; |
536 | } | 623 | } |
537 | 624 | ||
538 | if (destroy) { | 625 | if (destroyed) { |
539 | /* IB contains a destroy msg, free the handle */ | 626 | /* IB contains a destroy msg, free the handle */ |
540 | for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) | 627 | for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) |
541 | atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0); | 628 | atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0); |
542 | |||
543 | return 0; | ||
544 | } | ||
545 | |||
546 | /* create or encode, validate the handle */ | ||
547 | for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | ||
548 | if (atomic_read(&p->rdev->vce.handles[i]) == handle) | ||
549 | return 0; | ||
550 | } | 629 | } |
551 | 630 | ||
552 | /* handle not found try to alloc a new one */ | 631 | return 0; |
553 | for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | ||
554 | if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { | ||
555 | p->rdev->vce.filp[i] = p->filp; | ||
556 | return 0; | ||
557 | } | ||
558 | } | ||
559 | |||
560 | DRM_ERROR("No more free VCE handles!\n"); | ||
561 | return -EINVAL; | ||
562 | } | 632 | } |
563 | 633 | ||
564 | /** | 634 | /** |
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c index 2aae6ce49d32..d9ab99f47612 100644 --- a/drivers/gpu/drm/radeon/radeon_vm.c +++ b/drivers/gpu/drm/radeon/radeon_vm.c | |||
@@ -595,7 +595,7 @@ int radeon_vm_update_page_directory(struct radeon_device *rdev, | |||
595 | ndw = 64; | 595 | ndw = 64; |
596 | 596 | ||
597 | /* assume the worst case */ | 597 | /* assume the worst case */ |
598 | ndw += vm->max_pde_used * 12; | 598 | ndw += vm->max_pde_used * 16; |
599 | 599 | ||
600 | /* update too big for an IB */ | 600 | /* update too big for an IB */ |
601 | if (ndw > 0xfffff) | 601 | if (ndw > 0xfffff) |
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 683532f84931..7321283602ce 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h | |||
@@ -107,8 +107,8 @@ | |||
107 | #define SPLL_CHG_STATUS (1 << 1) | 107 | #define SPLL_CHG_STATUS (1 << 1) |
108 | #define SPLL_CNTL_MODE 0x618 | 108 | #define SPLL_CNTL_MODE 0x618 |
109 | #define SPLL_SW_DIR_CONTROL (1 << 0) | 109 | #define SPLL_SW_DIR_CONTROL (1 << 0) |
110 | # define SPLL_REFCLK_SEL(x) ((x) << 8) | 110 | # define SPLL_REFCLK_SEL(x) ((x) << 26) |
111 | # define SPLL_REFCLK_SEL_MASK 0xFF00 | 111 | # define SPLL_REFCLK_SEL_MASK (3 << 26) |
112 | 112 | ||
113 | #define CG_SPLL_SPREAD_SPECTRUM 0x620 | 113 | #define CG_SPLL_SPREAD_SPECTRUM 0x620 |
114 | #define SSEN (1 << 0) | 114 | #define SSEN (1 << 0) |
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index bc196f49ec53..4af0da96c2e2 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig | |||
@@ -1053,7 +1053,7 @@ config SENSORS_PC87427 | |||
1053 | 1053 | ||
1054 | config SENSORS_NTC_THERMISTOR | 1054 | config SENSORS_NTC_THERMISTOR |
1055 | tristate "NTC thermistor support" | 1055 | tristate "NTC thermistor support" |
1056 | depends on (!OF && !IIO) || (OF && IIO) | 1056 | depends on !OF || IIO=n || IIO |
1057 | help | 1057 | help |
1058 | This driver supports NTC thermistors sensor reading and its | 1058 | This driver supports NTC thermistors sensor reading and its |
1059 | interpretation. The driver can also monitor the temperature and | 1059 | interpretation. The driver can also monitor the temperature and |
diff --git a/drivers/hwmon/ntc_thermistor.c b/drivers/hwmon/ntc_thermistor.c index 8a17f01e8672..e76feb86a1d4 100644 --- a/drivers/hwmon/ntc_thermistor.c +++ b/drivers/hwmon/ntc_thermistor.c | |||
@@ -44,6 +44,7 @@ struct ntc_compensation { | |||
44 | unsigned int ohm; | 44 | unsigned int ohm; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | /* Order matters, ntc_match references the entries by index */ | ||
47 | static const struct platform_device_id ntc_thermistor_id[] = { | 48 | static const struct platform_device_id ntc_thermistor_id[] = { |
48 | { "ncp15wb473", TYPE_NCPXXWB473 }, | 49 | { "ncp15wb473", TYPE_NCPXXWB473 }, |
49 | { "ncp18wb473", TYPE_NCPXXWB473 }, | 50 | { "ncp18wb473", TYPE_NCPXXWB473 }, |
@@ -141,7 +142,7 @@ struct ntc_data { | |||
141 | char name[PLATFORM_NAME_SIZE]; | 142 | char name[PLATFORM_NAME_SIZE]; |
142 | }; | 143 | }; |
143 | 144 | ||
144 | #ifdef CONFIG_OF | 145 | #if defined(CONFIG_OF) && IS_ENABLED(CONFIG_IIO) |
145 | static int ntc_adc_iio_read(struct ntc_thermistor_platform_data *pdata) | 146 | static int ntc_adc_iio_read(struct ntc_thermistor_platform_data *pdata) |
146 | { | 147 | { |
147 | struct iio_channel *channel = pdata->chan; | 148 | struct iio_channel *channel = pdata->chan; |
@@ -163,15 +164,15 @@ static int ntc_adc_iio_read(struct ntc_thermistor_platform_data *pdata) | |||
163 | 164 | ||
164 | static const struct of_device_id ntc_match[] = { | 165 | static const struct of_device_id ntc_match[] = { |
165 | { .compatible = "ntc,ncp15wb473", | 166 | { .compatible = "ntc,ncp15wb473", |
166 | .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | 167 | .data = &ntc_thermistor_id[0] }, |
167 | { .compatible = "ntc,ncp18wb473", | 168 | { .compatible = "ntc,ncp18wb473", |
168 | .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | 169 | .data = &ntc_thermistor_id[1] }, |
169 | { .compatible = "ntc,ncp21wb473", | 170 | { .compatible = "ntc,ncp21wb473", |
170 | .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | 171 | .data = &ntc_thermistor_id[2] }, |
171 | { .compatible = "ntc,ncp03wb473", | 172 | { .compatible = "ntc,ncp03wb473", |
172 | .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | 173 | .data = &ntc_thermistor_id[3] }, |
173 | { .compatible = "ntc,ncp15wl333", | 174 | { .compatible = "ntc,ncp15wl333", |
174 | .data = &ntc_thermistor_id[TYPE_NCPXXWL333] }, | 175 | .data = &ntc_thermistor_id[4] }, |
175 | { }, | 176 | { }, |
176 | }; | 177 | }; |
177 | MODULE_DEVICE_TABLE(of, ntc_match); | 178 | MODULE_DEVICE_TABLE(of, ntc_match); |
@@ -223,6 +224,8 @@ ntc_thermistor_parse_dt(struct platform_device *pdev) | |||
223 | return NULL; | 224 | return NULL; |
224 | } | 225 | } |
225 | 226 | ||
227 | #define ntc_match NULL | ||
228 | |||
226 | static void ntc_iio_channel_release(struct ntc_thermistor_platform_data *pdata) | 229 | static void ntc_iio_channel_release(struct ntc_thermistor_platform_data *pdata) |
227 | { } | 230 | { } |
228 | #endif | 231 | #endif |
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c index 1b6dbe156a37..199c7896f081 100644 --- a/drivers/infiniband/hw/mlx4/main.c +++ b/drivers/infiniband/hw/mlx4/main.c | |||
@@ -48,6 +48,7 @@ | |||
48 | 48 | ||
49 | #include <linux/mlx4/driver.h> | 49 | #include <linux/mlx4/driver.h> |
50 | #include <linux/mlx4/cmd.h> | 50 | #include <linux/mlx4/cmd.h> |
51 | #include <linux/mlx4/qp.h> | ||
51 | 52 | ||
52 | #include "mlx4_ib.h" | 53 | #include "mlx4_ib.h" |
53 | #include "user.h" | 54 | #include "user.h" |
@@ -1614,6 +1615,53 @@ static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event, | |||
1614 | } | 1615 | } |
1615 | #endif | 1616 | #endif |
1616 | 1617 | ||
1618 | #define MLX4_IB_INVALID_MAC ((u64)-1) | ||
1619 | static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, | ||
1620 | struct net_device *dev, | ||
1621 | int port) | ||
1622 | { | ||
1623 | u64 new_smac = 0; | ||
1624 | u64 release_mac = MLX4_IB_INVALID_MAC; | ||
1625 | struct mlx4_ib_qp *qp; | ||
1626 | |||
1627 | read_lock(&dev_base_lock); | ||
1628 | new_smac = mlx4_mac_to_u64(dev->dev_addr); | ||
1629 | read_unlock(&dev_base_lock); | ||
1630 | |||
1631 | mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); | ||
1632 | qp = ibdev->qp1_proxy[port - 1]; | ||
1633 | if (qp) { | ||
1634 | int new_smac_index; | ||
1635 | u64 old_smac = qp->pri.smac; | ||
1636 | struct mlx4_update_qp_params update_params; | ||
1637 | |||
1638 | if (new_smac == old_smac) | ||
1639 | goto unlock; | ||
1640 | |||
1641 | new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); | ||
1642 | |||
1643 | if (new_smac_index < 0) | ||
1644 | goto unlock; | ||
1645 | |||
1646 | update_params.smac_index = new_smac_index; | ||
1647 | if (mlx4_update_qp(ibdev->dev, &qp->mqp, MLX4_UPDATE_QP_SMAC, | ||
1648 | &update_params)) { | ||
1649 | release_mac = new_smac; | ||
1650 | goto unlock; | ||
1651 | } | ||
1652 | |||
1653 | qp->pri.smac = new_smac; | ||
1654 | qp->pri.smac_index = new_smac_index; | ||
1655 | |||
1656 | release_mac = old_smac; | ||
1657 | } | ||
1658 | |||
1659 | unlock: | ||
1660 | mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); | ||
1661 | if (release_mac != MLX4_IB_INVALID_MAC) | ||
1662 | mlx4_unregister_mac(ibdev->dev, port, release_mac); | ||
1663 | } | ||
1664 | |||
1617 | static void mlx4_ib_get_dev_addr(struct net_device *dev, | 1665 | static void mlx4_ib_get_dev_addr(struct net_device *dev, |
1618 | struct mlx4_ib_dev *ibdev, u8 port) | 1666 | struct mlx4_ib_dev *ibdev, u8 port) |
1619 | { | 1667 | { |
@@ -1689,9 +1737,13 @@ static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev) | |||
1689 | return 0; | 1737 | return 0; |
1690 | } | 1738 | } |
1691 | 1739 | ||
1692 | static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev) | 1740 | static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, |
1741 | struct net_device *dev, | ||
1742 | unsigned long event) | ||
1743 | |||
1693 | { | 1744 | { |
1694 | struct mlx4_ib_iboe *iboe; | 1745 | struct mlx4_ib_iboe *iboe; |
1746 | int update_qps_port = -1; | ||
1695 | int port; | 1747 | int port; |
1696 | 1748 | ||
1697 | iboe = &ibdev->iboe; | 1749 | iboe = &ibdev->iboe; |
@@ -1719,6 +1771,11 @@ static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev) | |||
1719 | } | 1771 | } |
1720 | curr_master = iboe->masters[port - 1]; | 1772 | curr_master = iboe->masters[port - 1]; |
1721 | 1773 | ||
1774 | if (dev == iboe->netdevs[port - 1] && | ||
1775 | (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || | ||
1776 | event == NETDEV_UP || event == NETDEV_CHANGE)) | ||
1777 | update_qps_port = port; | ||
1778 | |||
1722 | if (curr_netdev) { | 1779 | if (curr_netdev) { |
1723 | port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ? | 1780 | port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ? |
1724 | IB_PORT_ACTIVE : IB_PORT_DOWN; | 1781 | IB_PORT_ACTIVE : IB_PORT_DOWN; |
@@ -1752,6 +1809,9 @@ static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev) | |||
1752 | } | 1809 | } |
1753 | 1810 | ||
1754 | spin_unlock(&iboe->lock); | 1811 | spin_unlock(&iboe->lock); |
1812 | |||
1813 | if (update_qps_port > 0) | ||
1814 | mlx4_ib_update_qps(ibdev, dev, update_qps_port); | ||
1755 | } | 1815 | } |
1756 | 1816 | ||
1757 | static int mlx4_ib_netdev_event(struct notifier_block *this, | 1817 | static int mlx4_ib_netdev_event(struct notifier_block *this, |
@@ -1764,7 +1824,7 @@ static int mlx4_ib_netdev_event(struct notifier_block *this, | |||
1764 | return NOTIFY_DONE; | 1824 | return NOTIFY_DONE; |
1765 | 1825 | ||
1766 | ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); | 1826 | ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); |
1767 | mlx4_ib_scan_netdevs(ibdev); | 1827 | mlx4_ib_scan_netdevs(ibdev, dev, event); |
1768 | 1828 | ||
1769 | return NOTIFY_DONE; | 1829 | return NOTIFY_DONE; |
1770 | } | 1830 | } |
@@ -2043,6 +2103,7 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) | |||
2043 | goto err_map; | 2103 | goto err_map; |
2044 | 2104 | ||
2045 | for (i = 0; i < ibdev->num_ports; ++i) { | 2105 | for (i = 0; i < ibdev->num_ports; ++i) { |
2106 | mutex_init(&ibdev->qp1_proxy_lock[i]); | ||
2046 | if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == | 2107 | if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == |
2047 | IB_LINK_LAYER_ETHERNET) { | 2108 | IB_LINK_LAYER_ETHERNET) { |
2048 | err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]); | 2109 | err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]); |
@@ -2126,7 +2187,7 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) | |||
2126 | for (i = 1 ; i <= ibdev->num_ports ; ++i) | 2187 | for (i = 1 ; i <= ibdev->num_ports ; ++i) |
2127 | reset_gid_table(ibdev, i); | 2188 | reset_gid_table(ibdev, i); |
2128 | rtnl_lock(); | 2189 | rtnl_lock(); |
2129 | mlx4_ib_scan_netdevs(ibdev); | 2190 | mlx4_ib_scan_netdevs(ibdev, NULL, 0); |
2130 | rtnl_unlock(); | 2191 | rtnl_unlock(); |
2131 | mlx4_ib_init_gid_table(ibdev); | 2192 | mlx4_ib_init_gid_table(ibdev); |
2132 | } | 2193 | } |
diff --git a/drivers/infiniband/hw/mlx4/mlx4_ib.h b/drivers/infiniband/hw/mlx4/mlx4_ib.h index f589522fddfd..66b0b7dbd9f4 100644 --- a/drivers/infiniband/hw/mlx4/mlx4_ib.h +++ b/drivers/infiniband/hw/mlx4/mlx4_ib.h | |||
@@ -522,6 +522,9 @@ struct mlx4_ib_dev { | |||
522 | int steer_qpn_count; | 522 | int steer_qpn_count; |
523 | int steer_qpn_base; | 523 | int steer_qpn_base; |
524 | int steering_support; | 524 | int steering_support; |
525 | struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS]; | ||
526 | /* lock when destroying qp1_proxy and getting netdev events */ | ||
527 | struct mutex qp1_proxy_lock[MLX4_MAX_PORTS]; | ||
525 | }; | 528 | }; |
526 | 529 | ||
527 | struct ib_event_work { | 530 | struct ib_event_work { |
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c index 41308af4163c..dc57482ae7af 100644 --- a/drivers/infiniband/hw/mlx4/qp.c +++ b/drivers/infiniband/hw/mlx4/qp.c | |||
@@ -1132,6 +1132,12 @@ int mlx4_ib_destroy_qp(struct ib_qp *qp) | |||
1132 | if (is_qp0(dev, mqp)) | 1132 | if (is_qp0(dev, mqp)) |
1133 | mlx4_CLOSE_PORT(dev->dev, mqp->port); | 1133 | mlx4_CLOSE_PORT(dev->dev, mqp->port); |
1134 | 1134 | ||
1135 | if (dev->qp1_proxy[mqp->port - 1] == mqp) { | ||
1136 | mutex_lock(&dev->qp1_proxy_lock[mqp->port - 1]); | ||
1137 | dev->qp1_proxy[mqp->port - 1] = NULL; | ||
1138 | mutex_unlock(&dev->qp1_proxy_lock[mqp->port - 1]); | ||
1139 | } | ||
1140 | |||
1135 | pd = get_pd(mqp); | 1141 | pd = get_pd(mqp); |
1136 | destroy_qp_common(dev, mqp, !!pd->ibpd.uobject); | 1142 | destroy_qp_common(dev, mqp, !!pd->ibpd.uobject); |
1137 | 1143 | ||
@@ -1646,6 +1652,8 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, | |||
1646 | err = handle_eth_ud_smac_index(dev, qp, (u8 *)attr->smac, context); | 1652 | err = handle_eth_ud_smac_index(dev, qp, (u8 *)attr->smac, context); |
1647 | if (err) | 1653 | if (err) |
1648 | return -EINVAL; | 1654 | return -EINVAL; |
1655 | if (qp->mlx4_ib_qp_type == MLX4_IB_QPT_PROXY_GSI) | ||
1656 | dev->qp1_proxy[qp->port - 1] = qp; | ||
1649 | } | 1657 | } |
1650 | } | 1658 | } |
1651 | } | 1659 | } |
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c index 9f69e818b000..93580a47cc54 100644 --- a/drivers/net/bonding/bond_alb.c +++ b/drivers/net/bonding/bond_alb.c | |||
@@ -82,7 +82,8 @@ static inline struct arp_pkt *arp_pkt(const struct sk_buff *skb) | |||
82 | } | 82 | } |
83 | 83 | ||
84 | /* Forward declaration */ | 84 | /* Forward declaration */ |
85 | static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[]); | 85 | static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[], |
86 | bool strict_match); | ||
86 | static void rlb_purge_src_ip(struct bonding *bond, struct arp_pkt *arp); | 87 | static void rlb_purge_src_ip(struct bonding *bond, struct arp_pkt *arp); |
87 | static void rlb_src_unlink(struct bonding *bond, u32 index); | 88 | static void rlb_src_unlink(struct bonding *bond, u32 index); |
88 | static void rlb_src_link(struct bonding *bond, u32 ip_src_hash, | 89 | static void rlb_src_link(struct bonding *bond, u32 ip_src_hash, |
@@ -459,7 +460,7 @@ static void rlb_teach_disabled_mac_on_primary(struct bonding *bond, u8 addr[]) | |||
459 | 460 | ||
460 | bond->alb_info.rlb_promisc_timeout_counter = 0; | 461 | bond->alb_info.rlb_promisc_timeout_counter = 0; |
461 | 462 | ||
462 | alb_send_learning_packets(bond->curr_active_slave, addr); | 463 | alb_send_learning_packets(bond->curr_active_slave, addr, true); |
463 | } | 464 | } |
464 | 465 | ||
465 | /* slave being removed should not be active at this point | 466 | /* slave being removed should not be active at this point |
@@ -995,7 +996,7 @@ static void rlb_clear_vlan(struct bonding *bond, unsigned short vlan_id) | |||
995 | /*********************** tlb/rlb shared functions *********************/ | 996 | /*********************** tlb/rlb shared functions *********************/ |
996 | 997 | ||
997 | static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[], | 998 | static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[], |
998 | u16 vid) | 999 | __be16 vlan_proto, u16 vid) |
999 | { | 1000 | { |
1000 | struct learning_pkt pkt; | 1001 | struct learning_pkt pkt; |
1001 | struct sk_buff *skb; | 1002 | struct sk_buff *skb; |
@@ -1021,7 +1022,7 @@ static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[], | |||
1021 | skb->dev = slave->dev; | 1022 | skb->dev = slave->dev; |
1022 | 1023 | ||
1023 | if (vid) { | 1024 | if (vid) { |
1024 | skb = vlan_put_tag(skb, htons(ETH_P_8021Q), vid); | 1025 | skb = vlan_put_tag(skb, vlan_proto, vid); |
1025 | if (!skb) { | 1026 | if (!skb) { |
1026 | pr_err("%s: Error: failed to insert VLAN tag\n", | 1027 | pr_err("%s: Error: failed to insert VLAN tag\n", |
1027 | slave->bond->dev->name); | 1028 | slave->bond->dev->name); |
@@ -1032,22 +1033,32 @@ static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[], | |||
1032 | dev_queue_xmit(skb); | 1033 | dev_queue_xmit(skb); |
1033 | } | 1034 | } |
1034 | 1035 | ||
1035 | 1036 | static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[], | |
1036 | static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[]) | 1037 | bool strict_match) |
1037 | { | 1038 | { |
1038 | struct bonding *bond = bond_get_bond_by_slave(slave); | 1039 | struct bonding *bond = bond_get_bond_by_slave(slave); |
1039 | struct net_device *upper; | 1040 | struct net_device *upper; |
1040 | struct list_head *iter; | 1041 | struct list_head *iter; |
1041 | 1042 | ||
1042 | /* send untagged */ | 1043 | /* send untagged */ |
1043 | alb_send_lp_vid(slave, mac_addr, 0); | 1044 | alb_send_lp_vid(slave, mac_addr, 0, 0); |
1044 | 1045 | ||
1045 | /* loop through vlans and send one packet for each */ | 1046 | /* loop through vlans and send one packet for each */ |
1046 | rcu_read_lock(); | 1047 | rcu_read_lock(); |
1047 | netdev_for_each_all_upper_dev_rcu(bond->dev, upper, iter) { | 1048 | netdev_for_each_all_upper_dev_rcu(bond->dev, upper, iter) { |
1048 | if (upper->priv_flags & IFF_802_1Q_VLAN) | 1049 | if (is_vlan_dev(upper) && vlan_get_encap_level(upper) == 0) { |
1049 | alb_send_lp_vid(slave, mac_addr, | 1050 | if (strict_match && |
1050 | vlan_dev_vlan_id(upper)); | 1051 | ether_addr_equal_64bits(mac_addr, |
1052 | upper->dev_addr)) { | ||
1053 | alb_send_lp_vid(slave, mac_addr, | ||
1054 | vlan_dev_vlan_proto(upper), | ||
1055 | vlan_dev_vlan_id(upper)); | ||
1056 | } else if (!strict_match) { | ||
1057 | alb_send_lp_vid(slave, upper->dev_addr, | ||
1058 | vlan_dev_vlan_proto(upper), | ||
1059 | vlan_dev_vlan_id(upper)); | ||
1060 | } | ||
1061 | } | ||
1051 | } | 1062 | } |
1052 | rcu_read_unlock(); | 1063 | rcu_read_unlock(); |
1053 | } | 1064 | } |
@@ -1107,7 +1118,7 @@ static void alb_fasten_mac_swap(struct bonding *bond, struct slave *slave1, | |||
1107 | 1118 | ||
1108 | /* fasten the change in the switch */ | 1119 | /* fasten the change in the switch */ |
1109 | if (SLAVE_IS_OK(slave1)) { | 1120 | if (SLAVE_IS_OK(slave1)) { |
1110 | alb_send_learning_packets(slave1, slave1->dev->dev_addr); | 1121 | alb_send_learning_packets(slave1, slave1->dev->dev_addr, false); |
1111 | if (bond->alb_info.rlb_enabled) { | 1122 | if (bond->alb_info.rlb_enabled) { |
1112 | /* inform the clients that the mac address | 1123 | /* inform the clients that the mac address |
1113 | * has changed | 1124 | * has changed |
@@ -1119,7 +1130,7 @@ static void alb_fasten_mac_swap(struct bonding *bond, struct slave *slave1, | |||
1119 | } | 1130 | } |
1120 | 1131 | ||
1121 | if (SLAVE_IS_OK(slave2)) { | 1132 | if (SLAVE_IS_OK(slave2)) { |
1122 | alb_send_learning_packets(slave2, slave2->dev->dev_addr); | 1133 | alb_send_learning_packets(slave2, slave2->dev->dev_addr, false); |
1123 | if (bond->alb_info.rlb_enabled) { | 1134 | if (bond->alb_info.rlb_enabled) { |
1124 | /* inform the clients that the mac address | 1135 | /* inform the clients that the mac address |
1125 | * has changed | 1136 | * has changed |
@@ -1490,6 +1501,8 @@ void bond_alb_monitor(struct work_struct *work) | |||
1490 | 1501 | ||
1491 | /* send learning packets */ | 1502 | /* send learning packets */ |
1492 | if (bond_info->lp_counter >= BOND_ALB_LP_TICKS(bond)) { | 1503 | if (bond_info->lp_counter >= BOND_ALB_LP_TICKS(bond)) { |
1504 | bool strict_match; | ||
1505 | |||
1493 | /* change of curr_active_slave involves swapping of mac addresses. | 1506 | /* change of curr_active_slave involves swapping of mac addresses. |
1494 | * in order to avoid this swapping from happening while | 1507 | * in order to avoid this swapping from happening while |
1495 | * sending the learning packets, the curr_slave_lock must be held for | 1508 | * sending the learning packets, the curr_slave_lock must be held for |
@@ -1497,8 +1510,15 @@ void bond_alb_monitor(struct work_struct *work) | |||
1497 | */ | 1510 | */ |
1498 | read_lock(&bond->curr_slave_lock); | 1511 | read_lock(&bond->curr_slave_lock); |
1499 | 1512 | ||
1500 | bond_for_each_slave_rcu(bond, slave, iter) | 1513 | bond_for_each_slave_rcu(bond, slave, iter) { |
1501 | alb_send_learning_packets(slave, slave->dev->dev_addr); | 1514 | /* If updating current_active, use all currently |
1515 | * user mac addreses (!strict_match). Otherwise, only | ||
1516 | * use mac of the slave device. | ||
1517 | */ | ||
1518 | strict_match = (slave != bond->curr_active_slave); | ||
1519 | alb_send_learning_packets(slave, slave->dev->dev_addr, | ||
1520 | strict_match); | ||
1521 | } | ||
1502 | 1522 | ||
1503 | read_unlock(&bond->curr_slave_lock); | 1523 | read_unlock(&bond->curr_slave_lock); |
1504 | 1524 | ||
@@ -1721,7 +1741,8 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave | |||
1721 | } else { | 1741 | } else { |
1722 | /* set the new_slave to the bond mac address */ | 1742 | /* set the new_slave to the bond mac address */ |
1723 | alb_set_slave_mac_addr(new_slave, bond->dev->dev_addr); | 1743 | alb_set_slave_mac_addr(new_slave, bond->dev->dev_addr); |
1724 | alb_send_learning_packets(new_slave, bond->dev->dev_addr); | 1744 | alb_send_learning_packets(new_slave, bond->dev->dev_addr, |
1745 | false); | ||
1725 | } | 1746 | } |
1726 | 1747 | ||
1727 | write_lock_bh(&bond->curr_slave_lock); | 1748 | write_lock_bh(&bond->curr_slave_lock); |
@@ -1764,7 +1785,8 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr) | |||
1764 | alb_set_slave_mac_addr(bond->curr_active_slave, bond_dev->dev_addr); | 1785 | alb_set_slave_mac_addr(bond->curr_active_slave, bond_dev->dev_addr); |
1765 | 1786 | ||
1766 | read_lock(&bond->lock); | 1787 | read_lock(&bond->lock); |
1767 | alb_send_learning_packets(bond->curr_active_slave, bond_dev->dev_addr); | 1788 | alb_send_learning_packets(bond->curr_active_slave, |
1789 | bond_dev->dev_addr, false); | ||
1768 | if (bond->alb_info.rlb_enabled) { | 1790 | if (bond->alb_info.rlb_enabled) { |
1769 | /* inform clients mac address has changed */ | 1791 | /* inform clients mac address has changed */ |
1770 | rlb_req_update_slave_clients(bond, bond->curr_active_slave); | 1792 | rlb_req_update_slave_clients(bond, bond->curr_active_slave); |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 69aff72c8957..d3a67896d435 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -2126,10 +2126,10 @@ static bool bond_has_this_ip(struct bonding *bond, __be32 ip) | |||
2126 | */ | 2126 | */ |
2127 | static void bond_arp_send(struct net_device *slave_dev, int arp_op, | 2127 | static void bond_arp_send(struct net_device *slave_dev, int arp_op, |
2128 | __be32 dest_ip, __be32 src_ip, | 2128 | __be32 dest_ip, __be32 src_ip, |
2129 | struct bond_vlan_tag *inner, | 2129 | struct bond_vlan_tag *tags) |
2130 | struct bond_vlan_tag *outer) | ||
2131 | { | 2130 | { |
2132 | struct sk_buff *skb; | 2131 | struct sk_buff *skb; |
2132 | int i; | ||
2133 | 2133 | ||
2134 | pr_debug("arp %d on slave %s: dst %pI4 src %pI4\n", | 2134 | pr_debug("arp %d on slave %s: dst %pI4 src %pI4\n", |
2135 | arp_op, slave_dev->name, &dest_ip, &src_ip); | 2135 | arp_op, slave_dev->name, &dest_ip, &src_ip); |
@@ -2141,21 +2141,26 @@ static void bond_arp_send(struct net_device *slave_dev, int arp_op, | |||
2141 | net_err_ratelimited("ARP packet allocation failed\n"); | 2141 | net_err_ratelimited("ARP packet allocation failed\n"); |
2142 | return; | 2142 | return; |
2143 | } | 2143 | } |
2144 | if (outer->vlan_id) { | ||
2145 | if (inner->vlan_id) { | ||
2146 | pr_debug("inner tag: proto %X vid %X\n", | ||
2147 | ntohs(inner->vlan_proto), inner->vlan_id); | ||
2148 | skb = __vlan_put_tag(skb, inner->vlan_proto, | ||
2149 | inner->vlan_id); | ||
2150 | if (!skb) { | ||
2151 | net_err_ratelimited("failed to insert inner VLAN tag\n"); | ||
2152 | return; | ||
2153 | } | ||
2154 | } | ||
2155 | 2144 | ||
2156 | pr_debug("outer reg: proto %X vid %X\n", | 2145 | /* Go through all the tags backwards and add them to the packet */ |
2157 | ntohs(outer->vlan_proto), outer->vlan_id); | 2146 | for (i = BOND_MAX_VLAN_ENCAP - 1; i > 0; i--) { |
2158 | skb = vlan_put_tag(skb, outer->vlan_proto, outer->vlan_id); | 2147 | if (!tags[i].vlan_id) |
2148 | continue; | ||
2149 | |||
2150 | pr_debug("inner tag: proto %X vid %X\n", | ||
2151 | ntohs(tags[i].vlan_proto), tags[i].vlan_id); | ||
2152 | skb = __vlan_put_tag(skb, tags[i].vlan_proto, | ||
2153 | tags[i].vlan_id); | ||
2154 | if (!skb) { | ||
2155 | net_err_ratelimited("failed to insert inner VLAN tag\n"); | ||
2156 | return; | ||
2157 | } | ||
2158 | } | ||
2159 | /* Set the outer tag */ | ||
2160 | if (tags[0].vlan_id) { | ||
2161 | pr_debug("outer tag: proto %X vid %X\n", | ||
2162 | ntohs(tags[0].vlan_proto), tags[0].vlan_id); | ||
2163 | skb = vlan_put_tag(skb, tags[0].vlan_proto, tags[0].vlan_id); | ||
2159 | if (!skb) { | 2164 | if (!skb) { |
2160 | net_err_ratelimited("failed to insert outer VLAN tag\n"); | 2165 | net_err_ratelimited("failed to insert outer VLAN tag\n"); |
2161 | return; | 2166 | return; |
@@ -2164,22 +2169,52 @@ static void bond_arp_send(struct net_device *slave_dev, int arp_op, | |||
2164 | arp_xmit(skb); | 2169 | arp_xmit(skb); |
2165 | } | 2170 | } |
2166 | 2171 | ||
2172 | /* Validate the device path between the @start_dev and the @end_dev. | ||
2173 | * The path is valid if the @end_dev is reachable through device | ||
2174 | * stacking. | ||
2175 | * When the path is validated, collect any vlan information in the | ||
2176 | * path. | ||
2177 | */ | ||
2178 | static bool bond_verify_device_path(struct net_device *start_dev, | ||
2179 | struct net_device *end_dev, | ||
2180 | struct bond_vlan_tag *tags) | ||
2181 | { | ||
2182 | struct net_device *upper; | ||
2183 | struct list_head *iter; | ||
2184 | int idx; | ||
2185 | |||
2186 | if (start_dev == end_dev) | ||
2187 | return true; | ||
2188 | |||
2189 | netdev_for_each_upper_dev_rcu(start_dev, upper, iter) { | ||
2190 | if (bond_verify_device_path(upper, end_dev, tags)) { | ||
2191 | if (is_vlan_dev(upper)) { | ||
2192 | idx = vlan_get_encap_level(upper); | ||
2193 | if (idx >= BOND_MAX_VLAN_ENCAP) | ||
2194 | return false; | ||
2195 | |||
2196 | tags[idx].vlan_proto = | ||
2197 | vlan_dev_vlan_proto(upper); | ||
2198 | tags[idx].vlan_id = vlan_dev_vlan_id(upper); | ||
2199 | } | ||
2200 | return true; | ||
2201 | } | ||
2202 | } | ||
2203 | |||
2204 | return false; | ||
2205 | } | ||
2167 | 2206 | ||
2168 | static void bond_arp_send_all(struct bonding *bond, struct slave *slave) | 2207 | static void bond_arp_send_all(struct bonding *bond, struct slave *slave) |
2169 | { | 2208 | { |
2170 | struct net_device *upper, *vlan_upper; | ||
2171 | struct list_head *iter, *vlan_iter; | ||
2172 | struct rtable *rt; | 2209 | struct rtable *rt; |
2173 | struct bond_vlan_tag inner, outer; | 2210 | struct bond_vlan_tag tags[BOND_MAX_VLAN_ENCAP]; |
2174 | __be32 *targets = bond->params.arp_targets, addr; | 2211 | __be32 *targets = bond->params.arp_targets, addr; |
2175 | int i; | 2212 | int i; |
2213 | bool ret; | ||
2176 | 2214 | ||
2177 | for (i = 0; i < BOND_MAX_ARP_TARGETS && targets[i]; i++) { | 2215 | for (i = 0; i < BOND_MAX_ARP_TARGETS && targets[i]; i++) { |
2178 | pr_debug("basa: target %pI4\n", &targets[i]); | 2216 | pr_debug("basa: target %pI4\n", &targets[i]); |
2179 | inner.vlan_proto = 0; | 2217 | memset(tags, 0, sizeof(tags)); |
2180 | inner.vlan_id = 0; | ||
2181 | outer.vlan_proto = 0; | ||
2182 | outer.vlan_id = 0; | ||
2183 | 2218 | ||
2184 | /* Find out through which dev should the packet go */ | 2219 | /* Find out through which dev should the packet go */ |
2185 | rt = ip_route_output(dev_net(bond->dev), targets[i], 0, | 2220 | rt = ip_route_output(dev_net(bond->dev), targets[i], 0, |
@@ -2192,7 +2227,8 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) | |||
2192 | net_warn_ratelimited("%s: no route to arp_ip_target %pI4 and arp_validate is set\n", | 2227 | net_warn_ratelimited("%s: no route to arp_ip_target %pI4 and arp_validate is set\n", |
2193 | bond->dev->name, | 2228 | bond->dev->name, |
2194 | &targets[i]); | 2229 | &targets[i]); |
2195 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], 0, &inner, &outer); | 2230 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], |
2231 | 0, tags); | ||
2196 | continue; | 2232 | continue; |
2197 | } | 2233 | } |
2198 | 2234 | ||
@@ -2201,52 +2237,12 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) | |||
2201 | goto found; | 2237 | goto found; |
2202 | 2238 | ||
2203 | rcu_read_lock(); | 2239 | rcu_read_lock(); |
2204 | /* first we search only for vlan devices. for every vlan | 2240 | ret = bond_verify_device_path(bond->dev, rt->dst.dev, tags); |
2205 | * found we verify its upper dev list, searching for the | ||
2206 | * rt->dst.dev. If found we save the tag of the vlan and | ||
2207 | * proceed to send the packet. | ||
2208 | */ | ||
2209 | netdev_for_each_all_upper_dev_rcu(bond->dev, vlan_upper, | ||
2210 | vlan_iter) { | ||
2211 | if (!is_vlan_dev(vlan_upper)) | ||
2212 | continue; | ||
2213 | |||
2214 | if (vlan_upper == rt->dst.dev) { | ||
2215 | outer.vlan_proto = vlan_dev_vlan_proto(vlan_upper); | ||
2216 | outer.vlan_id = vlan_dev_vlan_id(vlan_upper); | ||
2217 | rcu_read_unlock(); | ||
2218 | goto found; | ||
2219 | } | ||
2220 | netdev_for_each_all_upper_dev_rcu(vlan_upper, upper, | ||
2221 | iter) { | ||
2222 | if (upper == rt->dst.dev) { | ||
2223 | /* If the upper dev is a vlan dev too, | ||
2224 | * set the vlan tag to inner tag. | ||
2225 | */ | ||
2226 | if (is_vlan_dev(upper)) { | ||
2227 | inner.vlan_proto = vlan_dev_vlan_proto(upper); | ||
2228 | inner.vlan_id = vlan_dev_vlan_id(upper); | ||
2229 | } | ||
2230 | outer.vlan_proto = vlan_dev_vlan_proto(vlan_upper); | ||
2231 | outer.vlan_id = vlan_dev_vlan_id(vlan_upper); | ||
2232 | rcu_read_unlock(); | ||
2233 | goto found; | ||
2234 | } | ||
2235 | } | ||
2236 | } | ||
2237 | |||
2238 | /* if the device we're looking for is not on top of any of | ||
2239 | * our upper vlans, then just search for any dev that | ||
2240 | * matches, and in case it's a vlan - save the id | ||
2241 | */ | ||
2242 | netdev_for_each_all_upper_dev_rcu(bond->dev, upper, iter) { | ||
2243 | if (upper == rt->dst.dev) { | ||
2244 | rcu_read_unlock(); | ||
2245 | goto found; | ||
2246 | } | ||
2247 | } | ||
2248 | rcu_read_unlock(); | 2241 | rcu_read_unlock(); |
2249 | 2242 | ||
2243 | if (ret) | ||
2244 | goto found; | ||
2245 | |||
2250 | /* Not our device - skip */ | 2246 | /* Not our device - skip */ |
2251 | pr_debug("%s: no path to arp_ip_target %pI4 via rt.dev %s\n", | 2247 | pr_debug("%s: no path to arp_ip_target %pI4 via rt.dev %s\n", |
2252 | bond->dev->name, &targets[i], | 2248 | bond->dev->name, &targets[i], |
@@ -2259,7 +2255,7 @@ found: | |||
2259 | addr = bond_confirm_addr(rt->dst.dev, targets[i], 0); | 2255 | addr = bond_confirm_addr(rt->dst.dev, targets[i], 0); |
2260 | ip_rt_put(rt); | 2256 | ip_rt_put(rt); |
2261 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], | 2257 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], |
2262 | addr, &inner, &outer); | 2258 | addr, tags); |
2263 | } | 2259 | } |
2264 | } | 2260 | } |
2265 | 2261 | ||
diff --git a/drivers/net/bonding/bond_options.c b/drivers/net/bonding/bond_options.c index 724e30fa20b9..832070298446 100644 --- a/drivers/net/bonding/bond_options.c +++ b/drivers/net/bonding/bond_options.c | |||
@@ -125,6 +125,7 @@ static const struct bond_opt_value bond_fail_over_mac_tbl[] = { | |||
125 | static const struct bond_opt_value bond_intmax_tbl[] = { | 125 | static const struct bond_opt_value bond_intmax_tbl[] = { |
126 | { "off", 0, BOND_VALFLAG_DEFAULT}, | 126 | { "off", 0, BOND_VALFLAG_DEFAULT}, |
127 | { "maxval", INT_MAX, BOND_VALFLAG_MAX}, | 127 | { "maxval", INT_MAX, BOND_VALFLAG_MAX}, |
128 | { NULL, -1, 0} | ||
128 | }; | 129 | }; |
129 | 130 | ||
130 | static const struct bond_opt_value bond_lacp_rate_tbl[] = { | 131 | static const struct bond_opt_value bond_lacp_rate_tbl[] = { |
diff --git a/drivers/net/bonding/bonding.h b/drivers/net/bonding/bonding.h index b8bdd0acc8f3..00bea320e3b5 100644 --- a/drivers/net/bonding/bonding.h +++ b/drivers/net/bonding/bonding.h | |||
@@ -36,6 +36,7 @@ | |||
36 | 36 | ||
37 | #define bond_version DRV_DESCRIPTION ": v" DRV_VERSION " (" DRV_RELDATE ")\n" | 37 | #define bond_version DRV_DESCRIPTION ": v" DRV_VERSION " (" DRV_RELDATE ")\n" |
38 | 38 | ||
39 | #define BOND_MAX_VLAN_ENCAP 2 | ||
39 | #define BOND_MAX_ARP_TARGETS 16 | 40 | #define BOND_MAX_ARP_TARGETS 16 |
40 | 41 | ||
41 | #define BOND_DEFAULT_MIIMON 100 | 42 | #define BOND_DEFAULT_MIIMON 100 |
diff --git a/drivers/net/can/c_can/Kconfig b/drivers/net/can/c_can/Kconfig index 8ab7103d4f44..61ffc12d8fd8 100644 --- a/drivers/net/can/c_can/Kconfig +++ b/drivers/net/can/c_can/Kconfig | |||
@@ -14,13 +14,6 @@ config CAN_C_CAN_PLATFORM | |||
14 | SPEAr1310 and SPEAr320 evaluation boards & TI (www.ti.com) | 14 | SPEAr1310 and SPEAr320 evaluation boards & TI (www.ti.com) |
15 | boards like am335x, dm814x, dm813x and dm811x. | 15 | boards like am335x, dm814x, dm813x and dm811x. |
16 | 16 | ||
17 | config CAN_C_CAN_STRICT_FRAME_ORDERING | ||
18 | bool "Force a strict RX CAN frame order (may cause frame loss)" | ||
19 | ---help--- | ||
20 | The RX split buffer prevents packet reordering but can cause packet | ||
21 | loss. Only enable this option when you accept to lose CAN frames | ||
22 | in favour of getting the received CAN frames in the correct order. | ||
23 | |||
24 | config CAN_C_CAN_PCI | 17 | config CAN_C_CAN_PCI |
25 | tristate "Generic PCI Bus based C_CAN/D_CAN driver" | 18 | tristate "Generic PCI Bus based C_CAN/D_CAN driver" |
26 | depends on PCI | 19 | depends on PCI |
diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c index a2ca820b5373..95e04e2002da 100644 --- a/drivers/net/can/c_can/c_can.c +++ b/drivers/net/can/c_can/c_can.c | |||
@@ -732,26 +732,12 @@ static u32 c_can_adjust_pending(u32 pend) | |||
732 | static inline void c_can_rx_object_get(struct net_device *dev, | 732 | static inline void c_can_rx_object_get(struct net_device *dev, |
733 | struct c_can_priv *priv, u32 obj) | 733 | struct c_can_priv *priv, u32 obj) |
734 | { | 734 | { |
735 | #ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING | ||
736 | if (obj < C_CAN_MSG_RX_LOW_LAST) | ||
737 | c_can_object_get(dev, IF_RX, obj, IF_COMM_RCV_LOW); | ||
738 | else | ||
739 | #endif | ||
740 | c_can_object_get(dev, IF_RX, obj, priv->comm_rcv_high); | 735 | c_can_object_get(dev, IF_RX, obj, priv->comm_rcv_high); |
741 | } | 736 | } |
742 | 737 | ||
743 | static inline void c_can_rx_finalize(struct net_device *dev, | 738 | static inline void c_can_rx_finalize(struct net_device *dev, |
744 | struct c_can_priv *priv, u32 obj) | 739 | struct c_can_priv *priv, u32 obj) |
745 | { | 740 | { |
746 | #ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING | ||
747 | if (obj < C_CAN_MSG_RX_LOW_LAST) | ||
748 | priv->rxmasked |= BIT(obj - 1); | ||
749 | else if (obj == C_CAN_MSG_RX_LOW_LAST) { | ||
750 | priv->rxmasked = 0; | ||
751 | /* activate all lower message objects */ | ||
752 | c_can_activate_all_lower_rx_msg_obj(dev, IF_RX); | ||
753 | } | ||
754 | #endif | ||
755 | if (priv->type != BOSCH_D_CAN) | 741 | if (priv->type != BOSCH_D_CAN) |
756 | c_can_object_get(dev, IF_RX, obj, IF_COMM_CLR_NEWDAT); | 742 | c_can_object_get(dev, IF_RX, obj, IF_COMM_CLR_NEWDAT); |
757 | } | 743 | } |
@@ -799,9 +785,6 @@ static inline u32 c_can_get_pending(struct c_can_priv *priv) | |||
799 | { | 785 | { |
800 | u32 pend = priv->read_reg(priv, C_CAN_NEWDAT1_REG); | 786 | u32 pend = priv->read_reg(priv, C_CAN_NEWDAT1_REG); |
801 | 787 | ||
802 | #ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING | ||
803 | pend &= ~priv->rxmasked; | ||
804 | #endif | ||
805 | return pend; | 788 | return pend; |
806 | } | 789 | } |
807 | 790 | ||
@@ -814,25 +797,6 @@ static inline u32 c_can_get_pending(struct c_can_priv *priv) | |||
814 | * has arrived. To work-around this issue, we keep two groups of message | 797 | * has arrived. To work-around this issue, we keep two groups of message |
815 | * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT. | 798 | * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT. |
816 | * | 799 | * |
817 | * If CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING = y | ||
818 | * | ||
819 | * To ensure in-order frame reception we use the following | ||
820 | * approach while re-activating a message object to receive further | ||
821 | * frames: | ||
822 | * - if the current message object number is lower than | ||
823 | * C_CAN_MSG_RX_LOW_LAST, do not clear the NEWDAT bit while clearing | ||
824 | * the INTPND bit. | ||
825 | * - if the current message object number is equal to | ||
826 | * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of all lower | ||
827 | * receive message objects. | ||
828 | * - if the current message object number is greater than | ||
829 | * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of | ||
830 | * only this message object. | ||
831 | * | ||
832 | * This can cause packet loss! | ||
833 | * | ||
834 | * If CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING = n | ||
835 | * | ||
836 | * We clear the newdat bit right away. | 800 | * We clear the newdat bit right away. |
837 | * | 801 | * |
838 | * This can result in packet reordering when the readout is slow. | 802 | * This can result in packet reordering when the readout is slow. |
diff --git a/drivers/net/can/sja1000/peak_pci.c b/drivers/net/can/sja1000/peak_pci.c index c540e3d12e3d..564933ae218c 100644 --- a/drivers/net/can/sja1000/peak_pci.c +++ b/drivers/net/can/sja1000/peak_pci.c | |||
@@ -551,7 +551,7 @@ static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
551 | { | 551 | { |
552 | struct sja1000_priv *priv; | 552 | struct sja1000_priv *priv; |
553 | struct peak_pci_chan *chan; | 553 | struct peak_pci_chan *chan; |
554 | struct net_device *dev; | 554 | struct net_device *dev, *prev_dev; |
555 | void __iomem *cfg_base, *reg_base; | 555 | void __iomem *cfg_base, *reg_base; |
556 | u16 sub_sys_id, icr; | 556 | u16 sub_sys_id, icr; |
557 | int i, err, channels; | 557 | int i, err, channels; |
@@ -688,11 +688,13 @@ failure_remove_channels: | |||
688 | writew(0x0, cfg_base + PITA_ICR + 2); | 688 | writew(0x0, cfg_base + PITA_ICR + 2); |
689 | 689 | ||
690 | chan = NULL; | 690 | chan = NULL; |
691 | for (dev = pci_get_drvdata(pdev); dev; dev = chan->prev_dev) { | 691 | for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) { |
692 | unregister_sja1000dev(dev); | ||
693 | free_sja1000dev(dev); | ||
694 | priv = netdev_priv(dev); | 692 | priv = netdev_priv(dev); |
695 | chan = priv->priv; | 693 | chan = priv->priv; |
694 | prev_dev = chan->prev_dev; | ||
695 | |||
696 | unregister_sja1000dev(dev); | ||
697 | free_sja1000dev(dev); | ||
696 | } | 698 | } |
697 | 699 | ||
698 | /* free any PCIeC resources too */ | 700 | /* free any PCIeC resources too */ |
@@ -726,10 +728,12 @@ static void peak_pci_remove(struct pci_dev *pdev) | |||
726 | 728 | ||
727 | /* Loop over all registered devices */ | 729 | /* Loop over all registered devices */ |
728 | while (1) { | 730 | while (1) { |
731 | struct net_device *prev_dev = chan->prev_dev; | ||
732 | |||
729 | dev_info(&pdev->dev, "removing device %s\n", dev->name); | 733 | dev_info(&pdev->dev, "removing device %s\n", dev->name); |
730 | unregister_sja1000dev(dev); | 734 | unregister_sja1000dev(dev); |
731 | free_sja1000dev(dev); | 735 | free_sja1000dev(dev); |
732 | dev = chan->prev_dev; | 736 | dev = prev_dev; |
733 | 737 | ||
734 | if (!dev) { | 738 | if (!dev) { |
735 | /* do that only for first channel */ | 739 | /* do that only for first channel */ |
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig index 39b26fe28d10..d7401017a3f1 100644 --- a/drivers/net/ethernet/Kconfig +++ b/drivers/net/ethernet/Kconfig | |||
@@ -35,6 +35,18 @@ source "drivers/net/ethernet/calxeda/Kconfig" | |||
35 | source "drivers/net/ethernet/chelsio/Kconfig" | 35 | source "drivers/net/ethernet/chelsio/Kconfig" |
36 | source "drivers/net/ethernet/cirrus/Kconfig" | 36 | source "drivers/net/ethernet/cirrus/Kconfig" |
37 | source "drivers/net/ethernet/cisco/Kconfig" | 37 | source "drivers/net/ethernet/cisco/Kconfig" |
38 | |||
39 | config CX_ECAT | ||
40 | tristate "Beckhoff CX5020 EtherCAT master support" | ||
41 | depends on PCI | ||
42 | ---help--- | ||
43 | Driver for EtherCAT master module located on CCAT FPGA | ||
44 | that can be found on Beckhoff CX5020, and possibly other of CX | ||
45 | Beckhoff CX series industrial PCs. | ||
46 | |||
47 | To compile this driver as a module, choose M here. The module | ||
48 | will be called ec_bhf. | ||
49 | |||
38 | source "drivers/net/ethernet/davicom/Kconfig" | 50 | source "drivers/net/ethernet/davicom/Kconfig" |
39 | 51 | ||
40 | config DNET | 52 | config DNET |
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile index 545d0b3b9cb4..35190e36c456 100644 --- a/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile | |||
@@ -21,6 +21,7 @@ obj-$(CONFIG_NET_CALXEDA_XGMAC) += calxeda/ | |||
21 | obj-$(CONFIG_NET_VENDOR_CHELSIO) += chelsio/ | 21 | obj-$(CONFIG_NET_VENDOR_CHELSIO) += chelsio/ |
22 | obj-$(CONFIG_NET_VENDOR_CIRRUS) += cirrus/ | 22 | obj-$(CONFIG_NET_VENDOR_CIRRUS) += cirrus/ |
23 | obj-$(CONFIG_NET_VENDOR_CISCO) += cisco/ | 23 | obj-$(CONFIG_NET_VENDOR_CISCO) += cisco/ |
24 | obj-$(CONFIG_CX_ECAT) += ec_bhf.o | ||
24 | obj-$(CONFIG_DM9000) += davicom/ | 25 | obj-$(CONFIG_DM9000) += davicom/ |
25 | obj-$(CONFIG_DNET) += dnet.o | 26 | obj-$(CONFIG_DNET) += dnet.o |
26 | obj-$(CONFIG_NET_VENDOR_DEC) += dec/ | 27 | obj-$(CONFIG_NET_VENDOR_DEC) += dec/ |
diff --git a/drivers/net/ethernet/altera/Makefile b/drivers/net/ethernet/altera/Makefile index d4a187e45369..3eff2fd3997e 100644 --- a/drivers/net/ethernet/altera/Makefile +++ b/drivers/net/ethernet/altera/Makefile | |||
@@ -5,3 +5,4 @@ | |||
5 | obj-$(CONFIG_ALTERA_TSE) += altera_tse.o | 5 | obj-$(CONFIG_ALTERA_TSE) += altera_tse.o |
6 | altera_tse-objs := altera_tse_main.o altera_tse_ethtool.o \ | 6 | altera_tse-objs := altera_tse_main.o altera_tse_ethtool.o \ |
7 | altera_msgdma.o altera_sgdma.o altera_utils.o | 7 | altera_msgdma.o altera_sgdma.o altera_utils.o |
8 | ccflags-y += -D__CHECK_ENDIAN__ | ||
diff --git a/drivers/net/ethernet/altera/altera_msgdma.c b/drivers/net/ethernet/altera/altera_msgdma.c index 4d1f2fdd5c32..0fb986ba3290 100644 --- a/drivers/net/ethernet/altera/altera_msgdma.c +++ b/drivers/net/ethernet/altera/altera_msgdma.c | |||
@@ -37,18 +37,16 @@ void msgdma_start_rxdma(struct altera_tse_private *priv) | |||
37 | void msgdma_reset(struct altera_tse_private *priv) | 37 | void msgdma_reset(struct altera_tse_private *priv) |
38 | { | 38 | { |
39 | int counter; | 39 | int counter; |
40 | struct msgdma_csr *txcsr = | ||
41 | (struct msgdma_csr *)priv->tx_dma_csr; | ||
42 | struct msgdma_csr *rxcsr = | ||
43 | (struct msgdma_csr *)priv->rx_dma_csr; | ||
44 | 40 | ||
45 | /* Reset Rx mSGDMA */ | 41 | /* Reset Rx mSGDMA */ |
46 | iowrite32(MSGDMA_CSR_STAT_MASK, &rxcsr->status); | 42 | csrwr32(MSGDMA_CSR_STAT_MASK, priv->rx_dma_csr, |
47 | iowrite32(MSGDMA_CSR_CTL_RESET, &rxcsr->control); | 43 | msgdma_csroffs(status)); |
44 | csrwr32(MSGDMA_CSR_CTL_RESET, priv->rx_dma_csr, | ||
45 | msgdma_csroffs(control)); | ||
48 | 46 | ||
49 | counter = 0; | 47 | counter = 0; |
50 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { | 48 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
51 | if (tse_bit_is_clear(&rxcsr->status, | 49 | if (tse_bit_is_clear(priv->rx_dma_csr, msgdma_csroffs(status), |
52 | MSGDMA_CSR_STAT_RESETTING)) | 50 | MSGDMA_CSR_STAT_RESETTING)) |
53 | break; | 51 | break; |
54 | udelay(1); | 52 | udelay(1); |
@@ -59,15 +57,18 @@ void msgdma_reset(struct altera_tse_private *priv) | |||
59 | "TSE Rx mSGDMA resetting bit never cleared!\n"); | 57 | "TSE Rx mSGDMA resetting bit never cleared!\n"); |
60 | 58 | ||
61 | /* clear all status bits */ | 59 | /* clear all status bits */ |
62 | iowrite32(MSGDMA_CSR_STAT_MASK, &rxcsr->status); | 60 | csrwr32(MSGDMA_CSR_STAT_MASK, priv->rx_dma_csr, msgdma_csroffs(status)); |
63 | 61 | ||
64 | /* Reset Tx mSGDMA */ | 62 | /* Reset Tx mSGDMA */ |
65 | iowrite32(MSGDMA_CSR_STAT_MASK, &txcsr->status); | 63 | csrwr32(MSGDMA_CSR_STAT_MASK, priv->tx_dma_csr, |
66 | iowrite32(MSGDMA_CSR_CTL_RESET, &txcsr->control); | 64 | msgdma_csroffs(status)); |
65 | |||
66 | csrwr32(MSGDMA_CSR_CTL_RESET, priv->tx_dma_csr, | ||
67 | msgdma_csroffs(control)); | ||
67 | 68 | ||
68 | counter = 0; | 69 | counter = 0; |
69 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { | 70 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
70 | if (tse_bit_is_clear(&txcsr->status, | 71 | if (tse_bit_is_clear(priv->tx_dma_csr, msgdma_csroffs(status), |
71 | MSGDMA_CSR_STAT_RESETTING)) | 72 | MSGDMA_CSR_STAT_RESETTING)) |
72 | break; | 73 | break; |
73 | udelay(1); | 74 | udelay(1); |
@@ -78,58 +79,58 @@ void msgdma_reset(struct altera_tse_private *priv) | |||
78 | "TSE Tx mSGDMA resetting bit never cleared!\n"); | 79 | "TSE Tx mSGDMA resetting bit never cleared!\n"); |
79 | 80 | ||
80 | /* clear all status bits */ | 81 | /* clear all status bits */ |
81 | iowrite32(MSGDMA_CSR_STAT_MASK, &txcsr->status); | 82 | csrwr32(MSGDMA_CSR_STAT_MASK, priv->tx_dma_csr, msgdma_csroffs(status)); |
82 | } | 83 | } |
83 | 84 | ||
84 | void msgdma_disable_rxirq(struct altera_tse_private *priv) | 85 | void msgdma_disable_rxirq(struct altera_tse_private *priv) |
85 | { | 86 | { |
86 | struct msgdma_csr *csr = priv->rx_dma_csr; | 87 | tse_clear_bit(priv->rx_dma_csr, msgdma_csroffs(control), |
87 | tse_clear_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | 88 | MSGDMA_CSR_CTL_GLOBAL_INTR); |
88 | } | 89 | } |
89 | 90 | ||
90 | void msgdma_enable_rxirq(struct altera_tse_private *priv) | 91 | void msgdma_enable_rxirq(struct altera_tse_private *priv) |
91 | { | 92 | { |
92 | struct msgdma_csr *csr = priv->rx_dma_csr; | 93 | tse_set_bit(priv->rx_dma_csr, msgdma_csroffs(control), |
93 | tse_set_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | 94 | MSGDMA_CSR_CTL_GLOBAL_INTR); |
94 | } | 95 | } |
95 | 96 | ||
96 | void msgdma_disable_txirq(struct altera_tse_private *priv) | 97 | void msgdma_disable_txirq(struct altera_tse_private *priv) |
97 | { | 98 | { |
98 | struct msgdma_csr *csr = priv->tx_dma_csr; | 99 | tse_clear_bit(priv->tx_dma_csr, msgdma_csroffs(control), |
99 | tse_clear_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | 100 | MSGDMA_CSR_CTL_GLOBAL_INTR); |
100 | } | 101 | } |
101 | 102 | ||
102 | void msgdma_enable_txirq(struct altera_tse_private *priv) | 103 | void msgdma_enable_txirq(struct altera_tse_private *priv) |
103 | { | 104 | { |
104 | struct msgdma_csr *csr = priv->tx_dma_csr; | 105 | tse_set_bit(priv->tx_dma_csr, msgdma_csroffs(control), |
105 | tse_set_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | 106 | MSGDMA_CSR_CTL_GLOBAL_INTR); |
106 | } | 107 | } |
107 | 108 | ||
108 | void msgdma_clear_rxirq(struct altera_tse_private *priv) | 109 | void msgdma_clear_rxirq(struct altera_tse_private *priv) |
109 | { | 110 | { |
110 | struct msgdma_csr *csr = priv->rx_dma_csr; | 111 | csrwr32(MSGDMA_CSR_STAT_IRQ, priv->rx_dma_csr, msgdma_csroffs(status)); |
111 | iowrite32(MSGDMA_CSR_STAT_IRQ, &csr->status); | ||
112 | } | 112 | } |
113 | 113 | ||
114 | void msgdma_clear_txirq(struct altera_tse_private *priv) | 114 | void msgdma_clear_txirq(struct altera_tse_private *priv) |
115 | { | 115 | { |
116 | struct msgdma_csr *csr = priv->tx_dma_csr; | 116 | csrwr32(MSGDMA_CSR_STAT_IRQ, priv->tx_dma_csr, msgdma_csroffs(status)); |
117 | iowrite32(MSGDMA_CSR_STAT_IRQ, &csr->status); | ||
118 | } | 117 | } |
119 | 118 | ||
120 | /* return 0 to indicate transmit is pending */ | 119 | /* return 0 to indicate transmit is pending */ |
121 | int msgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) | 120 | int msgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) |
122 | { | 121 | { |
123 | struct msgdma_extended_desc *desc = priv->tx_dma_desc; | 122 | csrwr32(lower_32_bits(buffer->dma_addr), priv->tx_dma_desc, |
124 | 123 | msgdma_descroffs(read_addr_lo)); | |
125 | iowrite32(lower_32_bits(buffer->dma_addr), &desc->read_addr_lo); | 124 | csrwr32(upper_32_bits(buffer->dma_addr), priv->tx_dma_desc, |
126 | iowrite32(upper_32_bits(buffer->dma_addr), &desc->read_addr_hi); | 125 | msgdma_descroffs(read_addr_hi)); |
127 | iowrite32(0, &desc->write_addr_lo); | 126 | csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(write_addr_lo)); |
128 | iowrite32(0, &desc->write_addr_hi); | 127 | csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(write_addr_hi)); |
129 | iowrite32(buffer->len, &desc->len); | 128 | csrwr32(buffer->len, priv->tx_dma_desc, msgdma_descroffs(len)); |
130 | iowrite32(0, &desc->burst_seq_num); | 129 | csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(burst_seq_num)); |
131 | iowrite32(MSGDMA_DESC_TX_STRIDE, &desc->stride); | 130 | csrwr32(MSGDMA_DESC_TX_STRIDE, priv->tx_dma_desc, |
132 | iowrite32(MSGDMA_DESC_CTL_TX_SINGLE, &desc->control); | 131 | msgdma_descroffs(stride)); |
132 | csrwr32(MSGDMA_DESC_CTL_TX_SINGLE, priv->tx_dma_desc, | ||
133 | msgdma_descroffs(control)); | ||
133 | return 0; | 134 | return 0; |
134 | } | 135 | } |
135 | 136 | ||
@@ -138,17 +139,16 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv) | |||
138 | u32 ready = 0; | 139 | u32 ready = 0; |
139 | u32 inuse; | 140 | u32 inuse; |
140 | u32 status; | 141 | u32 status; |
141 | struct msgdma_csr *txcsr = | ||
142 | (struct msgdma_csr *)priv->tx_dma_csr; | ||
143 | 142 | ||
144 | /* Get number of sent descriptors */ | 143 | /* Get number of sent descriptors */ |
145 | inuse = ioread32(&txcsr->rw_fill_level) & 0xffff; | 144 | inuse = csrrd32(priv->tx_dma_csr, msgdma_csroffs(rw_fill_level)) |
145 | & 0xffff; | ||
146 | 146 | ||
147 | if (inuse) { /* Tx FIFO is not empty */ | 147 | if (inuse) { /* Tx FIFO is not empty */ |
148 | ready = priv->tx_prod - priv->tx_cons - inuse - 1; | 148 | ready = priv->tx_prod - priv->tx_cons - inuse - 1; |
149 | } else { | 149 | } else { |
150 | /* Check for buffered last packet */ | 150 | /* Check for buffered last packet */ |
151 | status = ioread32(&txcsr->status); | 151 | status = csrrd32(priv->tx_dma_csr, msgdma_csroffs(status)); |
152 | if (status & MSGDMA_CSR_STAT_BUSY) | 152 | if (status & MSGDMA_CSR_STAT_BUSY) |
153 | ready = priv->tx_prod - priv->tx_cons - 1; | 153 | ready = priv->tx_prod - priv->tx_cons - 1; |
154 | else | 154 | else |
@@ -162,7 +162,6 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv) | |||
162 | void msgdma_add_rx_desc(struct altera_tse_private *priv, | 162 | void msgdma_add_rx_desc(struct altera_tse_private *priv, |
163 | struct tse_buffer *rxbuffer) | 163 | struct tse_buffer *rxbuffer) |
164 | { | 164 | { |
165 | struct msgdma_extended_desc *desc = priv->rx_dma_desc; | ||
166 | u32 len = priv->rx_dma_buf_sz; | 165 | u32 len = priv->rx_dma_buf_sz; |
167 | dma_addr_t dma_addr = rxbuffer->dma_addr; | 166 | dma_addr_t dma_addr = rxbuffer->dma_addr; |
168 | u32 control = (MSGDMA_DESC_CTL_END_ON_EOP | 167 | u32 control = (MSGDMA_DESC_CTL_END_ON_EOP |
@@ -172,14 +171,16 @@ void msgdma_add_rx_desc(struct altera_tse_private *priv, | |||
172 | | MSGDMA_DESC_CTL_TR_ERR_IRQ | 171 | | MSGDMA_DESC_CTL_TR_ERR_IRQ |
173 | | MSGDMA_DESC_CTL_GO); | 172 | | MSGDMA_DESC_CTL_GO); |
174 | 173 | ||
175 | iowrite32(0, &desc->read_addr_lo); | 174 | csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(read_addr_lo)); |
176 | iowrite32(0, &desc->read_addr_hi); | 175 | csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(read_addr_hi)); |
177 | iowrite32(lower_32_bits(dma_addr), &desc->write_addr_lo); | 176 | csrwr32(lower_32_bits(dma_addr), priv->rx_dma_desc, |
178 | iowrite32(upper_32_bits(dma_addr), &desc->write_addr_hi); | 177 | msgdma_descroffs(write_addr_lo)); |
179 | iowrite32(len, &desc->len); | 178 | csrwr32(upper_32_bits(dma_addr), priv->rx_dma_desc, |
180 | iowrite32(0, &desc->burst_seq_num); | 179 | msgdma_descroffs(write_addr_hi)); |
181 | iowrite32(0x00010001, &desc->stride); | 180 | csrwr32(len, priv->rx_dma_desc, msgdma_descroffs(len)); |
182 | iowrite32(control, &desc->control); | 181 | csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(burst_seq_num)); |
182 | csrwr32(0x00010001, priv->rx_dma_desc, msgdma_descroffs(stride)); | ||
183 | csrwr32(control, priv->rx_dma_desc, msgdma_descroffs(control)); | ||
183 | } | 184 | } |
184 | 185 | ||
185 | /* status is returned on upper 16 bits, | 186 | /* status is returned on upper 16 bits, |
@@ -190,14 +191,13 @@ u32 msgdma_rx_status(struct altera_tse_private *priv) | |||
190 | u32 rxstatus = 0; | 191 | u32 rxstatus = 0; |
191 | u32 pktlength; | 192 | u32 pktlength; |
192 | u32 pktstatus; | 193 | u32 pktstatus; |
193 | struct msgdma_csr *rxcsr = | 194 | |
194 | (struct msgdma_csr *)priv->rx_dma_csr; | 195 | if (csrrd32(priv->rx_dma_csr, msgdma_csroffs(resp_fill_level)) |
195 | struct msgdma_response *rxresp = | 196 | & 0xffff) { |
196 | (struct msgdma_response *)priv->rx_dma_resp; | 197 | pktlength = csrrd32(priv->rx_dma_resp, |
197 | 198 | msgdma_respoffs(bytes_transferred)); | |
198 | if (ioread32(&rxcsr->resp_fill_level) & 0xffff) { | 199 | pktstatus = csrrd32(priv->rx_dma_resp, |
199 | pktlength = ioread32(&rxresp->bytes_transferred); | 200 | msgdma_respoffs(status)); |
200 | pktstatus = ioread32(&rxresp->status); | ||
201 | rxstatus = pktstatus; | 201 | rxstatus = pktstatus; |
202 | rxstatus = rxstatus << 16; | 202 | rxstatus = rxstatus << 16; |
203 | rxstatus |= (pktlength & 0xffff); | 203 | rxstatus |= (pktlength & 0xffff); |
diff --git a/drivers/net/ethernet/altera/altera_msgdmahw.h b/drivers/net/ethernet/altera/altera_msgdmahw.h index d7b59ba4019c..e335626e1b6b 100644 --- a/drivers/net/ethernet/altera/altera_msgdmahw.h +++ b/drivers/net/ethernet/altera/altera_msgdmahw.h | |||
@@ -17,15 +17,6 @@ | |||
17 | #ifndef __ALTERA_MSGDMAHW_H__ | 17 | #ifndef __ALTERA_MSGDMAHW_H__ |
18 | #define __ALTERA_MSGDMAHW_H__ | 18 | #define __ALTERA_MSGDMAHW_H__ |
19 | 19 | ||
20 | /* mSGDMA standard descriptor format | ||
21 | */ | ||
22 | struct msgdma_desc { | ||
23 | u32 read_addr; /* data buffer source address */ | ||
24 | u32 write_addr; /* data buffer destination address */ | ||
25 | u32 len; /* the number of bytes to transfer per descriptor */ | ||
26 | u32 control; /* characteristics of the transfer */ | ||
27 | }; | ||
28 | |||
29 | /* mSGDMA extended descriptor format | 20 | /* mSGDMA extended descriptor format |
30 | */ | 21 | */ |
31 | struct msgdma_extended_desc { | 22 | struct msgdma_extended_desc { |
@@ -159,6 +150,10 @@ struct msgdma_response { | |||
159 | u32 status; | 150 | u32 status; |
160 | }; | 151 | }; |
161 | 152 | ||
153 | #define msgdma_respoffs(a) (offsetof(struct msgdma_response, a)) | ||
154 | #define msgdma_csroffs(a) (offsetof(struct msgdma_csr, a)) | ||
155 | #define msgdma_descroffs(a) (offsetof(struct msgdma_extended_desc, a)) | ||
156 | |||
162 | /* mSGDMA response register bit definitions | 157 | /* mSGDMA response register bit definitions |
163 | */ | 158 | */ |
164 | #define MSGDMA_RESP_EARLY_TERM BIT(8) | 159 | #define MSGDMA_RESP_EARLY_TERM BIT(8) |
diff --git a/drivers/net/ethernet/altera/altera_sgdma.c b/drivers/net/ethernet/altera/altera_sgdma.c index 9ce8630692b6..99cc56f451cf 100644 --- a/drivers/net/ethernet/altera/altera_sgdma.c +++ b/drivers/net/ethernet/altera/altera_sgdma.c | |||
@@ -20,8 +20,8 @@ | |||
20 | #include "altera_sgdmahw.h" | 20 | #include "altera_sgdmahw.h" |
21 | #include "altera_sgdma.h" | 21 | #include "altera_sgdma.h" |
22 | 22 | ||
23 | static void sgdma_setup_descrip(struct sgdma_descrip *desc, | 23 | static void sgdma_setup_descrip(struct sgdma_descrip __iomem *desc, |
24 | struct sgdma_descrip *ndesc, | 24 | struct sgdma_descrip __iomem *ndesc, |
25 | dma_addr_t ndesc_phys, | 25 | dma_addr_t ndesc_phys, |
26 | dma_addr_t raddr, | 26 | dma_addr_t raddr, |
27 | dma_addr_t waddr, | 27 | dma_addr_t waddr, |
@@ -31,17 +31,17 @@ static void sgdma_setup_descrip(struct sgdma_descrip *desc, | |||
31 | int wfixed); | 31 | int wfixed); |
32 | 32 | ||
33 | static int sgdma_async_write(struct altera_tse_private *priv, | 33 | static int sgdma_async_write(struct altera_tse_private *priv, |
34 | struct sgdma_descrip *desc); | 34 | struct sgdma_descrip __iomem *desc); |
35 | 35 | ||
36 | static int sgdma_async_read(struct altera_tse_private *priv); | 36 | static int sgdma_async_read(struct altera_tse_private *priv); |
37 | 37 | ||
38 | static dma_addr_t | 38 | static dma_addr_t |
39 | sgdma_txphysaddr(struct altera_tse_private *priv, | 39 | sgdma_txphysaddr(struct altera_tse_private *priv, |
40 | struct sgdma_descrip *desc); | 40 | struct sgdma_descrip __iomem *desc); |
41 | 41 | ||
42 | static dma_addr_t | 42 | static dma_addr_t |
43 | sgdma_rxphysaddr(struct altera_tse_private *priv, | 43 | sgdma_rxphysaddr(struct altera_tse_private *priv, |
44 | struct sgdma_descrip *desc); | 44 | struct sgdma_descrip __iomem *desc); |
45 | 45 | ||
46 | static int sgdma_txbusy(struct altera_tse_private *priv); | 46 | static int sgdma_txbusy(struct altera_tse_private *priv); |
47 | 47 | ||
@@ -79,7 +79,8 @@ int sgdma_initialize(struct altera_tse_private *priv) | |||
79 | priv->rxdescphys = (dma_addr_t) 0; | 79 | priv->rxdescphys = (dma_addr_t) 0; |
80 | priv->txdescphys = (dma_addr_t) 0; | 80 | priv->txdescphys = (dma_addr_t) 0; |
81 | 81 | ||
82 | priv->rxdescphys = dma_map_single(priv->device, priv->rx_dma_desc, | 82 | priv->rxdescphys = dma_map_single(priv->device, |
83 | (void __force *)priv->rx_dma_desc, | ||
83 | priv->rxdescmem, DMA_BIDIRECTIONAL); | 84 | priv->rxdescmem, DMA_BIDIRECTIONAL); |
84 | 85 | ||
85 | if (dma_mapping_error(priv->device, priv->rxdescphys)) { | 86 | if (dma_mapping_error(priv->device, priv->rxdescphys)) { |
@@ -88,7 +89,8 @@ int sgdma_initialize(struct altera_tse_private *priv) | |||
88 | return -EINVAL; | 89 | return -EINVAL; |
89 | } | 90 | } |
90 | 91 | ||
91 | priv->txdescphys = dma_map_single(priv->device, priv->tx_dma_desc, | 92 | priv->txdescphys = dma_map_single(priv->device, |
93 | (void __force *)priv->tx_dma_desc, | ||
92 | priv->txdescmem, DMA_TO_DEVICE); | 94 | priv->txdescmem, DMA_TO_DEVICE); |
93 | 95 | ||
94 | if (dma_mapping_error(priv->device, priv->txdescphys)) { | 96 | if (dma_mapping_error(priv->device, priv->txdescphys)) { |
@@ -98,8 +100,8 @@ int sgdma_initialize(struct altera_tse_private *priv) | |||
98 | } | 100 | } |
99 | 101 | ||
100 | /* Initialize descriptor memory to all 0's, sync memory to cache */ | 102 | /* Initialize descriptor memory to all 0's, sync memory to cache */ |
101 | memset(priv->tx_dma_desc, 0, priv->txdescmem); | 103 | memset_io(priv->tx_dma_desc, 0, priv->txdescmem); |
102 | memset(priv->rx_dma_desc, 0, priv->rxdescmem); | 104 | memset_io(priv->rx_dma_desc, 0, priv->rxdescmem); |
103 | 105 | ||
104 | dma_sync_single_for_device(priv->device, priv->txdescphys, | 106 | dma_sync_single_for_device(priv->device, priv->txdescphys, |
105 | priv->txdescmem, DMA_TO_DEVICE); | 107 | priv->txdescmem, DMA_TO_DEVICE); |
@@ -126,22 +128,15 @@ void sgdma_uninitialize(struct altera_tse_private *priv) | |||
126 | */ | 128 | */ |
127 | void sgdma_reset(struct altera_tse_private *priv) | 129 | void sgdma_reset(struct altera_tse_private *priv) |
128 | { | 130 | { |
129 | u32 *ptxdescripmem = (u32 *)priv->tx_dma_desc; | ||
130 | u32 txdescriplen = priv->txdescmem; | ||
131 | u32 *prxdescripmem = (u32 *)priv->rx_dma_desc; | ||
132 | u32 rxdescriplen = priv->rxdescmem; | ||
133 | struct sgdma_csr *ptxsgdma = (struct sgdma_csr *)priv->tx_dma_csr; | ||
134 | struct sgdma_csr *prxsgdma = (struct sgdma_csr *)priv->rx_dma_csr; | ||
135 | |||
136 | /* Initialize descriptor memory to 0 */ | 131 | /* Initialize descriptor memory to 0 */ |
137 | memset(ptxdescripmem, 0, txdescriplen); | 132 | memset_io(priv->tx_dma_desc, 0, priv->txdescmem); |
138 | memset(prxdescripmem, 0, rxdescriplen); | 133 | memset_io(priv->rx_dma_desc, 0, priv->rxdescmem); |
139 | 134 | ||
140 | iowrite32(SGDMA_CTRLREG_RESET, &ptxsgdma->control); | 135 | csrwr32(SGDMA_CTRLREG_RESET, priv->tx_dma_csr, sgdma_csroffs(control)); |
141 | iowrite32(0, &ptxsgdma->control); | 136 | csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control)); |
142 | 137 | ||
143 | iowrite32(SGDMA_CTRLREG_RESET, &prxsgdma->control); | 138 | csrwr32(SGDMA_CTRLREG_RESET, priv->rx_dma_csr, sgdma_csroffs(control)); |
144 | iowrite32(0, &prxsgdma->control); | 139 | csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control)); |
145 | } | 140 | } |
146 | 141 | ||
147 | /* For SGDMA, interrupts remain enabled after initially enabling, | 142 | /* For SGDMA, interrupts remain enabled after initially enabling, |
@@ -167,14 +162,14 @@ void sgdma_disable_txirq(struct altera_tse_private *priv) | |||
167 | 162 | ||
168 | void sgdma_clear_rxirq(struct altera_tse_private *priv) | 163 | void sgdma_clear_rxirq(struct altera_tse_private *priv) |
169 | { | 164 | { |
170 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 165 | tse_set_bit(priv->rx_dma_csr, sgdma_csroffs(control), |
171 | tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); | 166 | SGDMA_CTRLREG_CLRINT); |
172 | } | 167 | } |
173 | 168 | ||
174 | void sgdma_clear_txirq(struct altera_tse_private *priv) | 169 | void sgdma_clear_txirq(struct altera_tse_private *priv) |
175 | { | 170 | { |
176 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | 171 | tse_set_bit(priv->tx_dma_csr, sgdma_csroffs(control), |
177 | tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); | 172 | SGDMA_CTRLREG_CLRINT); |
178 | } | 173 | } |
179 | 174 | ||
180 | /* transmits buffer through SGDMA. Returns number of buffers | 175 | /* transmits buffer through SGDMA. Returns number of buffers |
@@ -184,12 +179,11 @@ void sgdma_clear_txirq(struct altera_tse_private *priv) | |||
184 | */ | 179 | */ |
185 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) | 180 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) |
186 | { | 181 | { |
187 | int pktstx = 0; | 182 | struct sgdma_descrip __iomem *descbase = |
188 | struct sgdma_descrip *descbase = | 183 | (struct sgdma_descrip __iomem *)priv->tx_dma_desc; |
189 | (struct sgdma_descrip *)priv->tx_dma_desc; | ||
190 | 184 | ||
191 | struct sgdma_descrip *cdesc = &descbase[0]; | 185 | struct sgdma_descrip __iomem *cdesc = &descbase[0]; |
192 | struct sgdma_descrip *ndesc = &descbase[1]; | 186 | struct sgdma_descrip __iomem *ndesc = &descbase[1]; |
193 | 187 | ||
194 | /* wait 'til the tx sgdma is ready for the next transmit request */ | 188 | /* wait 'til the tx sgdma is ready for the next transmit request */ |
195 | if (sgdma_txbusy(priv)) | 189 | if (sgdma_txbusy(priv)) |
@@ -205,7 +199,7 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) | |||
205 | 0, /* read fixed */ | 199 | 0, /* read fixed */ |
206 | SGDMA_CONTROL_WR_FIXED); /* Generate SOP */ | 200 | SGDMA_CONTROL_WR_FIXED); /* Generate SOP */ |
207 | 201 | ||
208 | pktstx = sgdma_async_write(priv, cdesc); | 202 | sgdma_async_write(priv, cdesc); |
209 | 203 | ||
210 | /* enqueue the request to the pending transmit queue */ | 204 | /* enqueue the request to the pending transmit queue */ |
211 | queue_tx(priv, buffer); | 205 | queue_tx(priv, buffer); |
@@ -219,10 +213,10 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) | |||
219 | u32 sgdma_tx_completions(struct altera_tse_private *priv) | 213 | u32 sgdma_tx_completions(struct altera_tse_private *priv) |
220 | { | 214 | { |
221 | u32 ready = 0; | 215 | u32 ready = 0; |
222 | struct sgdma_descrip *desc = (struct sgdma_descrip *)priv->tx_dma_desc; | ||
223 | 216 | ||
224 | if (!sgdma_txbusy(priv) && | 217 | if (!sgdma_txbusy(priv) && |
225 | ((desc->control & SGDMA_CONTROL_HW_OWNED) == 0) && | 218 | ((csrrd8(priv->tx_dma_desc, sgdma_descroffs(control)) |
219 | & SGDMA_CONTROL_HW_OWNED) == 0) && | ||
226 | (dequeue_tx(priv))) { | 220 | (dequeue_tx(priv))) { |
227 | ready = 1; | 221 | ready = 1; |
228 | } | 222 | } |
@@ -246,32 +240,31 @@ void sgdma_add_rx_desc(struct altera_tse_private *priv, | |||
246 | */ | 240 | */ |
247 | u32 sgdma_rx_status(struct altera_tse_private *priv) | 241 | u32 sgdma_rx_status(struct altera_tse_private *priv) |
248 | { | 242 | { |
249 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 243 | struct sgdma_descrip __iomem *base = |
250 | struct sgdma_descrip *base = (struct sgdma_descrip *)priv->rx_dma_desc; | 244 | (struct sgdma_descrip __iomem *)priv->rx_dma_desc; |
251 | struct sgdma_descrip *desc = NULL; | 245 | struct sgdma_descrip __iomem *desc = NULL; |
252 | int pktsrx; | ||
253 | unsigned int rxstatus = 0; | ||
254 | unsigned int pktlength = 0; | ||
255 | unsigned int pktstatus = 0; | ||
256 | struct tse_buffer *rxbuffer = NULL; | 246 | struct tse_buffer *rxbuffer = NULL; |
247 | unsigned int rxstatus = 0; | ||
257 | 248 | ||
258 | u32 sts = ioread32(&csr->status); | 249 | u32 sts = csrrd32(priv->rx_dma_csr, sgdma_csroffs(status)); |
259 | 250 | ||
260 | desc = &base[0]; | 251 | desc = &base[0]; |
261 | if (sts & SGDMA_STSREG_EOP) { | 252 | if (sts & SGDMA_STSREG_EOP) { |
253 | unsigned int pktlength = 0; | ||
254 | unsigned int pktstatus = 0; | ||
262 | dma_sync_single_for_cpu(priv->device, | 255 | dma_sync_single_for_cpu(priv->device, |
263 | priv->rxdescphys, | 256 | priv->rxdescphys, |
264 | priv->sgdmadesclen, | 257 | priv->sgdmadesclen, |
265 | DMA_FROM_DEVICE); | 258 | DMA_FROM_DEVICE); |
266 | 259 | ||
267 | pktlength = desc->bytes_xferred; | 260 | pktlength = csrrd16(desc, sgdma_descroffs(bytes_xferred)); |
268 | pktstatus = desc->status & 0x3f; | 261 | pktstatus = csrrd8(desc, sgdma_descroffs(status)); |
269 | rxstatus = pktstatus; | 262 | rxstatus = pktstatus & ~SGDMA_STATUS_EOP; |
270 | rxstatus = rxstatus << 16; | 263 | rxstatus = rxstatus << 16; |
271 | rxstatus |= (pktlength & 0xffff); | 264 | rxstatus |= (pktlength & 0xffff); |
272 | 265 | ||
273 | if (rxstatus) { | 266 | if (rxstatus) { |
274 | desc->status = 0; | 267 | csrwr8(0, desc, sgdma_descroffs(status)); |
275 | 268 | ||
276 | rxbuffer = dequeue_rx(priv); | 269 | rxbuffer = dequeue_rx(priv); |
277 | if (rxbuffer == NULL) | 270 | if (rxbuffer == NULL) |
@@ -279,12 +272,12 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) | |||
279 | "sgdma rx and rx queue empty!\n"); | 272 | "sgdma rx and rx queue empty!\n"); |
280 | 273 | ||
281 | /* Clear control */ | 274 | /* Clear control */ |
282 | iowrite32(0, &csr->control); | 275 | csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control)); |
283 | /* clear status */ | 276 | /* clear status */ |
284 | iowrite32(0xf, &csr->status); | 277 | csrwr32(0xf, priv->rx_dma_csr, sgdma_csroffs(status)); |
285 | 278 | ||
286 | /* kick the rx sgdma after reaping this descriptor */ | 279 | /* kick the rx sgdma after reaping this descriptor */ |
287 | pktsrx = sgdma_async_read(priv); | 280 | sgdma_async_read(priv); |
288 | 281 | ||
289 | } else { | 282 | } else { |
290 | /* If the SGDMA indicated an end of packet on recv, | 283 | /* If the SGDMA indicated an end of packet on recv, |
@@ -298,10 +291,11 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) | |||
298 | */ | 291 | */ |
299 | netdev_err(priv->dev, | 292 | netdev_err(priv->dev, |
300 | "SGDMA RX Error Info: %x, %x, %x\n", | 293 | "SGDMA RX Error Info: %x, %x, %x\n", |
301 | sts, desc->status, rxstatus); | 294 | sts, csrrd8(desc, sgdma_descroffs(status)), |
295 | rxstatus); | ||
302 | } | 296 | } |
303 | } else if (sts == 0) { | 297 | } else if (sts == 0) { |
304 | pktsrx = sgdma_async_read(priv); | 298 | sgdma_async_read(priv); |
305 | } | 299 | } |
306 | 300 | ||
307 | return rxstatus; | 301 | return rxstatus; |
@@ -309,8 +303,8 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) | |||
309 | 303 | ||
310 | 304 | ||
311 | /* Private functions */ | 305 | /* Private functions */ |
312 | static void sgdma_setup_descrip(struct sgdma_descrip *desc, | 306 | static void sgdma_setup_descrip(struct sgdma_descrip __iomem *desc, |
313 | struct sgdma_descrip *ndesc, | 307 | struct sgdma_descrip __iomem *ndesc, |
314 | dma_addr_t ndesc_phys, | 308 | dma_addr_t ndesc_phys, |
315 | dma_addr_t raddr, | 309 | dma_addr_t raddr, |
316 | dma_addr_t waddr, | 310 | dma_addr_t waddr, |
@@ -320,27 +314,30 @@ static void sgdma_setup_descrip(struct sgdma_descrip *desc, | |||
320 | int wfixed) | 314 | int wfixed) |
321 | { | 315 | { |
322 | /* Clear the next descriptor as not owned by hardware */ | 316 | /* Clear the next descriptor as not owned by hardware */ |
323 | u32 ctrl = ndesc->control; | 317 | |
318 | u32 ctrl = csrrd8(ndesc, sgdma_descroffs(control)); | ||
324 | ctrl &= ~SGDMA_CONTROL_HW_OWNED; | 319 | ctrl &= ~SGDMA_CONTROL_HW_OWNED; |
325 | ndesc->control = ctrl; | 320 | csrwr8(ctrl, ndesc, sgdma_descroffs(control)); |
326 | 321 | ||
327 | ctrl = 0; | ||
328 | ctrl = SGDMA_CONTROL_HW_OWNED; | 322 | ctrl = SGDMA_CONTROL_HW_OWNED; |
329 | ctrl |= generate_eop; | 323 | ctrl |= generate_eop; |
330 | ctrl |= rfixed; | 324 | ctrl |= rfixed; |
331 | ctrl |= wfixed; | 325 | ctrl |= wfixed; |
332 | 326 | ||
333 | /* Channel is implicitly zero, initialized to 0 by default */ | 327 | /* Channel is implicitly zero, initialized to 0 by default */ |
334 | 328 | csrwr32(lower_32_bits(raddr), desc, sgdma_descroffs(raddr)); | |
335 | desc->raddr = raddr; | 329 | csrwr32(lower_32_bits(waddr), desc, sgdma_descroffs(waddr)); |
336 | desc->waddr = waddr; | 330 | |
337 | desc->next = lower_32_bits(ndesc_phys); | 331 | csrwr32(0, desc, sgdma_descroffs(pad1)); |
338 | desc->control = ctrl; | 332 | csrwr32(0, desc, sgdma_descroffs(pad2)); |
339 | desc->status = 0; | 333 | csrwr32(lower_32_bits(ndesc_phys), desc, sgdma_descroffs(next)); |
340 | desc->rburst = 0; | 334 | |
341 | desc->wburst = 0; | 335 | csrwr8(ctrl, desc, sgdma_descroffs(control)); |
342 | desc->bytes = length; | 336 | csrwr8(0, desc, sgdma_descroffs(status)); |
343 | desc->bytes_xferred = 0; | 337 | csrwr8(0, desc, sgdma_descroffs(wburst)); |
338 | csrwr8(0, desc, sgdma_descroffs(rburst)); | ||
339 | csrwr16(length, desc, sgdma_descroffs(bytes)); | ||
340 | csrwr16(0, desc, sgdma_descroffs(bytes_xferred)); | ||
344 | } | 341 | } |
345 | 342 | ||
346 | /* If hardware is busy, don't restart async read. | 343 | /* If hardware is busy, don't restart async read. |
@@ -351,12 +348,11 @@ static void sgdma_setup_descrip(struct sgdma_descrip *desc, | |||
351 | */ | 348 | */ |
352 | static int sgdma_async_read(struct altera_tse_private *priv) | 349 | static int sgdma_async_read(struct altera_tse_private *priv) |
353 | { | 350 | { |
354 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 351 | struct sgdma_descrip __iomem *descbase = |
355 | struct sgdma_descrip *descbase = | 352 | (struct sgdma_descrip __iomem *)priv->rx_dma_desc; |
356 | (struct sgdma_descrip *)priv->rx_dma_desc; | ||
357 | 353 | ||
358 | struct sgdma_descrip *cdesc = &descbase[0]; | 354 | struct sgdma_descrip __iomem *cdesc = &descbase[0]; |
359 | struct sgdma_descrip *ndesc = &descbase[1]; | 355 | struct sgdma_descrip __iomem *ndesc = &descbase[1]; |
360 | 356 | ||
361 | struct tse_buffer *rxbuffer = NULL; | 357 | struct tse_buffer *rxbuffer = NULL; |
362 | 358 | ||
@@ -382,11 +378,13 @@ static int sgdma_async_read(struct altera_tse_private *priv) | |||
382 | priv->sgdmadesclen, | 378 | priv->sgdmadesclen, |
383 | DMA_TO_DEVICE); | 379 | DMA_TO_DEVICE); |
384 | 380 | ||
385 | iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), | 381 | csrwr32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), |
386 | &csr->next_descrip); | 382 | priv->rx_dma_csr, |
383 | sgdma_csroffs(next_descrip)); | ||
387 | 384 | ||
388 | iowrite32((priv->rxctrlreg | SGDMA_CTRLREG_START), | 385 | csrwr32((priv->rxctrlreg | SGDMA_CTRLREG_START), |
389 | &csr->control); | 386 | priv->rx_dma_csr, |
387 | sgdma_csroffs(control)); | ||
390 | 388 | ||
391 | return 1; | 389 | return 1; |
392 | } | 390 | } |
@@ -395,32 +393,32 @@ static int sgdma_async_read(struct altera_tse_private *priv) | |||
395 | } | 393 | } |
396 | 394 | ||
397 | static int sgdma_async_write(struct altera_tse_private *priv, | 395 | static int sgdma_async_write(struct altera_tse_private *priv, |
398 | struct sgdma_descrip *desc) | 396 | struct sgdma_descrip __iomem *desc) |
399 | { | 397 | { |
400 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | ||
401 | |||
402 | if (sgdma_txbusy(priv)) | 398 | if (sgdma_txbusy(priv)) |
403 | return 0; | 399 | return 0; |
404 | 400 | ||
405 | /* clear control and status */ | 401 | /* clear control and status */ |
406 | iowrite32(0, &csr->control); | 402 | csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control)); |
407 | iowrite32(0x1f, &csr->status); | 403 | csrwr32(0x1f, priv->tx_dma_csr, sgdma_csroffs(status)); |
408 | 404 | ||
409 | dma_sync_single_for_device(priv->device, priv->txdescphys, | 405 | dma_sync_single_for_device(priv->device, priv->txdescphys, |
410 | priv->sgdmadesclen, DMA_TO_DEVICE); | 406 | priv->sgdmadesclen, DMA_TO_DEVICE); |
411 | 407 | ||
412 | iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), | 408 | csrwr32(lower_32_bits(sgdma_txphysaddr(priv, desc)), |
413 | &csr->next_descrip); | 409 | priv->tx_dma_csr, |
410 | sgdma_csroffs(next_descrip)); | ||
414 | 411 | ||
415 | iowrite32((priv->txctrlreg | SGDMA_CTRLREG_START), | 412 | csrwr32((priv->txctrlreg | SGDMA_CTRLREG_START), |
416 | &csr->control); | 413 | priv->tx_dma_csr, |
414 | sgdma_csroffs(control)); | ||
417 | 415 | ||
418 | return 1; | 416 | return 1; |
419 | } | 417 | } |
420 | 418 | ||
421 | static dma_addr_t | 419 | static dma_addr_t |
422 | sgdma_txphysaddr(struct altera_tse_private *priv, | 420 | sgdma_txphysaddr(struct altera_tse_private *priv, |
423 | struct sgdma_descrip *desc) | 421 | struct sgdma_descrip __iomem *desc) |
424 | { | 422 | { |
425 | dma_addr_t paddr = priv->txdescmem_busaddr; | 423 | dma_addr_t paddr = priv->txdescmem_busaddr; |
426 | uintptr_t offs = (uintptr_t)desc - (uintptr_t)priv->tx_dma_desc; | 424 | uintptr_t offs = (uintptr_t)desc - (uintptr_t)priv->tx_dma_desc; |
@@ -429,7 +427,7 @@ sgdma_txphysaddr(struct altera_tse_private *priv, | |||
429 | 427 | ||
430 | static dma_addr_t | 428 | static dma_addr_t |
431 | sgdma_rxphysaddr(struct altera_tse_private *priv, | 429 | sgdma_rxphysaddr(struct altera_tse_private *priv, |
432 | struct sgdma_descrip *desc) | 430 | struct sgdma_descrip __iomem *desc) |
433 | { | 431 | { |
434 | dma_addr_t paddr = priv->rxdescmem_busaddr; | 432 | dma_addr_t paddr = priv->rxdescmem_busaddr; |
435 | uintptr_t offs = (uintptr_t)desc - (uintptr_t)priv->rx_dma_desc; | 433 | uintptr_t offs = (uintptr_t)desc - (uintptr_t)priv->rx_dma_desc; |
@@ -518,8 +516,8 @@ queue_rx_peekhead(struct altera_tse_private *priv) | |||
518 | */ | 516 | */ |
519 | static int sgdma_rxbusy(struct altera_tse_private *priv) | 517 | static int sgdma_rxbusy(struct altera_tse_private *priv) |
520 | { | 518 | { |
521 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | 519 | return csrrd32(priv->rx_dma_csr, sgdma_csroffs(status)) |
522 | return ioread32(&csr->status) & SGDMA_STSREG_BUSY; | 520 | & SGDMA_STSREG_BUSY; |
523 | } | 521 | } |
524 | 522 | ||
525 | /* waits for the tx sgdma to finish it's current operation, returns 0 | 523 | /* waits for the tx sgdma to finish it's current operation, returns 0 |
@@ -528,13 +526,14 @@ static int sgdma_rxbusy(struct altera_tse_private *priv) | |||
528 | static int sgdma_txbusy(struct altera_tse_private *priv) | 526 | static int sgdma_txbusy(struct altera_tse_private *priv) |
529 | { | 527 | { |
530 | int delay = 0; | 528 | int delay = 0; |
531 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | ||
532 | 529 | ||
533 | /* if DMA is busy, wait for current transactino to finish */ | 530 | /* if DMA is busy, wait for current transactino to finish */ |
534 | while ((ioread32(&csr->status) & SGDMA_STSREG_BUSY) && (delay++ < 100)) | 531 | while ((csrrd32(priv->tx_dma_csr, sgdma_csroffs(status)) |
532 | & SGDMA_STSREG_BUSY) && (delay++ < 100)) | ||
535 | udelay(1); | 533 | udelay(1); |
536 | 534 | ||
537 | if (ioread32(&csr->status) & SGDMA_STSREG_BUSY) { | 535 | if (csrrd32(priv->tx_dma_csr, sgdma_csroffs(status)) |
536 | & SGDMA_STSREG_BUSY) { | ||
538 | netdev_err(priv->dev, "timeout waiting for tx dma\n"); | 537 | netdev_err(priv->dev, "timeout waiting for tx dma\n"); |
539 | return 1; | 538 | return 1; |
540 | } | 539 | } |
diff --git a/drivers/net/ethernet/altera/altera_sgdmahw.h b/drivers/net/ethernet/altera/altera_sgdmahw.h index ba3334f35383..85bc33b218d9 100644 --- a/drivers/net/ethernet/altera/altera_sgdmahw.h +++ b/drivers/net/ethernet/altera/altera_sgdmahw.h | |||
@@ -19,16 +19,16 @@ | |||
19 | 19 | ||
20 | /* SGDMA descriptor structure */ | 20 | /* SGDMA descriptor structure */ |
21 | struct sgdma_descrip { | 21 | struct sgdma_descrip { |
22 | unsigned int raddr; /* address of data to be read */ | 22 | u32 raddr; /* address of data to be read */ |
23 | unsigned int pad1; | 23 | u32 pad1; |
24 | unsigned int waddr; | 24 | u32 waddr; |
25 | unsigned int pad2; | 25 | u32 pad2; |
26 | unsigned int next; | 26 | u32 next; |
27 | unsigned int pad3; | 27 | u32 pad3; |
28 | unsigned short bytes; | 28 | u16 bytes; |
29 | unsigned char rburst; | 29 | u8 rburst; |
30 | unsigned char wburst; | 30 | u8 wburst; |
31 | unsigned short bytes_xferred; /* 16 bits, bytes xferred */ | 31 | u16 bytes_xferred; /* 16 bits, bytes xferred */ |
32 | 32 | ||
33 | /* bit 0: error | 33 | /* bit 0: error |
34 | * bit 1: length error | 34 | * bit 1: length error |
@@ -39,7 +39,7 @@ struct sgdma_descrip { | |||
39 | * bit 6: reserved | 39 | * bit 6: reserved |
40 | * bit 7: status eop for recv case | 40 | * bit 7: status eop for recv case |
41 | */ | 41 | */ |
42 | unsigned char status; | 42 | u8 status; |
43 | 43 | ||
44 | /* bit 0: eop | 44 | /* bit 0: eop |
45 | * bit 1: read_fixed | 45 | * bit 1: read_fixed |
@@ -47,7 +47,7 @@ struct sgdma_descrip { | |||
47 | * bits 3,4,5,6: Channel (always 0) | 47 | * bits 3,4,5,6: Channel (always 0) |
48 | * bit 7: hardware owned | 48 | * bit 7: hardware owned |
49 | */ | 49 | */ |
50 | unsigned char control; | 50 | u8 control; |
51 | } __packed; | 51 | } __packed; |
52 | 52 | ||
53 | 53 | ||
@@ -101,6 +101,8 @@ struct sgdma_csr { | |||
101 | u32 pad3[3]; | 101 | u32 pad3[3]; |
102 | }; | 102 | }; |
103 | 103 | ||
104 | #define sgdma_csroffs(a) (offsetof(struct sgdma_csr, a)) | ||
105 | #define sgdma_descroffs(a) (offsetof(struct sgdma_descrip, a)) | ||
104 | 106 | ||
105 | #define SGDMA_STSREG_ERR BIT(0) /* Error */ | 107 | #define SGDMA_STSREG_ERR BIT(0) /* Error */ |
106 | #define SGDMA_STSREG_EOP BIT(1) /* EOP */ | 108 | #define SGDMA_STSREG_EOP BIT(1) /* EOP */ |
diff --git a/drivers/net/ethernet/altera/altera_tse.h b/drivers/net/ethernet/altera/altera_tse.h index 465c4aabebbd..2adb24d4523c 100644 --- a/drivers/net/ethernet/altera/altera_tse.h +++ b/drivers/net/ethernet/altera/altera_tse.h | |||
@@ -357,6 +357,8 @@ struct altera_tse_mac { | |||
357 | u32 reserved5[42]; | 357 | u32 reserved5[42]; |
358 | }; | 358 | }; |
359 | 359 | ||
360 | #define tse_csroffs(a) (offsetof(struct altera_tse_mac, a)) | ||
361 | |||
360 | /* Transmit and Receive Command Registers Bit Definitions | 362 | /* Transmit and Receive Command Registers Bit Definitions |
361 | */ | 363 | */ |
362 | #define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC BIT(17) | 364 | #define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC BIT(17) |
@@ -487,4 +489,49 @@ struct altera_tse_private { | |||
487 | */ | 489 | */ |
488 | void altera_tse_set_ethtool_ops(struct net_device *); | 490 | void altera_tse_set_ethtool_ops(struct net_device *); |
489 | 491 | ||
492 | static inline | ||
493 | u32 csrrd32(void __iomem *mac, size_t offs) | ||
494 | { | ||
495 | void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | ||
496 | return readl(paddr); | ||
497 | } | ||
498 | |||
499 | static inline | ||
500 | u16 csrrd16(void __iomem *mac, size_t offs) | ||
501 | { | ||
502 | void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | ||
503 | return readw(paddr); | ||
504 | } | ||
505 | |||
506 | static inline | ||
507 | u8 csrrd8(void __iomem *mac, size_t offs) | ||
508 | { | ||
509 | void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | ||
510 | return readb(paddr); | ||
511 | } | ||
512 | |||
513 | static inline | ||
514 | void csrwr32(u32 val, void __iomem *mac, size_t offs) | ||
515 | { | ||
516 | void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | ||
517 | |||
518 | writel(val, paddr); | ||
519 | } | ||
520 | |||
521 | static inline | ||
522 | void csrwr16(u16 val, void __iomem *mac, size_t offs) | ||
523 | { | ||
524 | void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | ||
525 | |||
526 | writew(val, paddr); | ||
527 | } | ||
528 | |||
529 | static inline | ||
530 | void csrwr8(u8 val, void __iomem *mac, size_t offs) | ||
531 | { | ||
532 | void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | ||
533 | |||
534 | writeb(val, paddr); | ||
535 | } | ||
536 | |||
490 | #endif /* __ALTERA_TSE_H__ */ | 537 | #endif /* __ALTERA_TSE_H__ */ |
diff --git a/drivers/net/ethernet/altera/altera_tse_ethtool.c b/drivers/net/ethernet/altera/altera_tse_ethtool.c index 76133caffa78..54c25eff7952 100644 --- a/drivers/net/ethernet/altera/altera_tse_ethtool.c +++ b/drivers/net/ethernet/altera/altera_tse_ethtool.c | |||
@@ -96,54 +96,89 @@ static void tse_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, | |||
96 | u64 *buf) | 96 | u64 *buf) |
97 | { | 97 | { |
98 | struct altera_tse_private *priv = netdev_priv(dev); | 98 | struct altera_tse_private *priv = netdev_priv(dev); |
99 | struct altera_tse_mac *mac = priv->mac_dev; | ||
100 | u64 ext; | 99 | u64 ext; |
101 | 100 | ||
102 | buf[0] = ioread32(&mac->frames_transmitted_ok); | 101 | buf[0] = csrrd32(priv->mac_dev, |
103 | buf[1] = ioread32(&mac->frames_received_ok); | 102 | tse_csroffs(frames_transmitted_ok)); |
104 | buf[2] = ioread32(&mac->frames_check_sequence_errors); | 103 | buf[1] = csrrd32(priv->mac_dev, |
105 | buf[3] = ioread32(&mac->alignment_errors); | 104 | tse_csroffs(frames_received_ok)); |
105 | buf[2] = csrrd32(priv->mac_dev, | ||
106 | tse_csroffs(frames_check_sequence_errors)); | ||
107 | buf[3] = csrrd32(priv->mac_dev, | ||
108 | tse_csroffs(alignment_errors)); | ||
106 | 109 | ||
107 | /* Extended aOctetsTransmittedOK counter */ | 110 | /* Extended aOctetsTransmittedOK counter */ |
108 | ext = (u64) ioread32(&mac->msb_octets_transmitted_ok) << 32; | 111 | ext = (u64) csrrd32(priv->mac_dev, |
109 | ext |= ioread32(&mac->octets_transmitted_ok); | 112 | tse_csroffs(msb_octets_transmitted_ok)) << 32; |
113 | |||
114 | ext |= csrrd32(priv->mac_dev, | ||
115 | tse_csroffs(octets_transmitted_ok)); | ||
110 | buf[4] = ext; | 116 | buf[4] = ext; |
111 | 117 | ||
112 | /* Extended aOctetsReceivedOK counter */ | 118 | /* Extended aOctetsReceivedOK counter */ |
113 | ext = (u64) ioread32(&mac->msb_octets_received_ok) << 32; | 119 | ext = (u64) csrrd32(priv->mac_dev, |
114 | ext |= ioread32(&mac->octets_received_ok); | 120 | tse_csroffs(msb_octets_received_ok)) << 32; |
121 | |||
122 | ext |= csrrd32(priv->mac_dev, | ||
123 | tse_csroffs(octets_received_ok)); | ||
115 | buf[5] = ext; | 124 | buf[5] = ext; |
116 | 125 | ||
117 | buf[6] = ioread32(&mac->tx_pause_mac_ctrl_frames); | 126 | buf[6] = csrrd32(priv->mac_dev, |
118 | buf[7] = ioread32(&mac->rx_pause_mac_ctrl_frames); | 127 | tse_csroffs(tx_pause_mac_ctrl_frames)); |
119 | buf[8] = ioread32(&mac->if_in_errors); | 128 | buf[7] = csrrd32(priv->mac_dev, |
120 | buf[9] = ioread32(&mac->if_out_errors); | 129 | tse_csroffs(rx_pause_mac_ctrl_frames)); |
121 | buf[10] = ioread32(&mac->if_in_ucast_pkts); | 130 | buf[8] = csrrd32(priv->mac_dev, |
122 | buf[11] = ioread32(&mac->if_in_multicast_pkts); | 131 | tse_csroffs(if_in_errors)); |
123 | buf[12] = ioread32(&mac->if_in_broadcast_pkts); | 132 | buf[9] = csrrd32(priv->mac_dev, |
124 | buf[13] = ioread32(&mac->if_out_discards); | 133 | tse_csroffs(if_out_errors)); |
125 | buf[14] = ioread32(&mac->if_out_ucast_pkts); | 134 | buf[10] = csrrd32(priv->mac_dev, |
126 | buf[15] = ioread32(&mac->if_out_multicast_pkts); | 135 | tse_csroffs(if_in_ucast_pkts)); |
127 | buf[16] = ioread32(&mac->if_out_broadcast_pkts); | 136 | buf[11] = csrrd32(priv->mac_dev, |
128 | buf[17] = ioread32(&mac->ether_stats_drop_events); | 137 | tse_csroffs(if_in_multicast_pkts)); |
138 | buf[12] = csrrd32(priv->mac_dev, | ||
139 | tse_csroffs(if_in_broadcast_pkts)); | ||
140 | buf[13] = csrrd32(priv->mac_dev, | ||
141 | tse_csroffs(if_out_discards)); | ||
142 | buf[14] = csrrd32(priv->mac_dev, | ||
143 | tse_csroffs(if_out_ucast_pkts)); | ||
144 | buf[15] = csrrd32(priv->mac_dev, | ||
145 | tse_csroffs(if_out_multicast_pkts)); | ||
146 | buf[16] = csrrd32(priv->mac_dev, | ||
147 | tse_csroffs(if_out_broadcast_pkts)); | ||
148 | buf[17] = csrrd32(priv->mac_dev, | ||
149 | tse_csroffs(ether_stats_drop_events)); | ||
129 | 150 | ||
130 | /* Extended etherStatsOctets counter */ | 151 | /* Extended etherStatsOctets counter */ |
131 | ext = (u64) ioread32(&mac->msb_ether_stats_octets) << 32; | 152 | ext = (u64) csrrd32(priv->mac_dev, |
132 | ext |= ioread32(&mac->ether_stats_octets); | 153 | tse_csroffs(msb_ether_stats_octets)) << 32; |
154 | ext |= csrrd32(priv->mac_dev, | ||
155 | tse_csroffs(ether_stats_octets)); | ||
133 | buf[18] = ext; | 156 | buf[18] = ext; |
134 | 157 | ||
135 | buf[19] = ioread32(&mac->ether_stats_pkts); | 158 | buf[19] = csrrd32(priv->mac_dev, |
136 | buf[20] = ioread32(&mac->ether_stats_undersize_pkts); | 159 | tse_csroffs(ether_stats_pkts)); |
137 | buf[21] = ioread32(&mac->ether_stats_oversize_pkts); | 160 | buf[20] = csrrd32(priv->mac_dev, |
138 | buf[22] = ioread32(&mac->ether_stats_pkts_64_octets); | 161 | tse_csroffs(ether_stats_undersize_pkts)); |
139 | buf[23] = ioread32(&mac->ether_stats_pkts_65to127_octets); | 162 | buf[21] = csrrd32(priv->mac_dev, |
140 | buf[24] = ioread32(&mac->ether_stats_pkts_128to255_octets); | 163 | tse_csroffs(ether_stats_oversize_pkts)); |
141 | buf[25] = ioread32(&mac->ether_stats_pkts_256to511_octets); | 164 | buf[22] = csrrd32(priv->mac_dev, |
142 | buf[26] = ioread32(&mac->ether_stats_pkts_512to1023_octets); | 165 | tse_csroffs(ether_stats_pkts_64_octets)); |
143 | buf[27] = ioread32(&mac->ether_stats_pkts_1024to1518_octets); | 166 | buf[23] = csrrd32(priv->mac_dev, |
144 | buf[28] = ioread32(&mac->ether_stats_pkts_1519tox_octets); | 167 | tse_csroffs(ether_stats_pkts_65to127_octets)); |
145 | buf[29] = ioread32(&mac->ether_stats_jabbers); | 168 | buf[24] = csrrd32(priv->mac_dev, |
146 | buf[30] = ioread32(&mac->ether_stats_fragments); | 169 | tse_csroffs(ether_stats_pkts_128to255_octets)); |
170 | buf[25] = csrrd32(priv->mac_dev, | ||
171 | tse_csroffs(ether_stats_pkts_256to511_octets)); | ||
172 | buf[26] = csrrd32(priv->mac_dev, | ||
173 | tse_csroffs(ether_stats_pkts_512to1023_octets)); | ||
174 | buf[27] = csrrd32(priv->mac_dev, | ||
175 | tse_csroffs(ether_stats_pkts_1024to1518_octets)); | ||
176 | buf[28] = csrrd32(priv->mac_dev, | ||
177 | tse_csroffs(ether_stats_pkts_1519tox_octets)); | ||
178 | buf[29] = csrrd32(priv->mac_dev, | ||
179 | tse_csroffs(ether_stats_jabbers)); | ||
180 | buf[30] = csrrd32(priv->mac_dev, | ||
181 | tse_csroffs(ether_stats_fragments)); | ||
147 | } | 182 | } |
148 | 183 | ||
149 | static int tse_sset_count(struct net_device *dev, int sset) | 184 | static int tse_sset_count(struct net_device *dev, int sset) |
@@ -178,7 +213,6 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
178 | { | 213 | { |
179 | int i; | 214 | int i; |
180 | struct altera_tse_private *priv = netdev_priv(dev); | 215 | struct altera_tse_private *priv = netdev_priv(dev); |
181 | u32 *tse_mac_regs = (u32 *)priv->mac_dev; | ||
182 | u32 *buf = regbuf; | 216 | u32 *buf = regbuf; |
183 | 217 | ||
184 | /* Set version to a known value, so ethtool knows | 218 | /* Set version to a known value, so ethtool knows |
@@ -196,7 +230,7 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
196 | regs->version = 1; | 230 | regs->version = 1; |
197 | 231 | ||
198 | for (i = 0; i < TSE_NUM_REGS; i++) | 232 | for (i = 0; i < TSE_NUM_REGS; i++) |
199 | buf[i] = ioread32(&tse_mac_regs[i]); | 233 | buf[i] = csrrd32(priv->mac_dev, i * 4); |
200 | } | 234 | } |
201 | 235 | ||
202 | static int tse_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 236 | static int tse_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c index e44a4aeb9701..7330681574d2 100644 --- a/drivers/net/ethernet/altera/altera_tse_main.c +++ b/drivers/net/ethernet/altera/altera_tse_main.c | |||
@@ -100,29 +100,30 @@ static inline u32 tse_tx_avail(struct altera_tse_private *priv) | |||
100 | */ | 100 | */ |
101 | static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum) | 101 | static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
102 | { | 102 | { |
103 | struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv; | 103 | struct net_device *ndev = bus->priv; |
104 | unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0; | 104 | struct altera_tse_private *priv = netdev_priv(ndev); |
105 | u32 data; | ||
106 | 105 | ||
107 | /* set MDIO address */ | 106 | /* set MDIO address */ |
108 | iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr); | 107 | csrwr32((mii_id & 0x1f), priv->mac_dev, |
108 | tse_csroffs(mdio_phy0_addr)); | ||
109 | 109 | ||
110 | /* get the data */ | 110 | /* get the data */ |
111 | data = ioread32(&mdio_regs[regnum]) & 0xffff; | 111 | return csrrd32(priv->mac_dev, |
112 | return data; | 112 | tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff; |
113 | } | 113 | } |
114 | 114 | ||
115 | static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum, | 115 | static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum, |
116 | u16 value) | 116 | u16 value) |
117 | { | 117 | { |
118 | struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv; | 118 | struct net_device *ndev = bus->priv; |
119 | unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0; | 119 | struct altera_tse_private *priv = netdev_priv(ndev); |
120 | 120 | ||
121 | /* set MDIO address */ | 121 | /* set MDIO address */ |
122 | iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr); | 122 | csrwr32((mii_id & 0x1f), priv->mac_dev, |
123 | tse_csroffs(mdio_phy0_addr)); | ||
123 | 124 | ||
124 | /* write the data */ | 125 | /* write the data */ |
125 | iowrite32((u32) value, &mdio_regs[regnum]); | 126 | csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4); |
126 | return 0; | 127 | return 0; |
127 | } | 128 | } |
128 | 129 | ||
@@ -168,7 +169,7 @@ static int altera_tse_mdio_create(struct net_device *dev, unsigned int id) | |||
168 | for (i = 0; i < PHY_MAX_ADDR; i++) | 169 | for (i = 0; i < PHY_MAX_ADDR; i++) |
169 | mdio->irq[i] = PHY_POLL; | 170 | mdio->irq[i] = PHY_POLL; |
170 | 171 | ||
171 | mdio->priv = priv->mac_dev; | 172 | mdio->priv = dev; |
172 | mdio->parent = priv->device; | 173 | mdio->parent = priv->device; |
173 | 174 | ||
174 | ret = of_mdiobus_register(mdio, mdio_node); | 175 | ret = of_mdiobus_register(mdio, mdio_node); |
@@ -563,7 +564,6 @@ static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
563 | unsigned int nopaged_len = skb_headlen(skb); | 564 | unsigned int nopaged_len = skb_headlen(skb); |
564 | enum netdev_tx ret = NETDEV_TX_OK; | 565 | enum netdev_tx ret = NETDEV_TX_OK; |
565 | dma_addr_t dma_addr; | 566 | dma_addr_t dma_addr; |
566 | int txcomplete = 0; | ||
567 | 567 | ||
568 | spin_lock_bh(&priv->tx_lock); | 568 | spin_lock_bh(&priv->tx_lock); |
569 | 569 | ||
@@ -599,7 +599,7 @@ static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
599 | dma_sync_single_for_device(priv->device, buffer->dma_addr, | 599 | dma_sync_single_for_device(priv->device, buffer->dma_addr, |
600 | buffer->len, DMA_TO_DEVICE); | 600 | buffer->len, DMA_TO_DEVICE); |
601 | 601 | ||
602 | txcomplete = priv->dmaops->tx_buffer(priv, buffer); | 602 | priv->dmaops->tx_buffer(priv, buffer); |
603 | 603 | ||
604 | skb_tx_timestamp(skb); | 604 | skb_tx_timestamp(skb); |
605 | 605 | ||
@@ -698,7 +698,6 @@ static struct phy_device *connect_local_phy(struct net_device *dev) | |||
698 | struct altera_tse_private *priv = netdev_priv(dev); | 698 | struct altera_tse_private *priv = netdev_priv(dev); |
699 | struct phy_device *phydev = NULL; | 699 | struct phy_device *phydev = NULL; |
700 | char phy_id_fmt[MII_BUS_ID_SIZE + 3]; | 700 | char phy_id_fmt[MII_BUS_ID_SIZE + 3]; |
701 | int ret; | ||
702 | 701 | ||
703 | if (priv->phy_addr != POLL_PHY) { | 702 | if (priv->phy_addr != POLL_PHY) { |
704 | snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, | 703 | snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, |
@@ -712,6 +711,7 @@ static struct phy_device *connect_local_phy(struct net_device *dev) | |||
712 | netdev_err(dev, "Could not attach to PHY\n"); | 711 | netdev_err(dev, "Could not attach to PHY\n"); |
713 | 712 | ||
714 | } else { | 713 | } else { |
714 | int ret; | ||
715 | phydev = phy_find_first(priv->mdio); | 715 | phydev = phy_find_first(priv->mdio); |
716 | if (phydev == NULL) { | 716 | if (phydev == NULL) { |
717 | netdev_err(dev, "No PHY found\n"); | 717 | netdev_err(dev, "No PHY found\n"); |
@@ -791,7 +791,6 @@ static int init_phy(struct net_device *dev) | |||
791 | 791 | ||
792 | static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) | 792 | static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) |
793 | { | 793 | { |
794 | struct altera_tse_mac *mac = priv->mac_dev; | ||
795 | u32 msb; | 794 | u32 msb; |
796 | u32 lsb; | 795 | u32 lsb; |
797 | 796 | ||
@@ -799,8 +798,8 @@ static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) | |||
799 | lsb = ((addr[5] << 8) | addr[4]) & 0xffff; | 798 | lsb = ((addr[5] << 8) | addr[4]) & 0xffff; |
800 | 799 | ||
801 | /* Set primary MAC address */ | 800 | /* Set primary MAC address */ |
802 | iowrite32(msb, &mac->mac_addr_0); | 801 | csrwr32(msb, priv->mac_dev, tse_csroffs(mac_addr_0)); |
803 | iowrite32(lsb, &mac->mac_addr_1); | 802 | csrwr32(lsb, priv->mac_dev, tse_csroffs(mac_addr_1)); |
804 | } | 803 | } |
805 | 804 | ||
806 | /* MAC software reset. | 805 | /* MAC software reset. |
@@ -811,26 +810,26 @@ static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) | |||
811 | */ | 810 | */ |
812 | static int reset_mac(struct altera_tse_private *priv) | 811 | static int reset_mac(struct altera_tse_private *priv) |
813 | { | 812 | { |
814 | void __iomem *cmd_cfg_reg = &priv->mac_dev->command_config; | ||
815 | int counter; | 813 | int counter; |
816 | u32 dat; | 814 | u32 dat; |
817 | 815 | ||
818 | dat = ioread32(cmd_cfg_reg); | 816 | dat = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
819 | dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); | 817 | dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); |
820 | dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET; | 818 | dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET; |
821 | iowrite32(dat, cmd_cfg_reg); | 819 | csrwr32(dat, priv->mac_dev, tse_csroffs(command_config)); |
822 | 820 | ||
823 | counter = 0; | 821 | counter = 0; |
824 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { | 822 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
825 | if (tse_bit_is_clear(cmd_cfg_reg, MAC_CMDCFG_SW_RESET)) | 823 | if (tse_bit_is_clear(priv->mac_dev, tse_csroffs(command_config), |
824 | MAC_CMDCFG_SW_RESET)) | ||
826 | break; | 825 | break; |
827 | udelay(1); | 826 | udelay(1); |
828 | } | 827 | } |
829 | 828 | ||
830 | if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { | 829 | if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
831 | dat = ioread32(cmd_cfg_reg); | 830 | dat = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
832 | dat &= ~MAC_CMDCFG_SW_RESET; | 831 | dat &= ~MAC_CMDCFG_SW_RESET; |
833 | iowrite32(dat, cmd_cfg_reg); | 832 | csrwr32(dat, priv->mac_dev, tse_csroffs(command_config)); |
834 | return -1; | 833 | return -1; |
835 | } | 834 | } |
836 | return 0; | 835 | return 0; |
@@ -840,41 +839,57 @@ static int reset_mac(struct altera_tse_private *priv) | |||
840 | */ | 839 | */ |
841 | static int init_mac(struct altera_tse_private *priv) | 840 | static int init_mac(struct altera_tse_private *priv) |
842 | { | 841 | { |
843 | struct altera_tse_mac *mac = priv->mac_dev; | ||
844 | unsigned int cmd = 0; | 842 | unsigned int cmd = 0; |
845 | u32 frm_length; | 843 | u32 frm_length; |
846 | 844 | ||
847 | /* Setup Rx FIFO */ | 845 | /* Setup Rx FIFO */ |
848 | iowrite32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY, | 846 | csrwr32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY, |
849 | &mac->rx_section_empty); | 847 | priv->mac_dev, tse_csroffs(rx_section_empty)); |
850 | iowrite32(ALTERA_TSE_RX_SECTION_FULL, &mac->rx_section_full); | 848 | |
851 | iowrite32(ALTERA_TSE_RX_ALMOST_EMPTY, &mac->rx_almost_empty); | 849 | csrwr32(ALTERA_TSE_RX_SECTION_FULL, priv->mac_dev, |
852 | iowrite32(ALTERA_TSE_RX_ALMOST_FULL, &mac->rx_almost_full); | 850 | tse_csroffs(rx_section_full)); |
851 | |||
852 | csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY, priv->mac_dev, | ||
853 | tse_csroffs(rx_almost_empty)); | ||
854 | |||
855 | csrwr32(ALTERA_TSE_RX_ALMOST_FULL, priv->mac_dev, | ||
856 | tse_csroffs(rx_almost_full)); | ||
853 | 857 | ||
854 | /* Setup Tx FIFO */ | 858 | /* Setup Tx FIFO */ |
855 | iowrite32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY, | 859 | csrwr32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY, |
856 | &mac->tx_section_empty); | 860 | priv->mac_dev, tse_csroffs(tx_section_empty)); |
857 | iowrite32(ALTERA_TSE_TX_SECTION_FULL, &mac->tx_section_full); | 861 | |
858 | iowrite32(ALTERA_TSE_TX_ALMOST_EMPTY, &mac->tx_almost_empty); | 862 | csrwr32(ALTERA_TSE_TX_SECTION_FULL, priv->mac_dev, |
859 | iowrite32(ALTERA_TSE_TX_ALMOST_FULL, &mac->tx_almost_full); | 863 | tse_csroffs(tx_section_full)); |
864 | |||
865 | csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY, priv->mac_dev, | ||
866 | tse_csroffs(tx_almost_empty)); | ||
867 | |||
868 | csrwr32(ALTERA_TSE_TX_ALMOST_FULL, priv->mac_dev, | ||
869 | tse_csroffs(tx_almost_full)); | ||
860 | 870 | ||
861 | /* MAC Address Configuration */ | 871 | /* MAC Address Configuration */ |
862 | tse_update_mac_addr(priv, priv->dev->dev_addr); | 872 | tse_update_mac_addr(priv, priv->dev->dev_addr); |
863 | 873 | ||
864 | /* MAC Function Configuration */ | 874 | /* MAC Function Configuration */ |
865 | frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN; | 875 | frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN; |
866 | iowrite32(frm_length, &mac->frm_length); | 876 | csrwr32(frm_length, priv->mac_dev, tse_csroffs(frm_length)); |
867 | iowrite32(ALTERA_TSE_TX_IPG_LENGTH, &mac->tx_ipg_length); | 877 | |
878 | csrwr32(ALTERA_TSE_TX_IPG_LENGTH, priv->mac_dev, | ||
879 | tse_csroffs(tx_ipg_length)); | ||
868 | 880 | ||
869 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit | 881 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit |
870 | * start address | 882 | * start address |
871 | */ | 883 | */ |
872 | tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); | 884 | tse_set_bit(priv->mac_dev, tse_csroffs(rx_cmd_stat), |
873 | tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | 885 | ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); |
874 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | 886 | |
887 | tse_clear_bit(priv->mac_dev, tse_csroffs(tx_cmd_stat), | ||
888 | ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | ||
889 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | ||
875 | 890 | ||
876 | /* Set the MAC options */ | 891 | /* Set the MAC options */ |
877 | cmd = ioread32(&mac->command_config); | 892 | cmd = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
878 | cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */ | 893 | cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */ |
879 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ | 894 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ |
880 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames | 895 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames |
@@ -889,9 +904,10 @@ static int init_mac(struct altera_tse_private *priv) | |||
889 | cmd &= ~MAC_CMDCFG_ETH_SPEED; | 904 | cmd &= ~MAC_CMDCFG_ETH_SPEED; |
890 | cmd &= ~MAC_CMDCFG_ENA_10; | 905 | cmd &= ~MAC_CMDCFG_ENA_10; |
891 | 906 | ||
892 | iowrite32(cmd, &mac->command_config); | 907 | csrwr32(cmd, priv->mac_dev, tse_csroffs(command_config)); |
893 | 908 | ||
894 | iowrite32(ALTERA_TSE_PAUSE_QUANTA, &mac->pause_quanta); | 909 | csrwr32(ALTERA_TSE_PAUSE_QUANTA, priv->mac_dev, |
910 | tse_csroffs(pause_quanta)); | ||
895 | 911 | ||
896 | if (netif_msg_hw(priv)) | 912 | if (netif_msg_hw(priv)) |
897 | dev_dbg(priv->device, | 913 | dev_dbg(priv->device, |
@@ -904,15 +920,14 @@ static int init_mac(struct altera_tse_private *priv) | |||
904 | */ | 920 | */ |
905 | static void tse_set_mac(struct altera_tse_private *priv, bool enable) | 921 | static void tse_set_mac(struct altera_tse_private *priv, bool enable) |
906 | { | 922 | { |
907 | struct altera_tse_mac *mac = priv->mac_dev; | 923 | u32 value = csrrd32(priv->mac_dev, tse_csroffs(command_config)); |
908 | u32 value = ioread32(&mac->command_config); | ||
909 | 924 | ||
910 | if (enable) | 925 | if (enable) |
911 | value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA; | 926 | value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA; |
912 | else | 927 | else |
913 | value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); | 928 | value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); |
914 | 929 | ||
915 | iowrite32(value, &mac->command_config); | 930 | csrwr32(value, priv->mac_dev, tse_csroffs(command_config)); |
916 | } | 931 | } |
917 | 932 | ||
918 | /* Change the MTU | 933 | /* Change the MTU |
@@ -942,13 +957,12 @@ static int tse_change_mtu(struct net_device *dev, int new_mtu) | |||
942 | static void altera_tse_set_mcfilter(struct net_device *dev) | 957 | static void altera_tse_set_mcfilter(struct net_device *dev) |
943 | { | 958 | { |
944 | struct altera_tse_private *priv = netdev_priv(dev); | 959 | struct altera_tse_private *priv = netdev_priv(dev); |
945 | struct altera_tse_mac *mac = priv->mac_dev; | ||
946 | int i; | 960 | int i; |
947 | struct netdev_hw_addr *ha; | 961 | struct netdev_hw_addr *ha; |
948 | 962 | ||
949 | /* clear the hash filter */ | 963 | /* clear the hash filter */ |
950 | for (i = 0; i < 64; i++) | 964 | for (i = 0; i < 64; i++) |
951 | iowrite32(0, &(mac->hash_table[i])); | 965 | csrwr32(0, priv->mac_dev, tse_csroffs(hash_table) + i * 4); |
952 | 966 | ||
953 | netdev_for_each_mc_addr(ha, dev) { | 967 | netdev_for_each_mc_addr(ha, dev) { |
954 | unsigned int hash = 0; | 968 | unsigned int hash = 0; |
@@ -964,7 +978,7 @@ static void altera_tse_set_mcfilter(struct net_device *dev) | |||
964 | 978 | ||
965 | hash = (hash << 1) | xor_bit; | 979 | hash = (hash << 1) | xor_bit; |
966 | } | 980 | } |
967 | iowrite32(1, &(mac->hash_table[hash])); | 981 | csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + hash * 4); |
968 | } | 982 | } |
969 | } | 983 | } |
970 | 984 | ||
@@ -972,12 +986,11 @@ static void altera_tse_set_mcfilter(struct net_device *dev) | |||
972 | static void altera_tse_set_mcfilterall(struct net_device *dev) | 986 | static void altera_tse_set_mcfilterall(struct net_device *dev) |
973 | { | 987 | { |
974 | struct altera_tse_private *priv = netdev_priv(dev); | 988 | struct altera_tse_private *priv = netdev_priv(dev); |
975 | struct altera_tse_mac *mac = priv->mac_dev; | ||
976 | int i; | 989 | int i; |
977 | 990 | ||
978 | /* set the hash filter */ | 991 | /* set the hash filter */ |
979 | for (i = 0; i < 64; i++) | 992 | for (i = 0; i < 64; i++) |
980 | iowrite32(1, &(mac->hash_table[i])); | 993 | csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + i * 4); |
981 | } | 994 | } |
982 | 995 | ||
983 | /* Set or clear the multicast filter for this adaptor | 996 | /* Set or clear the multicast filter for this adaptor |
@@ -985,12 +998,12 @@ static void altera_tse_set_mcfilterall(struct net_device *dev) | |||
985 | static void tse_set_rx_mode_hashfilter(struct net_device *dev) | 998 | static void tse_set_rx_mode_hashfilter(struct net_device *dev) |
986 | { | 999 | { |
987 | struct altera_tse_private *priv = netdev_priv(dev); | 1000 | struct altera_tse_private *priv = netdev_priv(dev); |
988 | struct altera_tse_mac *mac = priv->mac_dev; | ||
989 | 1001 | ||
990 | spin_lock(&priv->mac_cfg_lock); | 1002 | spin_lock(&priv->mac_cfg_lock); |
991 | 1003 | ||
992 | if (dev->flags & IFF_PROMISC) | 1004 | if (dev->flags & IFF_PROMISC) |
993 | tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | 1005 | tse_set_bit(priv->mac_dev, tse_csroffs(command_config), |
1006 | MAC_CMDCFG_PROMIS_EN); | ||
994 | 1007 | ||
995 | if (dev->flags & IFF_ALLMULTI) | 1008 | if (dev->flags & IFF_ALLMULTI) |
996 | altera_tse_set_mcfilterall(dev); | 1009 | altera_tse_set_mcfilterall(dev); |
@@ -1005,15 +1018,16 @@ static void tse_set_rx_mode_hashfilter(struct net_device *dev) | |||
1005 | static void tse_set_rx_mode(struct net_device *dev) | 1018 | static void tse_set_rx_mode(struct net_device *dev) |
1006 | { | 1019 | { |
1007 | struct altera_tse_private *priv = netdev_priv(dev); | 1020 | struct altera_tse_private *priv = netdev_priv(dev); |
1008 | struct altera_tse_mac *mac = priv->mac_dev; | ||
1009 | 1021 | ||
1010 | spin_lock(&priv->mac_cfg_lock); | 1022 | spin_lock(&priv->mac_cfg_lock); |
1011 | 1023 | ||
1012 | if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) || | 1024 | if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) || |
1013 | !netdev_mc_empty(dev) || !netdev_uc_empty(dev)) | 1025 | !netdev_mc_empty(dev) || !netdev_uc_empty(dev)) |
1014 | tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | 1026 | tse_set_bit(priv->mac_dev, tse_csroffs(command_config), |
1027 | MAC_CMDCFG_PROMIS_EN); | ||
1015 | else | 1028 | else |
1016 | tse_clear_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | 1029 | tse_clear_bit(priv->mac_dev, tse_csroffs(command_config), |
1030 | MAC_CMDCFG_PROMIS_EN); | ||
1017 | 1031 | ||
1018 | spin_unlock(&priv->mac_cfg_lock); | 1032 | spin_unlock(&priv->mac_cfg_lock); |
1019 | } | 1033 | } |
@@ -1362,6 +1376,11 @@ static int altera_tse_probe(struct platform_device *pdev) | |||
1362 | of_property_read_bool(pdev->dev.of_node, | 1376 | of_property_read_bool(pdev->dev.of_node, |
1363 | "altr,has-hash-multicast-filter"); | 1377 | "altr,has-hash-multicast-filter"); |
1364 | 1378 | ||
1379 | /* Set hash filter to not set for now until the | ||
1380 | * multicast filter receive issue is debugged | ||
1381 | */ | ||
1382 | priv->hash_filter = 0; | ||
1383 | |||
1365 | /* get supplemental address settings for this instance */ | 1384 | /* get supplemental address settings for this instance */ |
1366 | priv->added_unicast = | 1385 | priv->added_unicast = |
1367 | of_property_read_bool(pdev->dev.of_node, | 1386 | of_property_read_bool(pdev->dev.of_node, |
@@ -1493,7 +1512,7 @@ static int altera_tse_remove(struct platform_device *pdev) | |||
1493 | return 0; | 1512 | return 0; |
1494 | } | 1513 | } |
1495 | 1514 | ||
1496 | struct altera_dmaops altera_dtype_sgdma = { | 1515 | static const struct altera_dmaops altera_dtype_sgdma = { |
1497 | .altera_dtype = ALTERA_DTYPE_SGDMA, | 1516 | .altera_dtype = ALTERA_DTYPE_SGDMA, |
1498 | .dmamask = 32, | 1517 | .dmamask = 32, |
1499 | .reset_dma = sgdma_reset, | 1518 | .reset_dma = sgdma_reset, |
@@ -1512,7 +1531,7 @@ struct altera_dmaops altera_dtype_sgdma = { | |||
1512 | .start_rxdma = sgdma_start_rxdma, | 1531 | .start_rxdma = sgdma_start_rxdma, |
1513 | }; | 1532 | }; |
1514 | 1533 | ||
1515 | struct altera_dmaops altera_dtype_msgdma = { | 1534 | static const struct altera_dmaops altera_dtype_msgdma = { |
1516 | .altera_dtype = ALTERA_DTYPE_MSGDMA, | 1535 | .altera_dtype = ALTERA_DTYPE_MSGDMA, |
1517 | .dmamask = 64, | 1536 | .dmamask = 64, |
1518 | .reset_dma = msgdma_reset, | 1537 | .reset_dma = msgdma_reset, |
diff --git a/drivers/net/ethernet/altera/altera_utils.c b/drivers/net/ethernet/altera/altera_utils.c index 70fa13f486b2..d7eeb1713ad2 100644 --- a/drivers/net/ethernet/altera/altera_utils.c +++ b/drivers/net/ethernet/altera/altera_utils.c | |||
@@ -17,28 +17,28 @@ | |||
17 | #include "altera_tse.h" | 17 | #include "altera_tse.h" |
18 | #include "altera_utils.h" | 18 | #include "altera_utils.h" |
19 | 19 | ||
20 | void tse_set_bit(void __iomem *ioaddr, u32 bit_mask) | 20 | void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
21 | { | 21 | { |
22 | u32 value = ioread32(ioaddr); | 22 | u32 value = csrrd32(ioaddr, offs); |
23 | value |= bit_mask; | 23 | value |= bit_mask; |
24 | iowrite32(value, ioaddr); | 24 | csrwr32(value, ioaddr, offs); |
25 | } | 25 | } |
26 | 26 | ||
27 | void tse_clear_bit(void __iomem *ioaddr, u32 bit_mask) | 27 | void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
28 | { | 28 | { |
29 | u32 value = ioread32(ioaddr); | 29 | u32 value = csrrd32(ioaddr, offs); |
30 | value &= ~bit_mask; | 30 | value &= ~bit_mask; |
31 | iowrite32(value, ioaddr); | 31 | csrwr32(value, ioaddr, offs); |
32 | } | 32 | } |
33 | 33 | ||
34 | int tse_bit_is_set(void __iomem *ioaddr, u32 bit_mask) | 34 | int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
35 | { | 35 | { |
36 | u32 value = ioread32(ioaddr); | 36 | u32 value = csrrd32(ioaddr, offs); |
37 | return (value & bit_mask) ? 1 : 0; | 37 | return (value & bit_mask) ? 1 : 0; |
38 | } | 38 | } |
39 | 39 | ||
40 | int tse_bit_is_clear(void __iomem *ioaddr, u32 bit_mask) | 40 | int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask) |
41 | { | 41 | { |
42 | u32 value = ioread32(ioaddr); | 42 | u32 value = csrrd32(ioaddr, offs); |
43 | return (value & bit_mask) ? 0 : 1; | 43 | return (value & bit_mask) ? 0 : 1; |
44 | } | 44 | } |
diff --git a/drivers/net/ethernet/altera/altera_utils.h b/drivers/net/ethernet/altera/altera_utils.h index ce1db36d3583..baf100ccf587 100644 --- a/drivers/net/ethernet/altera/altera_utils.h +++ b/drivers/net/ethernet/altera/altera_utils.h | |||
@@ -19,9 +19,9 @@ | |||
19 | #ifndef __ALTERA_UTILS_H__ | 19 | #ifndef __ALTERA_UTILS_H__ |
20 | #define __ALTERA_UTILS_H__ | 20 | #define __ALTERA_UTILS_H__ |
21 | 21 | ||
22 | void tse_set_bit(void __iomem *ioaddr, u32 bit_mask); | 22 | void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); |
23 | void tse_clear_bit(void __iomem *ioaddr, u32 bit_mask); | 23 | void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); |
24 | int tse_bit_is_set(void __iomem *ioaddr, u32 bit_mask); | 24 | int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask); |
25 | int tse_bit_is_clear(void __iomem *ioaddr, u32 bit_mask); | 25 | int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask); |
26 | 26 | ||
27 | #endif /* __ALTERA_UTILS_H__*/ | 27 | #endif /* __ALTERA_UTILS_H__*/ |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index b260913db236..3b0d43154e67 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -10051,8 +10051,8 @@ static void bnx2x_prev_unload_close_mac(struct bnx2x *bp, | |||
10051 | #define BCM_5710_UNDI_FW_MF_MAJOR (0x07) | 10051 | #define BCM_5710_UNDI_FW_MF_MAJOR (0x07) |
10052 | #define BCM_5710_UNDI_FW_MF_MINOR (0x08) | 10052 | #define BCM_5710_UNDI_FW_MF_MINOR (0x08) |
10053 | #define BCM_5710_UNDI_FW_MF_VERS (0x05) | 10053 | #define BCM_5710_UNDI_FW_MF_VERS (0x05) |
10054 | #define BNX2X_PREV_UNDI_MF_PORT(p) (0x1a150c + ((p) << 4)) | 10054 | #define BNX2X_PREV_UNDI_MF_PORT(p) (BAR_TSTRORM_INTMEM + 0x150c + ((p) << 4)) |
10055 | #define BNX2X_PREV_UNDI_MF_FUNC(f) (0x1a184c + ((f) << 4)) | 10055 | #define BNX2X_PREV_UNDI_MF_FUNC(f) (BAR_TSTRORM_INTMEM + 0x184c + ((f) << 4)) |
10056 | static bool bnx2x_prev_unload_undi_fw_supports_mf(struct bnx2x *bp) | 10056 | static bool bnx2x_prev_unload_undi_fw_supports_mf(struct bnx2x *bp) |
10057 | { | 10057 | { |
10058 | u8 major, minor, version; | 10058 | u8 major, minor, version; |
@@ -10352,6 +10352,7 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) | |||
10352 | /* Reset should be performed after BRB is emptied */ | 10352 | /* Reset should be performed after BRB is emptied */ |
10353 | if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) { | 10353 | if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) { |
10354 | u32 timer_count = 1000; | 10354 | u32 timer_count = 1000; |
10355 | bool need_write = true; | ||
10355 | 10356 | ||
10356 | /* Close the MAC Rx to prevent BRB from filling up */ | 10357 | /* Close the MAC Rx to prevent BRB from filling up */ |
10357 | bnx2x_prev_unload_close_mac(bp, &mac_vals); | 10358 | bnx2x_prev_unload_close_mac(bp, &mac_vals); |
@@ -10398,7 +10399,10 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) | |||
10398 | * cleaning methods - might be redundant but harmless. | 10399 | * cleaning methods - might be redundant but harmless. |
10399 | */ | 10400 | */ |
10400 | if (bnx2x_prev_unload_undi_fw_supports_mf(bp)) { | 10401 | if (bnx2x_prev_unload_undi_fw_supports_mf(bp)) { |
10401 | bnx2x_prev_unload_undi_mf(bp); | 10402 | if (need_write) { |
10403 | bnx2x_prev_unload_undi_mf(bp); | ||
10404 | need_write = false; | ||
10405 | } | ||
10402 | } else if (prev_undi) { | 10406 | } else if (prev_undi) { |
10403 | /* If UNDI resides in memory, | 10407 | /* If UNDI resides in memory, |
10404 | * manually increment it | 10408 | * manually increment it |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c index 81cc2d9831c2..b8078d50261b 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c | |||
@@ -2695,7 +2695,7 @@ out: | |||
2695 | bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC); | 2695 | bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC); |
2696 | } | 2696 | } |
2697 | 2697 | ||
2698 | return 0; | 2698 | return rc; |
2699 | } | 2699 | } |
2700 | 2700 | ||
2701 | int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos) | 2701 | int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos) |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c index 0c067e8564dd..784c7155b98a 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c | |||
@@ -747,7 +747,7 @@ int bnx2x_vfpf_config_mac(struct bnx2x *bp, u8 *addr, u8 vf_qid, bool set) | |||
747 | out: | 747 | out: |
748 | bnx2x_vfpf_finalize(bp, &req->first_tlv); | 748 | bnx2x_vfpf_finalize(bp, &req->first_tlv); |
749 | 749 | ||
750 | return 0; | 750 | return rc; |
751 | } | 751 | } |
752 | 752 | ||
753 | /* request pf to config rss table for vf queues*/ | 753 | /* request pf to config rss table for vf queues*/ |
diff --git a/drivers/net/ethernet/ec_bhf.c b/drivers/net/ethernet/ec_bhf.c new file mode 100644 index 000000000000..4884205e56ee --- /dev/null +++ b/drivers/net/ethernet/ec_bhf.c | |||
@@ -0,0 +1,706 @@ | |||
1 | /* | ||
2 | * drivers/net/ethernet/beckhoff/ec_bhf.c | ||
3 | * | ||
4 | * Copyright (C) 2014 Darek Marcinkiewicz <reksio@newterm.pl> | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | /* This is a driver for EtherCAT master module present on CCAT FPGA. | ||
18 | * Those can be found on Bechhoff CX50xx industrial PCs. | ||
19 | */ | ||
20 | |||
21 | #if 0 | ||
22 | #define DEBUG | ||
23 | #endif | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/moduleparam.h> | ||
27 | #include <linux/pci.h> | ||
28 | #include <linux/init.h> | ||
29 | |||
30 | #include <linux/netdevice.h> | ||
31 | #include <linux/etherdevice.h> | ||
32 | #include <linux/ip.h> | ||
33 | #include <linux/skbuff.h> | ||
34 | #include <linux/hrtimer.h> | ||
35 | #include <linux/interrupt.h> | ||
36 | #include <linux/stat.h> | ||
37 | |||
38 | #define TIMER_INTERVAL_NSEC 20000 | ||
39 | |||
40 | #define INFO_BLOCK_SIZE 0x10 | ||
41 | #define INFO_BLOCK_TYPE 0x0 | ||
42 | #define INFO_BLOCK_REV 0x2 | ||
43 | #define INFO_BLOCK_BLK_CNT 0x4 | ||
44 | #define INFO_BLOCK_TX_CHAN 0x4 | ||
45 | #define INFO_BLOCK_RX_CHAN 0x5 | ||
46 | #define INFO_BLOCK_OFFSET 0x8 | ||
47 | |||
48 | #define EC_MII_OFFSET 0x4 | ||
49 | #define EC_FIFO_OFFSET 0x8 | ||
50 | #define EC_MAC_OFFSET 0xc | ||
51 | |||
52 | #define MAC_FRAME_ERR_CNT 0x0 | ||
53 | #define MAC_RX_ERR_CNT 0x1 | ||
54 | #define MAC_CRC_ERR_CNT 0x2 | ||
55 | #define MAC_LNK_LST_ERR_CNT 0x3 | ||
56 | #define MAC_TX_FRAME_CNT 0x10 | ||
57 | #define MAC_RX_FRAME_CNT 0x14 | ||
58 | #define MAC_TX_FIFO_LVL 0x20 | ||
59 | #define MAC_DROPPED_FRMS 0x28 | ||
60 | #define MAC_CONNECTED_CCAT_FLAG 0x78 | ||
61 | |||
62 | #define MII_MAC_ADDR 0x8 | ||
63 | #define MII_MAC_FILT_FLAG 0xe | ||
64 | #define MII_LINK_STATUS 0xf | ||
65 | |||
66 | #define FIFO_TX_REG 0x0 | ||
67 | #define FIFO_TX_RESET 0x8 | ||
68 | #define FIFO_RX_REG 0x10 | ||
69 | #define FIFO_RX_ADDR_VALID (1u << 31) | ||
70 | #define FIFO_RX_RESET 0x18 | ||
71 | |||
72 | #define DMA_CHAN_OFFSET 0x1000 | ||
73 | #define DMA_CHAN_SIZE 0x8 | ||
74 | |||
75 | #define DMA_WINDOW_SIZE_MASK 0xfffffffc | ||
76 | |||
77 | static struct pci_device_id ids[] = { | ||
78 | { PCI_DEVICE(0x15ec, 0x5000), }, | ||
79 | { 0, } | ||
80 | }; | ||
81 | MODULE_DEVICE_TABLE(pci, ids); | ||
82 | |||
83 | struct rx_header { | ||
84 | #define RXHDR_NEXT_ADDR_MASK 0xffffffu | ||
85 | #define RXHDR_NEXT_VALID (1u << 31) | ||
86 | __le32 next; | ||
87 | #define RXHDR_NEXT_RECV_FLAG 0x1 | ||
88 | __le32 recv; | ||
89 | #define RXHDR_LEN_MASK 0xfffu | ||
90 | __le16 len; | ||
91 | __le16 port; | ||
92 | __le32 reserved; | ||
93 | u8 timestamp[8]; | ||
94 | } __packed; | ||
95 | |||
96 | #define PKT_PAYLOAD_SIZE 0x7e8 | ||
97 | struct rx_desc { | ||
98 | struct rx_header header; | ||
99 | u8 data[PKT_PAYLOAD_SIZE]; | ||
100 | } __packed; | ||
101 | |||
102 | struct tx_header { | ||
103 | __le16 len; | ||
104 | #define TX_HDR_PORT_0 0x1 | ||
105 | #define TX_HDR_PORT_1 0x2 | ||
106 | u8 port; | ||
107 | u8 ts_enable; | ||
108 | #define TX_HDR_SENT 0x1 | ||
109 | __le32 sent; | ||
110 | u8 timestamp[8]; | ||
111 | } __packed; | ||
112 | |||
113 | struct tx_desc { | ||
114 | struct tx_header header; | ||
115 | u8 data[PKT_PAYLOAD_SIZE]; | ||
116 | } __packed; | ||
117 | |||
118 | #define FIFO_SIZE 64 | ||
119 | |||
120 | static long polling_frequency = TIMER_INTERVAL_NSEC; | ||
121 | |||
122 | struct bhf_dma { | ||
123 | u8 *buf; | ||
124 | size_t len; | ||
125 | dma_addr_t buf_phys; | ||
126 | |||
127 | u8 *alloc; | ||
128 | size_t alloc_len; | ||
129 | dma_addr_t alloc_phys; | ||
130 | }; | ||
131 | |||
132 | struct ec_bhf_priv { | ||
133 | struct net_device *net_dev; | ||
134 | |||
135 | struct pci_dev *dev; | ||
136 | |||
137 | void * __iomem io; | ||
138 | void * __iomem dma_io; | ||
139 | |||
140 | struct hrtimer hrtimer; | ||
141 | |||
142 | int tx_dma_chan; | ||
143 | int rx_dma_chan; | ||
144 | void * __iomem ec_io; | ||
145 | void * __iomem fifo_io; | ||
146 | void * __iomem mii_io; | ||
147 | void * __iomem mac_io; | ||
148 | |||
149 | struct bhf_dma rx_buf; | ||
150 | struct rx_desc *rx_descs; | ||
151 | int rx_dnext; | ||
152 | int rx_dcount; | ||
153 | |||
154 | struct bhf_dma tx_buf; | ||
155 | struct tx_desc *tx_descs; | ||
156 | int tx_dcount; | ||
157 | int tx_dnext; | ||
158 | |||
159 | u64 stat_rx_bytes; | ||
160 | u64 stat_tx_bytes; | ||
161 | }; | ||
162 | |||
163 | #define PRIV_TO_DEV(priv) (&(priv)->dev->dev) | ||
164 | |||
165 | #define ETHERCAT_MASTER_ID 0x14 | ||
166 | |||
167 | static void ec_bhf_print_status(struct ec_bhf_priv *priv) | ||
168 | { | ||
169 | struct device *dev = PRIV_TO_DEV(priv); | ||
170 | |||
171 | dev_dbg(dev, "Frame error counter: %d\n", | ||
172 | ioread8(priv->mac_io + MAC_FRAME_ERR_CNT)); | ||
173 | dev_dbg(dev, "RX error counter: %d\n", | ||
174 | ioread8(priv->mac_io + MAC_RX_ERR_CNT)); | ||
175 | dev_dbg(dev, "CRC error counter: %d\n", | ||
176 | ioread8(priv->mac_io + MAC_CRC_ERR_CNT)); | ||
177 | dev_dbg(dev, "TX frame counter: %d\n", | ||
178 | ioread32(priv->mac_io + MAC_TX_FRAME_CNT)); | ||
179 | dev_dbg(dev, "RX frame counter: %d\n", | ||
180 | ioread32(priv->mac_io + MAC_RX_FRAME_CNT)); | ||
181 | dev_dbg(dev, "TX fifo level: %d\n", | ||
182 | ioread8(priv->mac_io + MAC_TX_FIFO_LVL)); | ||
183 | dev_dbg(dev, "Dropped frames: %d\n", | ||
184 | ioread8(priv->mac_io + MAC_DROPPED_FRMS)); | ||
185 | dev_dbg(dev, "Connected with CCAT slot: %d\n", | ||
186 | ioread8(priv->mac_io + MAC_CONNECTED_CCAT_FLAG)); | ||
187 | dev_dbg(dev, "Link status: %d\n", | ||
188 | ioread8(priv->mii_io + MII_LINK_STATUS)); | ||
189 | } | ||
190 | |||
191 | static void ec_bhf_reset(struct ec_bhf_priv *priv) | ||
192 | { | ||
193 | iowrite8(0, priv->mac_io + MAC_FRAME_ERR_CNT); | ||
194 | iowrite8(0, priv->mac_io + MAC_RX_ERR_CNT); | ||
195 | iowrite8(0, priv->mac_io + MAC_CRC_ERR_CNT); | ||
196 | iowrite8(0, priv->mac_io + MAC_LNK_LST_ERR_CNT); | ||
197 | iowrite32(0, priv->mac_io + MAC_TX_FRAME_CNT); | ||
198 | iowrite32(0, priv->mac_io + MAC_RX_FRAME_CNT); | ||
199 | iowrite8(0, priv->mac_io + MAC_DROPPED_FRMS); | ||
200 | |||
201 | iowrite8(0, priv->fifo_io + FIFO_TX_RESET); | ||
202 | iowrite8(0, priv->fifo_io + FIFO_RX_RESET); | ||
203 | |||
204 | iowrite8(0, priv->mac_io + MAC_TX_FIFO_LVL); | ||
205 | } | ||
206 | |||
207 | static void ec_bhf_send_packet(struct ec_bhf_priv *priv, struct tx_desc *desc) | ||
208 | { | ||
209 | u32 len = le16_to_cpu(desc->header.len) + sizeof(desc->header); | ||
210 | u32 addr = (u8 *)desc - priv->tx_buf.buf; | ||
211 | |||
212 | iowrite32((ALIGN(len, 8) << 24) | addr, priv->fifo_io + FIFO_TX_REG); | ||
213 | |||
214 | dev_dbg(PRIV_TO_DEV(priv), "Done sending packet\n"); | ||
215 | } | ||
216 | |||
217 | static int ec_bhf_desc_sent(struct tx_desc *desc) | ||
218 | { | ||
219 | return le32_to_cpu(desc->header.sent) & TX_HDR_SENT; | ||
220 | } | ||
221 | |||
222 | static void ec_bhf_process_tx(struct ec_bhf_priv *priv) | ||
223 | { | ||
224 | if (unlikely(netif_queue_stopped(priv->net_dev))) { | ||
225 | /* Make sure that we perceive changes to tx_dnext. */ | ||
226 | smp_rmb(); | ||
227 | |||
228 | if (ec_bhf_desc_sent(&priv->tx_descs[priv->tx_dnext])) | ||
229 | netif_wake_queue(priv->net_dev); | ||
230 | } | ||
231 | } | ||
232 | |||
233 | static int ec_bhf_pkt_received(struct rx_desc *desc) | ||
234 | { | ||
235 | return le32_to_cpu(desc->header.recv) & RXHDR_NEXT_RECV_FLAG; | ||
236 | } | ||
237 | |||
238 | static void ec_bhf_add_rx_desc(struct ec_bhf_priv *priv, struct rx_desc *desc) | ||
239 | { | ||
240 | iowrite32(FIFO_RX_ADDR_VALID | ((u8 *)(desc) - priv->rx_buf.buf), | ||
241 | priv->fifo_io + FIFO_RX_REG); | ||
242 | } | ||
243 | |||
244 | static void ec_bhf_process_rx(struct ec_bhf_priv *priv) | ||
245 | { | ||
246 | struct rx_desc *desc = &priv->rx_descs[priv->rx_dnext]; | ||
247 | struct device *dev = PRIV_TO_DEV(priv); | ||
248 | |||
249 | while (ec_bhf_pkt_received(desc)) { | ||
250 | int pkt_size = (le16_to_cpu(desc->header.len) & | ||
251 | RXHDR_LEN_MASK) - sizeof(struct rx_header) - 4; | ||
252 | u8 *data = desc->data; | ||
253 | struct sk_buff *skb; | ||
254 | |||
255 | skb = netdev_alloc_skb_ip_align(priv->net_dev, pkt_size); | ||
256 | dev_dbg(dev, "Received packet, size: %d\n", pkt_size); | ||
257 | |||
258 | if (skb) { | ||
259 | memcpy(skb_put(skb, pkt_size), data, pkt_size); | ||
260 | skb->protocol = eth_type_trans(skb, priv->net_dev); | ||
261 | dev_dbg(dev, "Protocol type: %x\n", skb->protocol); | ||
262 | |||
263 | priv->stat_rx_bytes += pkt_size; | ||
264 | |||
265 | netif_rx(skb); | ||
266 | } else { | ||
267 | dev_err_ratelimited(dev, | ||
268 | "Couldn't allocate a skb_buff for a packet of size %u\n", | ||
269 | pkt_size); | ||
270 | } | ||
271 | |||
272 | desc->header.recv = 0; | ||
273 | |||
274 | ec_bhf_add_rx_desc(priv, desc); | ||
275 | |||
276 | priv->rx_dnext = (priv->rx_dnext + 1) % priv->rx_dcount; | ||
277 | desc = &priv->rx_descs[priv->rx_dnext]; | ||
278 | } | ||
279 | |||
280 | } | ||
281 | |||
282 | static enum hrtimer_restart ec_bhf_timer_fun(struct hrtimer *timer) | ||
283 | { | ||
284 | struct ec_bhf_priv *priv = container_of(timer, struct ec_bhf_priv, | ||
285 | hrtimer); | ||
286 | ec_bhf_process_rx(priv); | ||
287 | ec_bhf_process_tx(priv); | ||
288 | |||
289 | if (!netif_running(priv->net_dev)) | ||
290 | return HRTIMER_NORESTART; | ||
291 | |||
292 | hrtimer_forward_now(timer, ktime_set(0, polling_frequency)); | ||
293 | return HRTIMER_RESTART; | ||
294 | } | ||
295 | |||
296 | static int ec_bhf_setup_offsets(struct ec_bhf_priv *priv) | ||
297 | { | ||
298 | struct device *dev = PRIV_TO_DEV(priv); | ||
299 | unsigned block_count, i; | ||
300 | void * __iomem ec_info; | ||
301 | |||
302 | dev_dbg(dev, "Info block:\n"); | ||
303 | dev_dbg(dev, "Type of function: %x\n", (unsigned)ioread16(priv->io)); | ||
304 | dev_dbg(dev, "Revision of function: %x\n", | ||
305 | (unsigned)ioread16(priv->io + INFO_BLOCK_REV)); | ||
306 | |||
307 | block_count = ioread8(priv->io + INFO_BLOCK_BLK_CNT); | ||
308 | dev_dbg(dev, "Number of function blocks: %x\n", block_count); | ||
309 | |||
310 | for (i = 0; i < block_count; i++) { | ||
311 | u16 type = ioread16(priv->io + i * INFO_BLOCK_SIZE + | ||
312 | INFO_BLOCK_TYPE); | ||
313 | if (type == ETHERCAT_MASTER_ID) | ||
314 | break; | ||
315 | } | ||
316 | if (i == block_count) { | ||
317 | dev_err(dev, "EtherCAT master with DMA block not found\n"); | ||
318 | return -ENODEV; | ||
319 | } | ||
320 | dev_dbg(dev, "EtherCAT master with DMA block found at pos: %d\n", i); | ||
321 | |||
322 | ec_info = priv->io + i * INFO_BLOCK_SIZE; | ||
323 | dev_dbg(dev, "EtherCAT master revision: %d\n", | ||
324 | ioread16(ec_info + INFO_BLOCK_REV)); | ||
325 | |||
326 | priv->tx_dma_chan = ioread8(ec_info + INFO_BLOCK_TX_CHAN); | ||
327 | dev_dbg(dev, "EtherCAT master tx dma channel: %d\n", | ||
328 | priv->tx_dma_chan); | ||
329 | |||
330 | priv->rx_dma_chan = ioread8(ec_info + INFO_BLOCK_RX_CHAN); | ||
331 | dev_dbg(dev, "EtherCAT master rx dma channel: %d\n", | ||
332 | priv->rx_dma_chan); | ||
333 | |||
334 | priv->ec_io = priv->io + ioread32(ec_info + INFO_BLOCK_OFFSET); | ||
335 | priv->mii_io = priv->ec_io + ioread32(priv->ec_io + EC_MII_OFFSET); | ||
336 | priv->fifo_io = priv->ec_io + ioread32(priv->ec_io + EC_FIFO_OFFSET); | ||
337 | priv->mac_io = priv->ec_io + ioread32(priv->ec_io + EC_MAC_OFFSET); | ||
338 | |||
339 | dev_dbg(dev, | ||
340 | "EtherCAT block addres: %p, fifo address: %p, mii address: %p, mac address: %p\n", | ||
341 | priv->ec_io, priv->fifo_io, priv->mii_io, priv->mac_io); | ||
342 | |||
343 | return 0; | ||
344 | } | ||
345 | |||
346 | static netdev_tx_t ec_bhf_start_xmit(struct sk_buff *skb, | ||
347 | struct net_device *net_dev) | ||
348 | { | ||
349 | struct ec_bhf_priv *priv = netdev_priv(net_dev); | ||
350 | struct tx_desc *desc; | ||
351 | unsigned len; | ||
352 | |||
353 | dev_dbg(PRIV_TO_DEV(priv), "Starting xmit\n"); | ||
354 | |||
355 | desc = &priv->tx_descs[priv->tx_dnext]; | ||
356 | |||
357 | skb_copy_and_csum_dev(skb, desc->data); | ||
358 | len = skb->len; | ||
359 | |||
360 | memset(&desc->header, 0, sizeof(desc->header)); | ||
361 | desc->header.len = cpu_to_le16(len); | ||
362 | desc->header.port = TX_HDR_PORT_0; | ||
363 | |||
364 | ec_bhf_send_packet(priv, desc); | ||
365 | |||
366 | priv->tx_dnext = (priv->tx_dnext + 1) % priv->tx_dcount; | ||
367 | |||
368 | if (!ec_bhf_desc_sent(&priv->tx_descs[priv->tx_dnext])) { | ||
369 | /* Make sure that update updates to tx_dnext are perceived | ||
370 | * by timer routine. | ||
371 | */ | ||
372 | smp_wmb(); | ||
373 | |||
374 | netif_stop_queue(net_dev); | ||
375 | |||
376 | dev_dbg(PRIV_TO_DEV(priv), "Stopping netif queue\n"); | ||
377 | ec_bhf_print_status(priv); | ||
378 | } | ||
379 | |||
380 | priv->stat_tx_bytes += len; | ||
381 | |||
382 | dev_kfree_skb(skb); | ||
383 | |||
384 | return NETDEV_TX_OK; | ||
385 | } | ||
386 | |||
387 | static int ec_bhf_alloc_dma_mem(struct ec_bhf_priv *priv, | ||
388 | struct bhf_dma *buf, | ||
389 | int channel, | ||
390 | int size) | ||
391 | { | ||
392 | int offset = channel * DMA_CHAN_SIZE + DMA_CHAN_OFFSET; | ||
393 | struct device *dev = PRIV_TO_DEV(priv); | ||
394 | u32 mask; | ||
395 | |||
396 | iowrite32(0xffffffff, priv->dma_io + offset); | ||
397 | |||
398 | mask = ioread32(priv->dma_io + offset); | ||
399 | mask &= DMA_WINDOW_SIZE_MASK; | ||
400 | dev_dbg(dev, "Read mask %x for channel %d\n", mask, channel); | ||
401 | |||
402 | /* We want to allocate a chunk of memory that is: | ||
403 | * - aligned to the mask we just read | ||
404 | * - is of size 2^mask bytes (at most) | ||
405 | * In order to ensure that we will allocate buffer of | ||
406 | * 2 * 2^mask bytes. | ||
407 | */ | ||
408 | buf->len = min_t(int, ~mask + 1, size); | ||
409 | buf->alloc_len = 2 * buf->len; | ||
410 | |||
411 | dev_dbg(dev, "Allocating %d bytes for channel %d", | ||
412 | (int)buf->alloc_len, channel); | ||
413 | buf->alloc = dma_alloc_coherent(dev, buf->alloc_len, &buf->alloc_phys, | ||
414 | GFP_KERNEL); | ||
415 | if (buf->alloc == NULL) { | ||
416 | dev_info(dev, "Failed to allocate buffer\n"); | ||
417 | return -ENOMEM; | ||
418 | } | ||
419 | |||
420 | buf->buf_phys = (buf->alloc_phys + buf->len) & mask; | ||
421 | buf->buf = buf->alloc + (buf->buf_phys - buf->alloc_phys); | ||
422 | |||
423 | iowrite32(0, priv->dma_io + offset + 4); | ||
424 | iowrite32(buf->buf_phys, priv->dma_io + offset); | ||
425 | dev_dbg(dev, "Buffer: %x and read from dev: %x", | ||
426 | (unsigned)buf->buf_phys, ioread32(priv->dma_io + offset)); | ||
427 | |||
428 | return 0; | ||
429 | } | ||
430 | |||
431 | static void ec_bhf_setup_tx_descs(struct ec_bhf_priv *priv) | ||
432 | { | ||
433 | int i = 0; | ||
434 | |||
435 | priv->tx_dcount = priv->tx_buf.len / sizeof(struct tx_desc); | ||
436 | priv->tx_descs = (struct tx_desc *) priv->tx_buf.buf; | ||
437 | priv->tx_dnext = 0; | ||
438 | |||
439 | for (i = 0; i < priv->tx_dcount; i++) | ||
440 | priv->tx_descs[i].header.sent = cpu_to_le32(TX_HDR_SENT); | ||
441 | } | ||
442 | |||
443 | static void ec_bhf_setup_rx_descs(struct ec_bhf_priv *priv) | ||
444 | { | ||
445 | int i; | ||
446 | |||
447 | priv->rx_dcount = priv->rx_buf.len / sizeof(struct rx_desc); | ||
448 | priv->rx_descs = (struct rx_desc *) priv->rx_buf.buf; | ||
449 | priv->rx_dnext = 0; | ||
450 | |||
451 | for (i = 0; i < priv->rx_dcount; i++) { | ||
452 | struct rx_desc *desc = &priv->rx_descs[i]; | ||
453 | u32 next; | ||
454 | |||
455 | if (i != priv->rx_dcount - 1) | ||
456 | next = (u8 *)(desc + 1) - priv->rx_buf.buf; | ||
457 | else | ||
458 | next = 0; | ||
459 | next |= RXHDR_NEXT_VALID; | ||
460 | desc->header.next = cpu_to_le32(next); | ||
461 | desc->header.recv = 0; | ||
462 | ec_bhf_add_rx_desc(priv, desc); | ||
463 | } | ||
464 | } | ||
465 | |||
466 | static int ec_bhf_open(struct net_device *net_dev) | ||
467 | { | ||
468 | struct ec_bhf_priv *priv = netdev_priv(net_dev); | ||
469 | struct device *dev = PRIV_TO_DEV(priv); | ||
470 | int err = 0; | ||
471 | |||
472 | dev_info(dev, "Opening device\n"); | ||
473 | |||
474 | ec_bhf_reset(priv); | ||
475 | |||
476 | err = ec_bhf_alloc_dma_mem(priv, &priv->rx_buf, priv->rx_dma_chan, | ||
477 | FIFO_SIZE * sizeof(struct rx_desc)); | ||
478 | if (err) { | ||
479 | dev_err(dev, "Failed to allocate rx buffer\n"); | ||
480 | goto out; | ||
481 | } | ||
482 | ec_bhf_setup_rx_descs(priv); | ||
483 | |||
484 | dev_info(dev, "RX buffer allocated, address: %x\n", | ||
485 | (unsigned)priv->rx_buf.buf_phys); | ||
486 | |||
487 | err = ec_bhf_alloc_dma_mem(priv, &priv->tx_buf, priv->tx_dma_chan, | ||
488 | FIFO_SIZE * sizeof(struct tx_desc)); | ||
489 | if (err) { | ||
490 | dev_err(dev, "Failed to allocate tx buffer\n"); | ||
491 | goto error_rx_free; | ||
492 | } | ||
493 | dev_dbg(dev, "TX buffer allocated, addres: %x\n", | ||
494 | (unsigned)priv->tx_buf.buf_phys); | ||
495 | |||
496 | iowrite8(0, priv->mii_io + MII_MAC_FILT_FLAG); | ||
497 | |||
498 | ec_bhf_setup_tx_descs(priv); | ||
499 | |||
500 | netif_start_queue(net_dev); | ||
501 | |||
502 | hrtimer_init(&priv->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | ||
503 | priv->hrtimer.function = ec_bhf_timer_fun; | ||
504 | hrtimer_start(&priv->hrtimer, ktime_set(0, polling_frequency), | ||
505 | HRTIMER_MODE_REL); | ||
506 | |||
507 | dev_info(PRIV_TO_DEV(priv), "Device open\n"); | ||
508 | |||
509 | ec_bhf_print_status(priv); | ||
510 | |||
511 | return 0; | ||
512 | |||
513 | error_rx_free: | ||
514 | dma_free_coherent(dev, priv->rx_buf.alloc_len, priv->rx_buf.alloc, | ||
515 | priv->rx_buf.alloc_len); | ||
516 | out: | ||
517 | return err; | ||
518 | } | ||
519 | |||
520 | static int ec_bhf_stop(struct net_device *net_dev) | ||
521 | { | ||
522 | struct ec_bhf_priv *priv = netdev_priv(net_dev); | ||
523 | struct device *dev = PRIV_TO_DEV(priv); | ||
524 | |||
525 | hrtimer_cancel(&priv->hrtimer); | ||
526 | |||
527 | ec_bhf_reset(priv); | ||
528 | |||
529 | netif_tx_disable(net_dev); | ||
530 | |||
531 | dma_free_coherent(dev, priv->tx_buf.alloc_len, | ||
532 | priv->tx_buf.alloc, priv->tx_buf.alloc_phys); | ||
533 | dma_free_coherent(dev, priv->rx_buf.alloc_len, | ||
534 | priv->rx_buf.alloc, priv->rx_buf.alloc_phys); | ||
535 | |||
536 | return 0; | ||
537 | } | ||
538 | |||
539 | static struct rtnl_link_stats64 * | ||
540 | ec_bhf_get_stats(struct net_device *net_dev, | ||
541 | struct rtnl_link_stats64 *stats) | ||
542 | { | ||
543 | struct ec_bhf_priv *priv = netdev_priv(net_dev); | ||
544 | |||
545 | stats->rx_errors = ioread8(priv->mac_io + MAC_RX_ERR_CNT) + | ||
546 | ioread8(priv->mac_io + MAC_CRC_ERR_CNT) + | ||
547 | ioread8(priv->mac_io + MAC_FRAME_ERR_CNT); | ||
548 | stats->rx_packets = ioread32(priv->mac_io + MAC_RX_FRAME_CNT); | ||
549 | stats->tx_packets = ioread32(priv->mac_io + MAC_TX_FRAME_CNT); | ||
550 | stats->rx_dropped = ioread8(priv->mac_io + MAC_DROPPED_FRMS); | ||
551 | |||
552 | stats->tx_bytes = priv->stat_tx_bytes; | ||
553 | stats->rx_bytes = priv->stat_rx_bytes; | ||
554 | |||
555 | return stats; | ||
556 | } | ||
557 | |||
558 | static const struct net_device_ops ec_bhf_netdev_ops = { | ||
559 | .ndo_start_xmit = ec_bhf_start_xmit, | ||
560 | .ndo_open = ec_bhf_open, | ||
561 | .ndo_stop = ec_bhf_stop, | ||
562 | .ndo_get_stats64 = ec_bhf_get_stats, | ||
563 | .ndo_change_mtu = eth_change_mtu, | ||
564 | .ndo_validate_addr = eth_validate_addr, | ||
565 | .ndo_set_mac_address = eth_mac_addr | ||
566 | }; | ||
567 | |||
568 | static int ec_bhf_probe(struct pci_dev *dev, const struct pci_device_id *id) | ||
569 | { | ||
570 | struct net_device *net_dev; | ||
571 | struct ec_bhf_priv *priv; | ||
572 | void * __iomem dma_io; | ||
573 | void * __iomem io; | ||
574 | int err = 0; | ||
575 | |||
576 | err = pci_enable_device(dev); | ||
577 | if (err) | ||
578 | return err; | ||
579 | |||
580 | pci_set_master(dev); | ||
581 | |||
582 | err = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); | ||
583 | if (err) { | ||
584 | dev_err(&dev->dev, | ||
585 | "Required dma mask not supported, failed to initialize device\n"); | ||
586 | err = -EIO; | ||
587 | goto err_disable_dev; | ||
588 | } | ||
589 | |||
590 | err = pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(32)); | ||
591 | if (err) { | ||
592 | dev_err(&dev->dev, | ||
593 | "Required dma mask not supported, failed to initialize device\n"); | ||
594 | goto err_disable_dev; | ||
595 | } | ||
596 | |||
597 | err = pci_request_regions(dev, "ec_bhf"); | ||
598 | if (err) { | ||
599 | dev_err(&dev->dev, "Failed to request pci memory regions\n"); | ||
600 | goto err_disable_dev; | ||
601 | } | ||
602 | |||
603 | io = pci_iomap(dev, 0, 0); | ||
604 | if (!io) { | ||
605 | dev_err(&dev->dev, "Failed to map pci card memory bar 0"); | ||
606 | err = -EIO; | ||
607 | goto err_release_regions; | ||
608 | } | ||
609 | |||
610 | dma_io = pci_iomap(dev, 2, 0); | ||
611 | if (!dma_io) { | ||
612 | dev_err(&dev->dev, "Failed to map pci card memory bar 2"); | ||
613 | err = -EIO; | ||
614 | goto err_unmap; | ||
615 | } | ||
616 | |||
617 | net_dev = alloc_etherdev(sizeof(struct ec_bhf_priv)); | ||
618 | if (net_dev == 0) { | ||
619 | err = -ENOMEM; | ||
620 | goto err_unmap_dma_io; | ||
621 | } | ||
622 | |||
623 | pci_set_drvdata(dev, net_dev); | ||
624 | SET_NETDEV_DEV(net_dev, &dev->dev); | ||
625 | |||
626 | net_dev->features = 0; | ||
627 | net_dev->flags |= IFF_NOARP; | ||
628 | |||
629 | net_dev->netdev_ops = &ec_bhf_netdev_ops; | ||
630 | |||
631 | priv = netdev_priv(net_dev); | ||
632 | priv->net_dev = net_dev; | ||
633 | priv->io = io; | ||
634 | priv->dma_io = dma_io; | ||
635 | priv->dev = dev; | ||
636 | |||
637 | err = ec_bhf_setup_offsets(priv); | ||
638 | if (err < 0) | ||
639 | goto err_free_net_dev; | ||
640 | |||
641 | memcpy_fromio(net_dev->dev_addr, priv->mii_io + MII_MAC_ADDR, 6); | ||
642 | |||
643 | dev_dbg(&dev->dev, "CX5020 Ethercat master address: %pM\n", | ||
644 | net_dev->dev_addr); | ||
645 | |||
646 | err = register_netdev(net_dev); | ||
647 | if (err < 0) | ||
648 | goto err_free_net_dev; | ||
649 | |||
650 | return 0; | ||
651 | |||
652 | err_free_net_dev: | ||
653 | free_netdev(net_dev); | ||
654 | err_unmap_dma_io: | ||
655 | pci_iounmap(dev, dma_io); | ||
656 | err_unmap: | ||
657 | pci_iounmap(dev, io); | ||
658 | err_release_regions: | ||
659 | pci_release_regions(dev); | ||
660 | err_disable_dev: | ||
661 | pci_clear_master(dev); | ||
662 | pci_disable_device(dev); | ||
663 | |||
664 | return err; | ||
665 | } | ||
666 | |||
667 | static void ec_bhf_remove(struct pci_dev *dev) | ||
668 | { | ||
669 | struct net_device *net_dev = pci_get_drvdata(dev); | ||
670 | struct ec_bhf_priv *priv = netdev_priv(net_dev); | ||
671 | |||
672 | unregister_netdev(net_dev); | ||
673 | free_netdev(net_dev); | ||
674 | |||
675 | pci_iounmap(dev, priv->dma_io); | ||
676 | pci_iounmap(dev, priv->io); | ||
677 | pci_release_regions(dev); | ||
678 | pci_clear_master(dev); | ||
679 | pci_disable_device(dev); | ||
680 | } | ||
681 | |||
682 | static struct pci_driver pci_driver = { | ||
683 | .name = "ec_bhf", | ||
684 | .id_table = ids, | ||
685 | .probe = ec_bhf_probe, | ||
686 | .remove = ec_bhf_remove, | ||
687 | }; | ||
688 | |||
689 | static int __init ec_bhf_init(void) | ||
690 | { | ||
691 | return pci_register_driver(&pci_driver); | ||
692 | } | ||
693 | |||
694 | static void __exit ec_bhf_exit(void) | ||
695 | { | ||
696 | pci_unregister_driver(&pci_driver); | ||
697 | } | ||
698 | |||
699 | module_init(ec_bhf_init); | ||
700 | module_exit(ec_bhf_exit); | ||
701 | |||
702 | module_param(polling_frequency, long, S_IRUGO); | ||
703 | MODULE_PARM_DESC(polling_frequency, "Polling timer frequency in ns"); | ||
704 | |||
705 | MODULE_LICENSE("GPL"); | ||
706 | MODULE_AUTHOR("Dariusz Marcinkiewicz <reksio@newterm.pl>"); | ||
diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c index a18645407d21..dc19bc5dec77 100644 --- a/drivers/net/ethernet/emulex/benet/be_main.c +++ b/drivers/net/ethernet/emulex/benet/be_main.c | |||
@@ -4949,6 +4949,12 @@ static void be_eeh_resume(struct pci_dev *pdev) | |||
4949 | if (status) | 4949 | if (status) |
4950 | goto err; | 4950 | goto err; |
4951 | 4951 | ||
4952 | /* On some BE3 FW versions, after a HW reset, | ||
4953 | * interrupts will remain disabled for each function. | ||
4954 | * So, explicitly enable interrupts | ||
4955 | */ | ||
4956 | be_intr_set(adapter, true); | ||
4957 | |||
4952 | /* tell fw we're ready to fire cmds */ | 4958 | /* tell fw we're ready to fire cmds */ |
4953 | status = be_cmd_fw_init(adapter); | 4959 | status = be_cmd_fw_init(adapter); |
4954 | if (status) | 4960 | if (status) |
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c index b0c6050479eb..b78378cea5e3 100644 --- a/drivers/net/ethernet/jme.c +++ b/drivers/net/ethernet/jme.c | |||
@@ -1988,7 +1988,7 @@ jme_alloc_txdesc(struct jme_adapter *jme, | |||
1988 | return idx; | 1988 | return idx; |
1989 | } | 1989 | } |
1990 | 1990 | ||
1991 | static void | 1991 | static int |
1992 | jme_fill_tx_map(struct pci_dev *pdev, | 1992 | jme_fill_tx_map(struct pci_dev *pdev, |
1993 | struct txdesc *txdesc, | 1993 | struct txdesc *txdesc, |
1994 | struct jme_buffer_info *txbi, | 1994 | struct jme_buffer_info *txbi, |
@@ -2005,6 +2005,9 @@ jme_fill_tx_map(struct pci_dev *pdev, | |||
2005 | len, | 2005 | len, |
2006 | PCI_DMA_TODEVICE); | 2006 | PCI_DMA_TODEVICE); |
2007 | 2007 | ||
2008 | if (unlikely(pci_dma_mapping_error(pdev, dmaaddr))) | ||
2009 | return -EINVAL; | ||
2010 | |||
2008 | pci_dma_sync_single_for_device(pdev, | 2011 | pci_dma_sync_single_for_device(pdev, |
2009 | dmaaddr, | 2012 | dmaaddr, |
2010 | len, | 2013 | len, |
@@ -2021,9 +2024,30 @@ jme_fill_tx_map(struct pci_dev *pdev, | |||
2021 | 2024 | ||
2022 | txbi->mapping = dmaaddr; | 2025 | txbi->mapping = dmaaddr; |
2023 | txbi->len = len; | 2026 | txbi->len = len; |
2027 | return 0; | ||
2024 | } | 2028 | } |
2025 | 2029 | ||
2026 | static void | 2030 | static void jme_drop_tx_map(struct jme_adapter *jme, int startidx, int count) |
2031 | { | ||
2032 | struct jme_ring *txring = &(jme->txring[0]); | ||
2033 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; | ||
2034 | int mask = jme->tx_ring_mask; | ||
2035 | int j; | ||
2036 | |||
2037 | for (j = 0 ; j < count ; j++) { | ||
2038 | ctxbi = txbi + ((startidx + j + 2) & (mask)); | ||
2039 | pci_unmap_page(jme->pdev, | ||
2040 | ctxbi->mapping, | ||
2041 | ctxbi->len, | ||
2042 | PCI_DMA_TODEVICE); | ||
2043 | |||
2044 | ctxbi->mapping = 0; | ||
2045 | ctxbi->len = 0; | ||
2046 | } | ||
2047 | |||
2048 | } | ||
2049 | |||
2050 | static int | ||
2027 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | 2051 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
2028 | { | 2052 | { |
2029 | struct jme_ring *txring = &(jme->txring[0]); | 2053 | struct jme_ring *txring = &(jme->txring[0]); |
@@ -2034,25 +2058,37 @@ jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |||
2034 | int mask = jme->tx_ring_mask; | 2058 | int mask = jme->tx_ring_mask; |
2035 | const struct skb_frag_struct *frag; | 2059 | const struct skb_frag_struct *frag; |
2036 | u32 len; | 2060 | u32 len; |
2061 | int ret = 0; | ||
2037 | 2062 | ||
2038 | for (i = 0 ; i < nr_frags ; ++i) { | 2063 | for (i = 0 ; i < nr_frags ; ++i) { |
2039 | frag = &skb_shinfo(skb)->frags[i]; | 2064 | frag = &skb_shinfo(skb)->frags[i]; |
2040 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); | 2065 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
2041 | ctxbi = txbi + ((idx + i + 2) & (mask)); | 2066 | ctxbi = txbi + ((idx + i + 2) & (mask)); |
2042 | 2067 | ||
2043 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, | 2068 | ret = jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, |
2044 | skb_frag_page(frag), | 2069 | skb_frag_page(frag), |
2045 | frag->page_offset, skb_frag_size(frag), hidma); | 2070 | frag->page_offset, skb_frag_size(frag), hidma); |
2071 | if (ret) { | ||
2072 | jme_drop_tx_map(jme, idx, i); | ||
2073 | goto out; | ||
2074 | } | ||
2075 | |||
2046 | } | 2076 | } |
2047 | 2077 | ||
2048 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; | 2078 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
2049 | ctxdesc = txdesc + ((idx + 1) & (mask)); | 2079 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
2050 | ctxbi = txbi + ((idx + 1) & (mask)); | 2080 | ctxbi = txbi + ((idx + 1) & (mask)); |
2051 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | 2081 | ret = jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), |
2052 | offset_in_page(skb->data), len, hidma); | 2082 | offset_in_page(skb->data), len, hidma); |
2083 | if (ret) | ||
2084 | jme_drop_tx_map(jme, idx, i); | ||
2085 | |||
2086 | out: | ||
2087 | return ret; | ||
2053 | 2088 | ||
2054 | } | 2089 | } |
2055 | 2090 | ||
2091 | |||
2056 | static int | 2092 | static int |
2057 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) | 2093 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
2058 | { | 2094 | { |
@@ -2131,6 +2167,7 @@ jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |||
2131 | struct txdesc *txdesc; | 2167 | struct txdesc *txdesc; |
2132 | struct jme_buffer_info *txbi; | 2168 | struct jme_buffer_info *txbi; |
2133 | u8 flags; | 2169 | u8 flags; |
2170 | int ret = 0; | ||
2134 | 2171 | ||
2135 | txdesc = (struct txdesc *)txring->desc + idx; | 2172 | txdesc = (struct txdesc *)txring->desc + idx; |
2136 | txbi = txring->bufinf + idx; | 2173 | txbi = txring->bufinf + idx; |
@@ -2155,7 +2192,10 @@ jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |||
2155 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | 2192 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) |
2156 | jme_tx_csum(jme, skb, &flags); | 2193 | jme_tx_csum(jme, skb, &flags); |
2157 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); | 2194 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
2158 | jme_map_tx_skb(jme, skb, idx); | 2195 | ret = jme_map_tx_skb(jme, skb, idx); |
2196 | if (ret) | ||
2197 | return ret; | ||
2198 | |||
2159 | txdesc->desc1.flags = flags; | 2199 | txdesc->desc1.flags = flags; |
2160 | /* | 2200 | /* |
2161 | * Set tx buffer info after telling NIC to send | 2201 | * Set tx buffer info after telling NIC to send |
@@ -2228,7 +2268,8 @@ jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
2228 | return NETDEV_TX_BUSY; | 2268 | return NETDEV_TX_BUSY; |
2229 | } | 2269 | } |
2230 | 2270 | ||
2231 | jme_fill_tx_desc(jme, skb, idx); | 2271 | if (jme_fill_tx_desc(jme, skb, idx)) |
2272 | return NETDEV_TX_OK; | ||
2232 | 2273 | ||
2233 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | 2274 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2234 | TXCS_SELECT_QUEUE0 | | 2275 | TXCS_SELECT_QUEUE0 | |
diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c b/drivers/net/ethernet/mellanox/mlx4/cmd.c index 78099eab7673..92d3249f63f1 100644 --- a/drivers/net/ethernet/mellanox/mlx4/cmd.c +++ b/drivers/net/ethernet/mellanox/mlx4/cmd.c | |||
@@ -1253,12 +1253,12 @@ static struct mlx4_cmd_info cmd_info[] = { | |||
1253 | }, | 1253 | }, |
1254 | { | 1254 | { |
1255 | .opcode = MLX4_CMD_UPDATE_QP, | 1255 | .opcode = MLX4_CMD_UPDATE_QP, |
1256 | .has_inbox = false, | 1256 | .has_inbox = true, |
1257 | .has_outbox = false, | 1257 | .has_outbox = false, |
1258 | .out_is_imm = false, | 1258 | .out_is_imm = false, |
1259 | .encode_slave_id = false, | 1259 | .encode_slave_id = false, |
1260 | .verify = NULL, | 1260 | .verify = NULL, |
1261 | .wrapper = mlx4_CMD_EPERM_wrapper | 1261 | .wrapper = mlx4_UPDATE_QP_wrapper |
1262 | }, | 1262 | }, |
1263 | { | 1263 | { |
1264 | .opcode = MLX4_CMD_GET_OP_REQ, | 1264 | .opcode = MLX4_CMD_GET_OP_REQ, |
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h index f9c465101963..212cea440f90 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h +++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h | |||
@@ -1195,6 +1195,12 @@ int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, | |||
1195 | struct mlx4_cmd_mailbox *outbox, | 1195 | struct mlx4_cmd_mailbox *outbox, |
1196 | struct mlx4_cmd_info *cmd); | 1196 | struct mlx4_cmd_info *cmd); |
1197 | 1197 | ||
1198 | int mlx4_UPDATE_QP_wrapper(struct mlx4_dev *dev, int slave, | ||
1199 | struct mlx4_vhcr *vhcr, | ||
1200 | struct mlx4_cmd_mailbox *inbox, | ||
1201 | struct mlx4_cmd_mailbox *outbox, | ||
1202 | struct mlx4_cmd_info *cmd); | ||
1203 | |||
1198 | int mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, | 1204 | int mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, |
1199 | struct mlx4_vhcr *vhcr, | 1205 | struct mlx4_vhcr *vhcr, |
1200 | struct mlx4_cmd_mailbox *inbox, | 1206 | struct mlx4_cmd_mailbox *inbox, |
diff --git a/drivers/net/ethernet/mellanox/mlx4/qp.c b/drivers/net/ethernet/mellanox/mlx4/qp.c index 61d64ebffd56..fbd32af89c7c 100644 --- a/drivers/net/ethernet/mellanox/mlx4/qp.c +++ b/drivers/net/ethernet/mellanox/mlx4/qp.c | |||
@@ -389,6 +389,41 @@ err_icm: | |||
389 | 389 | ||
390 | EXPORT_SYMBOL_GPL(mlx4_qp_alloc); | 390 | EXPORT_SYMBOL_GPL(mlx4_qp_alloc); |
391 | 391 | ||
392 | #define MLX4_UPDATE_QP_SUPPORTED_ATTRS MLX4_UPDATE_QP_SMAC | ||
393 | int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp, | ||
394 | enum mlx4_update_qp_attr attr, | ||
395 | struct mlx4_update_qp_params *params) | ||
396 | { | ||
397 | struct mlx4_cmd_mailbox *mailbox; | ||
398 | struct mlx4_update_qp_context *cmd; | ||
399 | u64 pri_addr_path_mask = 0; | ||
400 | int err = 0; | ||
401 | |||
402 | mailbox = mlx4_alloc_cmd_mailbox(dev); | ||
403 | if (IS_ERR(mailbox)) | ||
404 | return PTR_ERR(mailbox); | ||
405 | |||
406 | cmd = (struct mlx4_update_qp_context *)mailbox->buf; | ||
407 | |||
408 | if (!attr || (attr & ~MLX4_UPDATE_QP_SUPPORTED_ATTRS)) | ||
409 | return -EINVAL; | ||
410 | |||
411 | if (attr & MLX4_UPDATE_QP_SMAC) { | ||
412 | pri_addr_path_mask |= 1ULL << MLX4_UPD_QP_PATH_MASK_MAC_INDEX; | ||
413 | cmd->qp_context.pri_path.grh_mylmc = params->smac_index; | ||
414 | } | ||
415 | |||
416 | cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask); | ||
417 | |||
418 | err = mlx4_cmd(dev, mailbox->dma, qp->qpn & 0xffffff, 0, | ||
419 | MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A, | ||
420 | MLX4_CMD_NATIVE); | ||
421 | |||
422 | mlx4_free_cmd_mailbox(dev, mailbox); | ||
423 | return err; | ||
424 | } | ||
425 | EXPORT_SYMBOL_GPL(mlx4_update_qp); | ||
426 | |||
392 | void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp) | 427 | void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp) |
393 | { | 428 | { |
394 | struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; | 429 | struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c index 1c3fdd4a1f7d..8f1254a79832 100644 --- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c +++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c | |||
@@ -3895,6 +3895,60 @@ static int add_eth_header(struct mlx4_dev *dev, int slave, | |||
3895 | 3895 | ||
3896 | } | 3896 | } |
3897 | 3897 | ||
3898 | #define MLX4_UPD_QP_PATH_MASK_SUPPORTED (1ULL << MLX4_UPD_QP_PATH_MASK_MAC_INDEX) | ||
3899 | int mlx4_UPDATE_QP_wrapper(struct mlx4_dev *dev, int slave, | ||
3900 | struct mlx4_vhcr *vhcr, | ||
3901 | struct mlx4_cmd_mailbox *inbox, | ||
3902 | struct mlx4_cmd_mailbox *outbox, | ||
3903 | struct mlx4_cmd_info *cmd_info) | ||
3904 | { | ||
3905 | int err; | ||
3906 | u32 qpn = vhcr->in_modifier & 0xffffff; | ||
3907 | struct res_qp *rqp; | ||
3908 | u64 mac; | ||
3909 | unsigned port; | ||
3910 | u64 pri_addr_path_mask; | ||
3911 | struct mlx4_update_qp_context *cmd; | ||
3912 | int smac_index; | ||
3913 | |||
3914 | cmd = (struct mlx4_update_qp_context *)inbox->buf; | ||
3915 | |||
3916 | pri_addr_path_mask = be64_to_cpu(cmd->primary_addr_path_mask); | ||
3917 | if (cmd->qp_mask || cmd->secondary_addr_path_mask || | ||
3918 | (pri_addr_path_mask & ~MLX4_UPD_QP_PATH_MASK_SUPPORTED)) | ||
3919 | return -EPERM; | ||
3920 | |||
3921 | /* Just change the smac for the QP */ | ||
3922 | err = get_res(dev, slave, qpn, RES_QP, &rqp); | ||
3923 | if (err) { | ||
3924 | mlx4_err(dev, "Updating qpn 0x%x for slave %d rejected\n", qpn, slave); | ||
3925 | return err; | ||
3926 | } | ||
3927 | |||
3928 | port = (rqp->sched_queue >> 6 & 1) + 1; | ||
3929 | smac_index = cmd->qp_context.pri_path.grh_mylmc; | ||
3930 | err = mac_find_smac_ix_in_slave(dev, slave, port, | ||
3931 | smac_index, &mac); | ||
3932 | if (err) { | ||
3933 | mlx4_err(dev, "Failed to update qpn 0x%x, MAC is invalid. smac_ix: %d\n", | ||
3934 | qpn, smac_index); | ||
3935 | goto err_mac; | ||
3936 | } | ||
3937 | |||
3938 | err = mlx4_cmd(dev, inbox->dma, | ||
3939 | vhcr->in_modifier, 0, | ||
3940 | MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A, | ||
3941 | MLX4_CMD_NATIVE); | ||
3942 | if (err) { | ||
3943 | mlx4_err(dev, "Failed to update qpn on qpn 0x%x, command failed\n", qpn); | ||
3944 | goto err_mac; | ||
3945 | } | ||
3946 | |||
3947 | err_mac: | ||
3948 | put_res(dev, slave, qpn, RES_QP); | ||
3949 | return err; | ||
3950 | } | ||
3951 | |||
3898 | int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, | 3952 | int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, |
3899 | struct mlx4_vhcr *vhcr, | 3953 | struct mlx4_vhcr *vhcr, |
3900 | struct mlx4_cmd_mailbox *inbox, | 3954 | struct mlx4_cmd_mailbox *inbox, |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h index 7b52a88923ef..f785d01c7d12 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | |||
@@ -1719,22 +1719,6 @@ static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring) | |||
1719 | tx_ring->producer; | 1719 | tx_ring->producer; |
1720 | } | 1720 | } |
1721 | 1721 | ||
1722 | static inline int qlcnic_set_real_num_queues(struct qlcnic_adapter *adapter, | ||
1723 | struct net_device *netdev) | ||
1724 | { | ||
1725 | int err; | ||
1726 | |||
1727 | netdev->num_tx_queues = adapter->drv_tx_rings; | ||
1728 | netdev->real_num_tx_queues = adapter->drv_tx_rings; | ||
1729 | |||
1730 | err = netif_set_real_num_tx_queues(netdev, adapter->drv_tx_rings); | ||
1731 | if (err) | ||
1732 | netdev_err(netdev, "failed to set %d Tx queues\n", | ||
1733 | adapter->drv_tx_rings); | ||
1734 | |||
1735 | return err; | ||
1736 | } | ||
1737 | |||
1738 | struct qlcnic_nic_template { | 1722 | struct qlcnic_nic_template { |
1739 | int (*config_bridged_mode) (struct qlcnic_adapter *, u32); | 1723 | int (*config_bridged_mode) (struct qlcnic_adapter *, u32); |
1740 | int (*config_led) (struct qlcnic_adapter *, u32, u32); | 1724 | int (*config_led) (struct qlcnic_adapter *, u32, u32); |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c index 0bc914859e38..7e55e88a81bf 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c | |||
@@ -2206,6 +2206,31 @@ static void qlcnic_82xx_set_mac_filter_count(struct qlcnic_adapter *adapter) | |||
2206 | ahw->max_uc_count = count; | 2206 | ahw->max_uc_count = count; |
2207 | } | 2207 | } |
2208 | 2208 | ||
2209 | static int qlcnic_set_real_num_queues(struct qlcnic_adapter *adapter, | ||
2210 | u8 tx_queues, u8 rx_queues) | ||
2211 | { | ||
2212 | struct net_device *netdev = adapter->netdev; | ||
2213 | int err = 0; | ||
2214 | |||
2215 | if (tx_queues) { | ||
2216 | err = netif_set_real_num_tx_queues(netdev, tx_queues); | ||
2217 | if (err) { | ||
2218 | netdev_err(netdev, "failed to set %d Tx queues\n", | ||
2219 | tx_queues); | ||
2220 | return err; | ||
2221 | } | ||
2222 | } | ||
2223 | |||
2224 | if (rx_queues) { | ||
2225 | err = netif_set_real_num_rx_queues(netdev, rx_queues); | ||
2226 | if (err) | ||
2227 | netdev_err(netdev, "failed to set %d Rx queues\n", | ||
2228 | rx_queues); | ||
2229 | } | ||
2230 | |||
2231 | return err; | ||
2232 | } | ||
2233 | |||
2209 | int | 2234 | int |
2210 | qlcnic_setup_netdev(struct qlcnic_adapter *adapter, struct net_device *netdev, | 2235 | qlcnic_setup_netdev(struct qlcnic_adapter *adapter, struct net_device *netdev, |
2211 | int pci_using_dac) | 2236 | int pci_using_dac) |
@@ -2269,7 +2294,8 @@ qlcnic_setup_netdev(struct qlcnic_adapter *adapter, struct net_device *netdev, | |||
2269 | netdev->priv_flags |= IFF_UNICAST_FLT; | 2294 | netdev->priv_flags |= IFF_UNICAST_FLT; |
2270 | netdev->irq = adapter->msix_entries[0].vector; | 2295 | netdev->irq = adapter->msix_entries[0].vector; |
2271 | 2296 | ||
2272 | err = qlcnic_set_real_num_queues(adapter, netdev); | 2297 | err = qlcnic_set_real_num_queues(adapter, adapter->drv_tx_rings, |
2298 | adapter->drv_sds_rings); | ||
2273 | if (err) | 2299 | if (err) |
2274 | return err; | 2300 | return err; |
2275 | 2301 | ||
@@ -2943,9 +2969,13 @@ static void qlcnic_dump_tx_rings(struct qlcnic_adapter *adapter) | |||
2943 | tx_ring->tx_stats.xmit_called, | 2969 | tx_ring->tx_stats.xmit_called, |
2944 | tx_ring->tx_stats.xmit_on, | 2970 | tx_ring->tx_stats.xmit_on, |
2945 | tx_ring->tx_stats.xmit_off); | 2971 | tx_ring->tx_stats.xmit_off); |
2972 | |||
2973 | if (tx_ring->crb_intr_mask) | ||
2974 | netdev_info(netdev, "crb_intr_mask=%d\n", | ||
2975 | readl(tx_ring->crb_intr_mask)); | ||
2976 | |||
2946 | netdev_info(netdev, | 2977 | netdev_info(netdev, |
2947 | "crb_intr_mask=%d, hw_producer=%d, sw_producer=%d sw_consumer=%d, hw_consumer=%d\n", | 2978 | "hw_producer=%d, sw_producer=%d sw_consumer=%d, hw_consumer=%d\n", |
2948 | readl(tx_ring->crb_intr_mask), | ||
2949 | readl(tx_ring->crb_cmd_producer), | 2979 | readl(tx_ring->crb_cmd_producer), |
2950 | tx_ring->producer, tx_ring->sw_consumer, | 2980 | tx_ring->producer, tx_ring->sw_consumer, |
2951 | le32_to_cpu(*(tx_ring->hw_consumer))); | 2981 | le32_to_cpu(*(tx_ring->hw_consumer))); |
@@ -3978,12 +4008,21 @@ int qlcnic_validate_rings(struct qlcnic_adapter *adapter, __u32 ring_cnt, | |||
3978 | int qlcnic_setup_rings(struct qlcnic_adapter *adapter) | 4008 | int qlcnic_setup_rings(struct qlcnic_adapter *adapter) |
3979 | { | 4009 | { |
3980 | struct net_device *netdev = adapter->netdev; | 4010 | struct net_device *netdev = adapter->netdev; |
4011 | u8 tx_rings, rx_rings; | ||
3981 | int err; | 4012 | int err; |
3982 | 4013 | ||
3983 | if (test_bit(__QLCNIC_RESETTING, &adapter->state)) | 4014 | if (test_bit(__QLCNIC_RESETTING, &adapter->state)) |
3984 | return -EBUSY; | 4015 | return -EBUSY; |
3985 | 4016 | ||
4017 | tx_rings = adapter->drv_tss_rings; | ||
4018 | rx_rings = adapter->drv_rss_rings; | ||
4019 | |||
3986 | netif_device_detach(netdev); | 4020 | netif_device_detach(netdev); |
4021 | |||
4022 | err = qlcnic_set_real_num_queues(adapter, tx_rings, rx_rings); | ||
4023 | if (err) | ||
4024 | goto done; | ||
4025 | |||
3987 | if (netif_running(netdev)) | 4026 | if (netif_running(netdev)) |
3988 | __qlcnic_down(adapter, netdev); | 4027 | __qlcnic_down(adapter, netdev); |
3989 | 4028 | ||
@@ -4003,7 +4042,17 @@ int qlcnic_setup_rings(struct qlcnic_adapter *adapter) | |||
4003 | return err; | 4042 | return err; |
4004 | } | 4043 | } |
4005 | 4044 | ||
4006 | netif_set_real_num_tx_queues(netdev, adapter->drv_tx_rings); | 4045 | /* Check if we need to update real_num_{tx|rx}_queues because |
4046 | * qlcnic_setup_intr() may change Tx/Rx rings size | ||
4047 | */ | ||
4048 | if ((tx_rings != adapter->drv_tx_rings) || | ||
4049 | (rx_rings != adapter->drv_sds_rings)) { | ||
4050 | err = qlcnic_set_real_num_queues(adapter, | ||
4051 | adapter->drv_tx_rings, | ||
4052 | adapter->drv_sds_rings); | ||
4053 | if (err) | ||
4054 | goto done; | ||
4055 | } | ||
4007 | 4056 | ||
4008 | if (qlcnic_83xx_check(adapter)) { | 4057 | if (qlcnic_83xx_check(adapter)) { |
4009 | qlcnic_83xx_initialize_nic(adapter, 1); | 4058 | qlcnic_83xx_initialize_nic(adapter, 1); |
diff --git a/drivers/net/ethernet/sfc/nic.c b/drivers/net/ethernet/sfc/nic.c index 32d969e857f7..89b83e59e1dc 100644 --- a/drivers/net/ethernet/sfc/nic.c +++ b/drivers/net/ethernet/sfc/nic.c | |||
@@ -156,13 +156,15 @@ void efx_nic_fini_interrupt(struct efx_nic *efx) | |||
156 | efx->net_dev->rx_cpu_rmap = NULL; | 156 | efx->net_dev->rx_cpu_rmap = NULL; |
157 | #endif | 157 | #endif |
158 | 158 | ||
159 | /* Disable MSI/MSI-X interrupts */ | 159 | if (EFX_INT_MODE_USE_MSI(efx)) { |
160 | efx_for_each_channel(channel, efx) | 160 | /* Disable MSI/MSI-X interrupts */ |
161 | free_irq(channel->irq, &efx->msi_context[channel->channel]); | 161 | efx_for_each_channel(channel, efx) |
162 | 162 | free_irq(channel->irq, | |
163 | /* Disable legacy interrupt */ | 163 | &efx->msi_context[channel->channel]); |
164 | if (efx->legacy_irq) | 164 | } else { |
165 | /* Disable legacy interrupt */ | ||
165 | free_irq(efx->legacy_irq, efx); | 166 | free_irq(efx->legacy_irq, efx); |
167 | } | ||
166 | } | 168 | } |
167 | 169 | ||
168 | /* Register dump */ | 170 | /* Register dump */ |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index d940034acdd4..0f4841d2e8dc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | |||
@@ -1704,7 +1704,7 @@ static int stmmac_open(struct net_device *dev) | |||
1704 | if (ret) { | 1704 | if (ret) { |
1705 | pr_err("%s: Cannot attach to PHY (error: %d)\n", | 1705 | pr_err("%s: Cannot attach to PHY (error: %d)\n", |
1706 | __func__, ret); | 1706 | __func__, ret); |
1707 | goto phy_error; | 1707 | return ret; |
1708 | } | 1708 | } |
1709 | } | 1709 | } |
1710 | 1710 | ||
@@ -1779,8 +1779,6 @@ init_error: | |||
1779 | dma_desc_error: | 1779 | dma_desc_error: |
1780 | if (priv->phydev) | 1780 | if (priv->phydev) |
1781 | phy_disconnect(priv->phydev); | 1781 | phy_disconnect(priv->phydev); |
1782 | phy_error: | ||
1783 | clk_disable_unprepare(priv->stmmac_clk); | ||
1784 | 1782 | ||
1785 | return ret; | 1783 | return ret; |
1786 | } | 1784 | } |
diff --git a/drivers/net/ethernet/sun/cassini.c b/drivers/net/ethernet/sun/cassini.c index df8d383acf48..b9ac20f42651 100644 --- a/drivers/net/ethernet/sun/cassini.c +++ b/drivers/net/ethernet/sun/cassini.c | |||
@@ -246,7 +246,7 @@ static inline void cas_lock_tx(struct cas *cp) | |||
246 | int i; | 246 | int i; |
247 | 247 | ||
248 | for (i = 0; i < N_TX_RINGS; i++) | 248 | for (i = 0; i < N_TX_RINGS; i++) |
249 | spin_lock(&cp->tx_lock[i]); | 249 | spin_lock_nested(&cp->tx_lock[i], i); |
250 | } | 250 | } |
251 | 251 | ||
252 | static inline void cas_lock_all(struct cas *cp) | 252 | static inline void cas_lock_all(struct cas *cp) |
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 36aa109416c4..c331b7ebc812 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c | |||
@@ -1871,18 +1871,13 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data, | |||
1871 | mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); | 1871 | mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); |
1872 | phyid = be32_to_cpup(parp+1); | 1872 | phyid = be32_to_cpup(parp+1); |
1873 | mdio = of_find_device_by_node(mdio_node); | 1873 | mdio = of_find_device_by_node(mdio_node); |
1874 | 1874 | of_node_put(mdio_node); | |
1875 | if (strncmp(mdio->name, "gpio", 4) == 0) { | 1875 | if (!mdio) { |
1876 | /* GPIO bitbang MDIO driver attached */ | 1876 | pr_err("Missing mdio platform device\n"); |
1877 | struct mii_bus *bus = dev_get_drvdata(&mdio->dev); | 1877 | return -EINVAL; |
1878 | |||
1879 | snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), | ||
1880 | PHY_ID_FMT, bus->id, phyid); | ||
1881 | } else { | ||
1882 | /* davinci MDIO driver attached */ | ||
1883 | snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), | ||
1884 | PHY_ID_FMT, mdio->name, phyid); | ||
1885 | } | 1878 | } |
1879 | snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), | ||
1880 | PHY_ID_FMT, mdio->name, phyid); | ||
1886 | 1881 | ||
1887 | mac_addr = of_get_mac_address(slave_node); | 1882 | mac_addr = of_get_mac_address(slave_node); |
1888 | if (mac_addr) | 1883 | if (mac_addr) |
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c index b0e2865a6810..d53e299ae1d9 100644 --- a/drivers/net/macvlan.c +++ b/drivers/net/macvlan.c | |||
@@ -458,8 +458,10 @@ static void macvlan_change_rx_flags(struct net_device *dev, int change) | |||
458 | struct macvlan_dev *vlan = netdev_priv(dev); | 458 | struct macvlan_dev *vlan = netdev_priv(dev); |
459 | struct net_device *lowerdev = vlan->lowerdev; | 459 | struct net_device *lowerdev = vlan->lowerdev; |
460 | 460 | ||
461 | if (change & IFF_ALLMULTI) | 461 | if (dev->flags & IFF_UP) { |
462 | dev_set_allmulti(lowerdev, dev->flags & IFF_ALLMULTI ? 1 : -1); | 462 | if (change & IFF_ALLMULTI) |
463 | dev_set_allmulti(lowerdev, dev->flags & IFF_ALLMULTI ? 1 : -1); | ||
464 | } | ||
463 | } | 465 | } |
464 | 466 | ||
465 | static void macvlan_set_mac_lists(struct net_device *dev) | 467 | static void macvlan_set_mac_lists(struct net_device *dev) |
@@ -515,6 +517,11 @@ static struct lock_class_key macvlan_netdev_addr_lock_key; | |||
515 | #define MACVLAN_STATE_MASK \ | 517 | #define MACVLAN_STATE_MASK \ |
516 | ((1<<__LINK_STATE_NOCARRIER) | (1<<__LINK_STATE_DORMANT)) | 518 | ((1<<__LINK_STATE_NOCARRIER) | (1<<__LINK_STATE_DORMANT)) |
517 | 519 | ||
520 | static int macvlan_get_nest_level(struct net_device *dev) | ||
521 | { | ||
522 | return ((struct macvlan_dev *)netdev_priv(dev))->nest_level; | ||
523 | } | ||
524 | |||
518 | static void macvlan_set_lockdep_class_one(struct net_device *dev, | 525 | static void macvlan_set_lockdep_class_one(struct net_device *dev, |
519 | struct netdev_queue *txq, | 526 | struct netdev_queue *txq, |
520 | void *_unused) | 527 | void *_unused) |
@@ -525,8 +532,9 @@ static void macvlan_set_lockdep_class_one(struct net_device *dev, | |||
525 | 532 | ||
526 | static void macvlan_set_lockdep_class(struct net_device *dev) | 533 | static void macvlan_set_lockdep_class(struct net_device *dev) |
527 | { | 534 | { |
528 | lockdep_set_class(&dev->addr_list_lock, | 535 | lockdep_set_class_and_subclass(&dev->addr_list_lock, |
529 | &macvlan_netdev_addr_lock_key); | 536 | &macvlan_netdev_addr_lock_key, |
537 | macvlan_get_nest_level(dev)); | ||
530 | netdev_for_each_tx_queue(dev, macvlan_set_lockdep_class_one, NULL); | 538 | netdev_for_each_tx_queue(dev, macvlan_set_lockdep_class_one, NULL); |
531 | } | 539 | } |
532 | 540 | ||
@@ -721,6 +729,7 @@ static const struct net_device_ops macvlan_netdev_ops = { | |||
721 | .ndo_fdb_add = macvlan_fdb_add, | 729 | .ndo_fdb_add = macvlan_fdb_add, |
722 | .ndo_fdb_del = macvlan_fdb_del, | 730 | .ndo_fdb_del = macvlan_fdb_del, |
723 | .ndo_fdb_dump = ndo_dflt_fdb_dump, | 731 | .ndo_fdb_dump = ndo_dflt_fdb_dump, |
732 | .ndo_get_lock_subclass = macvlan_get_nest_level, | ||
724 | }; | 733 | }; |
725 | 734 | ||
726 | void macvlan_common_setup(struct net_device *dev) | 735 | void macvlan_common_setup(struct net_device *dev) |
@@ -849,6 +858,7 @@ int macvlan_common_newlink(struct net *src_net, struct net_device *dev, | |||
849 | vlan->dev = dev; | 858 | vlan->dev = dev; |
850 | vlan->port = port; | 859 | vlan->port = port; |
851 | vlan->set_features = MACVLAN_FEATURES; | 860 | vlan->set_features = MACVLAN_FEATURES; |
861 | vlan->nest_level = dev_get_nest_level(lowerdev, netif_is_macvlan) + 1; | ||
852 | 862 | ||
853 | vlan->mode = MACVLAN_MODE_VEPA; | 863 | vlan->mode = MACVLAN_MODE_VEPA; |
854 | if (data && data[IFLA_MACVLAN_MODE]) | 864 | if (data && data[IFLA_MACVLAN_MODE]) |
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c index 9c4defdec67b..5f1a2250018f 100644 --- a/drivers/net/phy/mdio-gpio.c +++ b/drivers/net/phy/mdio-gpio.c | |||
@@ -215,6 +215,10 @@ static int mdio_gpio_probe(struct platform_device *pdev) | |||
215 | if (pdev->dev.of_node) { | 215 | if (pdev->dev.of_node) { |
216 | pdata = mdio_gpio_of_get_data(pdev); | 216 | pdata = mdio_gpio_of_get_data(pdev); |
217 | bus_id = of_alias_get_id(pdev->dev.of_node, "mdio-gpio"); | 217 | bus_id = of_alias_get_id(pdev->dev.of_node, "mdio-gpio"); |
218 | if (bus_id < 0) { | ||
219 | dev_warn(&pdev->dev, "failed to get alias id\n"); | ||
220 | bus_id = 0; | ||
221 | } | ||
218 | } else { | 222 | } else { |
219 | pdata = dev_get_platdata(&pdev->dev); | 223 | pdata = dev_get_platdata(&pdev->dev); |
220 | bus_id = pdev->id; | 224 | bus_id = pdev->id; |
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index a972056b2249..3bc079a67a3d 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c | |||
@@ -715,7 +715,7 @@ void phy_state_machine(struct work_struct *work) | |||
715 | struct delayed_work *dwork = to_delayed_work(work); | 715 | struct delayed_work *dwork = to_delayed_work(work); |
716 | struct phy_device *phydev = | 716 | struct phy_device *phydev = |
717 | container_of(dwork, struct phy_device, state_queue); | 717 | container_of(dwork, struct phy_device, state_queue); |
718 | int needs_aneg = 0, do_suspend = 0; | 718 | bool needs_aneg = false, do_suspend = false, do_resume = false; |
719 | int err = 0; | 719 | int err = 0; |
720 | 720 | ||
721 | mutex_lock(&phydev->lock); | 721 | mutex_lock(&phydev->lock); |
@@ -727,7 +727,7 @@ void phy_state_machine(struct work_struct *work) | |||
727 | case PHY_PENDING: | 727 | case PHY_PENDING: |
728 | break; | 728 | break; |
729 | case PHY_UP: | 729 | case PHY_UP: |
730 | needs_aneg = 1; | 730 | needs_aneg = true; |
731 | 731 | ||
732 | phydev->link_timeout = PHY_AN_TIMEOUT; | 732 | phydev->link_timeout = PHY_AN_TIMEOUT; |
733 | 733 | ||
@@ -757,7 +757,7 @@ void phy_state_machine(struct work_struct *work) | |||
757 | phydev->adjust_link(phydev->attached_dev); | 757 | phydev->adjust_link(phydev->attached_dev); |
758 | 758 | ||
759 | } else if (0 == phydev->link_timeout--) | 759 | } else if (0 == phydev->link_timeout--) |
760 | needs_aneg = 1; | 760 | needs_aneg = true; |
761 | break; | 761 | break; |
762 | case PHY_NOLINK: | 762 | case PHY_NOLINK: |
763 | err = phy_read_status(phydev); | 763 | err = phy_read_status(phydev); |
@@ -791,7 +791,7 @@ void phy_state_machine(struct work_struct *work) | |||
791 | netif_carrier_on(phydev->attached_dev); | 791 | netif_carrier_on(phydev->attached_dev); |
792 | } else { | 792 | } else { |
793 | if (0 == phydev->link_timeout--) | 793 | if (0 == phydev->link_timeout--) |
794 | needs_aneg = 1; | 794 | needs_aneg = true; |
795 | } | 795 | } |
796 | 796 | ||
797 | phydev->adjust_link(phydev->attached_dev); | 797 | phydev->adjust_link(phydev->attached_dev); |
@@ -827,7 +827,7 @@ void phy_state_machine(struct work_struct *work) | |||
827 | phydev->link = 0; | 827 | phydev->link = 0; |
828 | netif_carrier_off(phydev->attached_dev); | 828 | netif_carrier_off(phydev->attached_dev); |
829 | phydev->adjust_link(phydev->attached_dev); | 829 | phydev->adjust_link(phydev->attached_dev); |
830 | do_suspend = 1; | 830 | do_suspend = true; |
831 | } | 831 | } |
832 | break; | 832 | break; |
833 | case PHY_RESUMING: | 833 | case PHY_RESUMING: |
@@ -876,6 +876,7 @@ void phy_state_machine(struct work_struct *work) | |||
876 | } | 876 | } |
877 | phydev->adjust_link(phydev->attached_dev); | 877 | phydev->adjust_link(phydev->attached_dev); |
878 | } | 878 | } |
879 | do_resume = true; | ||
879 | break; | 880 | break; |
880 | } | 881 | } |
881 | 882 | ||
@@ -883,9 +884,10 @@ void phy_state_machine(struct work_struct *work) | |||
883 | 884 | ||
884 | if (needs_aneg) | 885 | if (needs_aneg) |
885 | err = phy_start_aneg(phydev); | 886 | err = phy_start_aneg(phydev); |
886 | 887 | else if (do_suspend) | |
887 | if (do_suspend) | ||
888 | phy_suspend(phydev); | 888 | phy_suspend(phydev); |
889 | else if (do_resume) | ||
890 | phy_resume(phydev); | ||
889 | 891 | ||
890 | if (err < 0) | 892 | if (err < 0) |
891 | phy_error(phydev); | 893 | phy_error(phydev); |
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 0ce606624296..4987a1c6dc52 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c | |||
@@ -614,8 +614,8 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, | |||
614 | err = phy_init_hw(phydev); | 614 | err = phy_init_hw(phydev); |
615 | if (err) | 615 | if (err) |
616 | phy_detach(phydev); | 616 | phy_detach(phydev); |
617 | 617 | else | |
618 | phy_resume(phydev); | 618 | phy_resume(phydev); |
619 | 619 | ||
620 | return err; | 620 | return err; |
621 | } | 621 | } |
diff --git a/drivers/net/usb/cdc_mbim.c b/drivers/net/usb/cdc_mbim.c index c9f3281506af..2e025ddcef21 100644 --- a/drivers/net/usb/cdc_mbim.c +++ b/drivers/net/usb/cdc_mbim.c | |||
@@ -120,6 +120,16 @@ static void cdc_mbim_unbind(struct usbnet *dev, struct usb_interface *intf) | |||
120 | cdc_ncm_unbind(dev, intf); | 120 | cdc_ncm_unbind(dev, intf); |
121 | } | 121 | } |
122 | 122 | ||
123 | /* verify that the ethernet protocol is IPv4 or IPv6 */ | ||
124 | static bool is_ip_proto(__be16 proto) | ||
125 | { | ||
126 | switch (proto) { | ||
127 | case htons(ETH_P_IP): | ||
128 | case htons(ETH_P_IPV6): | ||
129 | return true; | ||
130 | } | ||
131 | return false; | ||
132 | } | ||
123 | 133 | ||
124 | static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags) | 134 | static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags) |
125 | { | 135 | { |
@@ -128,6 +138,7 @@ static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb | |||
128 | struct cdc_ncm_ctx *ctx = info->ctx; | 138 | struct cdc_ncm_ctx *ctx = info->ctx; |
129 | __le32 sign = cpu_to_le32(USB_CDC_MBIM_NDP16_IPS_SIGN); | 139 | __le32 sign = cpu_to_le32(USB_CDC_MBIM_NDP16_IPS_SIGN); |
130 | u16 tci = 0; | 140 | u16 tci = 0; |
141 | bool is_ip; | ||
131 | u8 *c; | 142 | u8 *c; |
132 | 143 | ||
133 | if (!ctx) | 144 | if (!ctx) |
@@ -137,25 +148,32 @@ static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb | |||
137 | if (skb->len <= ETH_HLEN) | 148 | if (skb->len <= ETH_HLEN) |
138 | goto error; | 149 | goto error; |
139 | 150 | ||
151 | /* Some applications using e.g. packet sockets will | ||
152 | * bypass the VLAN acceleration and create tagged | ||
153 | * ethernet frames directly. We primarily look for | ||
154 | * the accelerated out-of-band tag, but fall back if | ||
155 | * required | ||
156 | */ | ||
157 | skb_reset_mac_header(skb); | ||
158 | if (vlan_get_tag(skb, &tci) < 0 && skb->len > VLAN_ETH_HLEN && | ||
159 | __vlan_get_tag(skb, &tci) == 0) { | ||
160 | is_ip = is_ip_proto(vlan_eth_hdr(skb)->h_vlan_encapsulated_proto); | ||
161 | skb_pull(skb, VLAN_ETH_HLEN); | ||
162 | } else { | ||
163 | is_ip = is_ip_proto(eth_hdr(skb)->h_proto); | ||
164 | skb_pull(skb, ETH_HLEN); | ||
165 | } | ||
166 | |||
140 | /* mapping VLANs to MBIM sessions: | 167 | /* mapping VLANs to MBIM sessions: |
141 | * no tag => IPS session <0> | 168 | * no tag => IPS session <0> |
142 | * 1 - 255 => IPS session <vlanid> | 169 | * 1 - 255 => IPS session <vlanid> |
143 | * 256 - 511 => DSS session <vlanid - 256> | 170 | * 256 - 511 => DSS session <vlanid - 256> |
144 | * 512 - 4095 => unsupported, drop | 171 | * 512 - 4095 => unsupported, drop |
145 | */ | 172 | */ |
146 | vlan_get_tag(skb, &tci); | ||
147 | |||
148 | switch (tci & 0x0f00) { | 173 | switch (tci & 0x0f00) { |
149 | case 0x0000: /* VLAN ID 0 - 255 */ | 174 | case 0x0000: /* VLAN ID 0 - 255 */ |
150 | /* verify that datagram is IPv4 or IPv6 */ | 175 | if (!is_ip) |
151 | skb_reset_mac_header(skb); | ||
152 | switch (eth_hdr(skb)->h_proto) { | ||
153 | case htons(ETH_P_IP): | ||
154 | case htons(ETH_P_IPV6): | ||
155 | break; | ||
156 | default: | ||
157 | goto error; | 176 | goto error; |
158 | } | ||
159 | c = (u8 *)&sign; | 177 | c = (u8 *)&sign; |
160 | c[3] = tci; | 178 | c[3] = tci; |
161 | break; | 179 | break; |
@@ -169,7 +187,6 @@ static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb | |||
169 | "unsupported tci=0x%04x\n", tci); | 187 | "unsupported tci=0x%04x\n", tci); |
170 | goto error; | 188 | goto error; |
171 | } | 189 | } |
172 | skb_pull(skb, ETH_HLEN); | ||
173 | } | 190 | } |
174 | 191 | ||
175 | spin_lock_bh(&ctx->mtx); | 192 | spin_lock_bh(&ctx->mtx); |
@@ -204,17 +221,23 @@ static void do_neigh_solicit(struct usbnet *dev, u8 *buf, u16 tci) | |||
204 | return; | 221 | return; |
205 | 222 | ||
206 | /* need to send the NA on the VLAN dev, if any */ | 223 | /* need to send the NA on the VLAN dev, if any */ |
207 | if (tci) | 224 | rcu_read_lock(); |
225 | if (tci) { | ||
208 | netdev = __vlan_find_dev_deep(dev->net, htons(ETH_P_8021Q), | 226 | netdev = __vlan_find_dev_deep(dev->net, htons(ETH_P_8021Q), |
209 | tci); | 227 | tci); |
210 | else | 228 | if (!netdev) { |
229 | rcu_read_unlock(); | ||
230 | return; | ||
231 | } | ||
232 | } else { | ||
211 | netdev = dev->net; | 233 | netdev = dev->net; |
212 | if (!netdev) | 234 | } |
213 | return; | 235 | dev_hold(netdev); |
236 | rcu_read_unlock(); | ||
214 | 237 | ||
215 | in6_dev = in6_dev_get(netdev); | 238 | in6_dev = in6_dev_get(netdev); |
216 | if (!in6_dev) | 239 | if (!in6_dev) |
217 | return; | 240 | goto out; |
218 | is_router = !!in6_dev->cnf.forwarding; | 241 | is_router = !!in6_dev->cnf.forwarding; |
219 | in6_dev_put(in6_dev); | 242 | in6_dev_put(in6_dev); |
220 | 243 | ||
@@ -224,6 +247,8 @@ static void do_neigh_solicit(struct usbnet *dev, u8 *buf, u16 tci) | |||
224 | true /* solicited */, | 247 | true /* solicited */, |
225 | false /* override */, | 248 | false /* override */, |
226 | true /* inc_opt */); | 249 | true /* inc_opt */); |
250 | out: | ||
251 | dev_put(netdev); | ||
227 | } | 252 | } |
228 | 253 | ||
229 | static bool is_neigh_solicit(u8 *buf, size_t len) | 254 | static bool is_neigh_solicit(u8 *buf, size_t len) |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c index f46cd0250e48..5627917c5ff7 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c | |||
@@ -95,8 +95,10 @@ static void ath9k_htc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) | |||
95 | 95 | ||
96 | if ((vif->type == NL80211_IFTYPE_AP || | 96 | if ((vif->type == NL80211_IFTYPE_AP || |
97 | vif->type == NL80211_IFTYPE_MESH_POINT) && | 97 | vif->type == NL80211_IFTYPE_MESH_POINT) && |
98 | bss_conf->enable_beacon) | 98 | bss_conf->enable_beacon) { |
99 | priv->reconfig_beacon = true; | 99 | priv->reconfig_beacon = true; |
100 | priv->rearm_ani = true; | ||
101 | } | ||
100 | 102 | ||
101 | if (bss_conf->assoc) { | 103 | if (bss_conf->assoc) { |
102 | priv->rearm_ani = true; | 104 | priv->rearm_ani = true; |
@@ -257,6 +259,7 @@ static int ath9k_htc_set_channel(struct ath9k_htc_priv *priv, | |||
257 | 259 | ||
258 | ath9k_htc_ps_wakeup(priv); | 260 | ath9k_htc_ps_wakeup(priv); |
259 | 261 | ||
262 | ath9k_htc_stop_ani(priv); | ||
260 | del_timer_sync(&priv->tx.cleanup_timer); | 263 | del_timer_sync(&priv->tx.cleanup_timer); |
261 | ath9k_htc_tx_drain(priv); | 264 | ath9k_htc_tx_drain(priv); |
262 | 265 | ||
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c index afb3d15e38ff..be1985296bdc 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c | |||
@@ -4948,7 +4948,7 @@ static int brcmf_enable_bw40_2g(struct brcmf_if *ifp) | |||
4948 | if (!err) { | 4948 | if (!err) { |
4949 | /* only set 2G bandwidth using bw_cap command */ | 4949 | /* only set 2G bandwidth using bw_cap command */ |
4950 | band_bwcap.band = cpu_to_le32(WLC_BAND_2G); | 4950 | band_bwcap.band = cpu_to_le32(WLC_BAND_2G); |
4951 | band_bwcap.bw_cap = cpu_to_le32(WLC_BW_40MHZ_BIT); | 4951 | band_bwcap.bw_cap = cpu_to_le32(WLC_BW_CAP_40MHZ); |
4952 | err = brcmf_fil_iovar_data_set(ifp, "bw_cap", &band_bwcap, | 4952 | err = brcmf_fil_iovar_data_set(ifp, "bw_cap", &band_bwcap, |
4953 | sizeof(band_bwcap)); | 4953 | sizeof(band_bwcap)); |
4954 | } else { | 4954 | } else { |
diff --git a/drivers/net/wireless/iwlwifi/mvm/coex.c b/drivers/net/wireless/iwlwifi/mvm/coex.c index fa858d548d13..0489314425cb 100644 --- a/drivers/net/wireless/iwlwifi/mvm/coex.c +++ b/drivers/net/wireless/iwlwifi/mvm/coex.c | |||
@@ -611,14 +611,14 @@ int iwl_send_bt_init_conf(struct iwl_mvm *mvm) | |||
611 | bt_cmd->flags |= cpu_to_le32(BT_COEX_SYNC2SCO); | 611 | bt_cmd->flags |= cpu_to_le32(BT_COEX_SYNC2SCO); |
612 | 612 | ||
613 | if (IWL_MVM_BT_COEX_CORUNNING) { | 613 | if (IWL_MVM_BT_COEX_CORUNNING) { |
614 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_CORUN_LUT_20 | | 614 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_CORUN_LUT_20 | |
615 | BT_VALID_CORUN_LUT_40); | 615 | BT_VALID_CORUN_LUT_40); |
616 | bt_cmd->flags |= cpu_to_le32(BT_COEX_CORUNNING); | 616 | bt_cmd->flags |= cpu_to_le32(BT_COEX_CORUNNING); |
617 | } | 617 | } |
618 | 618 | ||
619 | if (IWL_MVM_BT_COEX_MPLUT) { | 619 | if (IWL_MVM_BT_COEX_MPLUT) { |
620 | bt_cmd->flags |= cpu_to_le32(BT_COEX_MPLUT); | 620 | bt_cmd->flags |= cpu_to_le32(BT_COEX_MPLUT); |
621 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_MULTI_PRIO_LUT); | 621 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_MULTI_PRIO_LUT); |
622 | } | 622 | } |
623 | 623 | ||
624 | if (mvm->cfg->bt_shared_single_ant) | 624 | if (mvm->cfg->bt_shared_single_ant) |
diff --git a/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h b/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h index 9426905de6b2..d73a89ecd78a 100644 --- a/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h +++ b/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h | |||
@@ -183,9 +183,9 @@ enum iwl_scan_type { | |||
183 | * this number of packets were received (typically 1) | 183 | * this number of packets were received (typically 1) |
184 | * @passive2active: is auto switching from passive to active during scan allowed | 184 | * @passive2active: is auto switching from passive to active during scan allowed |
185 | * @rxchain_sel_flags: RXON_RX_CHAIN_* | 185 | * @rxchain_sel_flags: RXON_RX_CHAIN_* |
186 | * @max_out_time: in usecs, max out of serving channel time | 186 | * @max_out_time: in TUs, max out of serving channel time |
187 | * @suspend_time: how long to pause scan when returning to service channel: | 187 | * @suspend_time: how long to pause scan when returning to service channel: |
188 | * bits 0-19: beacon interal in usecs (suspend before executing) | 188 | * bits 0-19: beacon interal in TUs (suspend before executing) |
189 | * bits 20-23: reserved | 189 | * bits 20-23: reserved |
190 | * bits 24-31: number of beacons (suspend between channels) | 190 | * bits 24-31: number of beacons (suspend between channels) |
191 | * @rxon_flags: RXON_FLG_* | 191 | * @rxon_flags: RXON_FLG_* |
@@ -383,8 +383,8 @@ enum scan_framework_client { | |||
383 | * @quiet_plcp_th: quiet channel num of packets threshold | 383 | * @quiet_plcp_th: quiet channel num of packets threshold |
384 | * @good_CRC_th: passive to active promotion threshold | 384 | * @good_CRC_th: passive to active promotion threshold |
385 | * @rx_chain: RXON rx chain. | 385 | * @rx_chain: RXON rx chain. |
386 | * @max_out_time: max uSec to be out of assoceated channel | 386 | * @max_out_time: max TUs to be out of assoceated channel |
387 | * @suspend_time: pause scan this long when returning to service channel | 387 | * @suspend_time: pause scan this TUs when returning to service channel |
388 | * @flags: RXON flags | 388 | * @flags: RXON flags |
389 | * @filter_flags: RXONfilter | 389 | * @filter_flags: RXONfilter |
390 | * @tx_cmd: tx command for active scan; for 2GHz and for 5GHz. | 390 | * @tx_cmd: tx command for active scan; for 2GHz and for 5GHz. |
diff --git a/drivers/net/wireless/iwlwifi/mvm/mac80211.c b/drivers/net/wireless/iwlwifi/mvm/mac80211.c index f0cebf12c7b8..b41dc84e9431 100644 --- a/drivers/net/wireless/iwlwifi/mvm/mac80211.c +++ b/drivers/net/wireless/iwlwifi/mvm/mac80211.c | |||
@@ -1007,7 +1007,7 @@ static void iwl_mvm_mc_iface_iterator(void *_data, u8 *mac, | |||
1007 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); | 1007 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
1008 | len = roundup(sizeof(*cmd) + cmd->count * ETH_ALEN, 4); | 1008 | len = roundup(sizeof(*cmd) + cmd->count * ETH_ALEN, 4); |
1009 | 1009 | ||
1010 | ret = iwl_mvm_send_cmd_pdu(mvm, MCAST_FILTER_CMD, CMD_SYNC, len, cmd); | 1010 | ret = iwl_mvm_send_cmd_pdu(mvm, MCAST_FILTER_CMD, CMD_ASYNC, len, cmd); |
1011 | if (ret) | 1011 | if (ret) |
1012 | IWL_ERR(mvm, "mcast filter cmd error. ret=%d\n", ret); | 1012 | IWL_ERR(mvm, "mcast filter cmd error. ret=%d\n", ret); |
1013 | } | 1013 | } |
@@ -1023,7 +1023,7 @@ static void iwl_mvm_recalc_multicast(struct iwl_mvm *mvm) | |||
1023 | if (WARN_ON_ONCE(!mvm->mcast_filter_cmd)) | 1023 | if (WARN_ON_ONCE(!mvm->mcast_filter_cmd)) |
1024 | return; | 1024 | return; |
1025 | 1025 | ||
1026 | ieee80211_iterate_active_interfaces( | 1026 | ieee80211_iterate_active_interfaces_atomic( |
1027 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | 1027 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, |
1028 | iwl_mvm_mc_iface_iterator, &iter_data); | 1028 | iwl_mvm_mc_iface_iterator, &iter_data); |
1029 | } | 1029 | } |
@@ -1807,6 +1807,11 @@ static int iwl_mvm_mac_sched_scan_start(struct ieee80211_hw *hw, | |||
1807 | 1807 | ||
1808 | mutex_lock(&mvm->mutex); | 1808 | mutex_lock(&mvm->mutex); |
1809 | 1809 | ||
1810 | if (!iwl_mvm_is_idle(mvm)) { | ||
1811 | ret = -EBUSY; | ||
1812 | goto out; | ||
1813 | } | ||
1814 | |||
1810 | switch (mvm->scan_status) { | 1815 | switch (mvm->scan_status) { |
1811 | case IWL_MVM_SCAN_OS: | 1816 | case IWL_MVM_SCAN_OS: |
1812 | IWL_DEBUG_SCAN(mvm, "Stopping previous scan for sched_scan\n"); | 1817 | IWL_DEBUG_SCAN(mvm, "Stopping previous scan for sched_scan\n"); |
diff --git a/drivers/net/wireless/iwlwifi/mvm/mvm.h b/drivers/net/wireless/iwlwifi/mvm/mvm.h index d564233a65da..f1ec0986c3c9 100644 --- a/drivers/net/wireless/iwlwifi/mvm/mvm.h +++ b/drivers/net/wireless/iwlwifi/mvm/mvm.h | |||
@@ -1003,6 +1003,9 @@ static inline bool iwl_mvm_vif_low_latency(struct iwl_mvm_vif *mvmvif) | |||
1003 | return mvmvif->low_latency; | 1003 | return mvmvif->low_latency; |
1004 | } | 1004 | } |
1005 | 1005 | ||
1006 | /* Assoc status */ | ||
1007 | bool iwl_mvm_is_idle(struct iwl_mvm *mvm); | ||
1008 | |||
1006 | /* Thermal management and CT-kill */ | 1009 | /* Thermal management and CT-kill */ |
1007 | void iwl_mvm_tt_tx_backoff(struct iwl_mvm *mvm, u32 backoff); | 1010 | void iwl_mvm_tt_tx_backoff(struct iwl_mvm *mvm, u32 backoff); |
1008 | void iwl_mvm_tt_handler(struct iwl_mvm *mvm); | 1011 | void iwl_mvm_tt_handler(struct iwl_mvm *mvm); |
diff --git a/drivers/net/wireless/iwlwifi/mvm/rs.c b/drivers/net/wireless/iwlwifi/mvm/rs.c index 9f52c5b3f0ec..e1c838899363 100644 --- a/drivers/net/wireless/iwlwifi/mvm/rs.c +++ b/drivers/net/wireless/iwlwifi/mvm/rs.c | |||
@@ -1010,7 +1010,7 @@ static void rs_tx_status(void *mvm_r, struct ieee80211_supported_band *sband, | |||
1010 | return; | 1010 | return; |
1011 | } | 1011 | } |
1012 | 1012 | ||
1013 | #ifdef CPTCFG_MAC80211_DEBUGFS | 1013 | #ifdef CONFIG_MAC80211_DEBUGFS |
1014 | /* Disable last tx check if we are debugging with fixed rate */ | 1014 | /* Disable last tx check if we are debugging with fixed rate */ |
1015 | if (lq_sta->dbg_fixed_rate) { | 1015 | if (lq_sta->dbg_fixed_rate) { |
1016 | IWL_DEBUG_RATE(mvm, "Fixed rate. avoid rate scaling\n"); | 1016 | IWL_DEBUG_RATE(mvm, "Fixed rate. avoid rate scaling\n"); |
diff --git a/drivers/net/wireless/iwlwifi/mvm/scan.c b/drivers/net/wireless/iwlwifi/mvm/scan.c index c91dc8498852..c28de54c75d4 100644 --- a/drivers/net/wireless/iwlwifi/mvm/scan.c +++ b/drivers/net/wireless/iwlwifi/mvm/scan.c | |||
@@ -277,51 +277,22 @@ static void iwl_mvm_scan_calc_params(struct iwl_mvm *mvm, | |||
277 | IEEE80211_IFACE_ITER_NORMAL, | 277 | IEEE80211_IFACE_ITER_NORMAL, |
278 | iwl_mvm_scan_condition_iterator, | 278 | iwl_mvm_scan_condition_iterator, |
279 | &global_bound); | 279 | &global_bound); |
280 | /* | ||
281 | * Under low latency traffic passive scan is fragmented meaning | ||
282 | * that dwell on a particular channel will be fragmented. Each fragment | ||
283 | * dwell time is 20ms and fragments period is 105ms. Skipping to next | ||
284 | * channel will be delayed by the same period - 105ms. So suspend_time | ||
285 | * parameter describing both fragments and channels skipping periods is | ||
286 | * set to 105ms. This value is chosen so that overall passive scan | ||
287 | * duration will not be too long. Max_out_time in this case is set to | ||
288 | * 70ms, so for active scanning operating channel will be left for 70ms | ||
289 | * while for passive still for 20ms (fragment dwell). | ||
290 | */ | ||
291 | if (global_bound) { | ||
292 | if (!iwl_mvm_low_latency(mvm)) { | ||
293 | params->suspend_time = ieee80211_tu_to_usec(100); | ||
294 | params->max_out_time = ieee80211_tu_to_usec(600); | ||
295 | } else { | ||
296 | params->suspend_time = ieee80211_tu_to_usec(105); | ||
297 | /* P2P doesn't support fragmented passive scan, so | ||
298 | * configure max_out_time to be at least longest dwell | ||
299 | * time for passive scan. | ||
300 | */ | ||
301 | if (vif->type == NL80211_IFTYPE_STATION && !vif->p2p) { | ||
302 | params->max_out_time = ieee80211_tu_to_usec(70); | ||
303 | params->passive_fragmented = true; | ||
304 | } else { | ||
305 | u32 passive_dwell; | ||
306 | 280 | ||
307 | /* | 281 | if (!global_bound) |
308 | * Use band G so that passive channel dwell time | 282 | goto not_bound; |
309 | * will be assigned with maximum value. | 283 | |
310 | */ | 284 | params->suspend_time = 100; |
311 | band = IEEE80211_BAND_2GHZ; | 285 | params->max_out_time = 600; |
312 | passive_dwell = iwl_mvm_get_passive_dwell(band); | 286 | |
313 | params->max_out_time = | 287 | if (iwl_mvm_low_latency(mvm)) { |
314 | ieee80211_tu_to_usec(passive_dwell); | 288 | params->suspend_time = 250; |
315 | } | 289 | params->max_out_time = 250; |
316 | } | ||
317 | } | 290 | } |
318 | 291 | ||
292 | not_bound: | ||
293 | |||
319 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { | 294 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { |
320 | if (params->passive_fragmented) | 295 | params->dwell[band].passive = iwl_mvm_get_passive_dwell(band); |
321 | params->dwell[band].passive = 20; | ||
322 | else | ||
323 | params->dwell[band].passive = | ||
324 | iwl_mvm_get_passive_dwell(band); | ||
325 | params->dwell[band].active = iwl_mvm_get_active_dwell(band, | 296 | params->dwell[band].active = iwl_mvm_get_active_dwell(band, |
326 | n_ssids); | 297 | n_ssids); |
327 | } | 298 | } |
@@ -761,7 +732,7 @@ int iwl_mvm_config_sched_scan(struct iwl_mvm *mvm, | |||
761 | int band_2ghz = mvm->nvm_data->bands[IEEE80211_BAND_2GHZ].n_channels; | 732 | int band_2ghz = mvm->nvm_data->bands[IEEE80211_BAND_2GHZ].n_channels; |
762 | int band_5ghz = mvm->nvm_data->bands[IEEE80211_BAND_5GHZ].n_channels; | 733 | int band_5ghz = mvm->nvm_data->bands[IEEE80211_BAND_5GHZ].n_channels; |
763 | int head = 0; | 734 | int head = 0; |
764 | int tail = band_2ghz + band_5ghz; | 735 | int tail = band_2ghz + band_5ghz - 1; |
765 | u32 ssid_bitmap; | 736 | u32 ssid_bitmap; |
766 | int cmd_len; | 737 | int cmd_len; |
767 | int ret; | 738 | int ret; |
diff --git a/drivers/net/wireless/iwlwifi/mvm/utils.c b/drivers/net/wireless/iwlwifi/mvm/utils.c index d619851745a1..2180902266ae 100644 --- a/drivers/net/wireless/iwlwifi/mvm/utils.c +++ b/drivers/net/wireless/iwlwifi/mvm/utils.c | |||
@@ -644,3 +644,22 @@ bool iwl_mvm_low_latency(struct iwl_mvm *mvm) | |||
644 | 644 | ||
645 | return result; | 645 | return result; |
646 | } | 646 | } |
647 | |||
648 | static void iwl_mvm_idle_iter(void *_data, u8 *mac, struct ieee80211_vif *vif) | ||
649 | { | ||
650 | bool *idle = _data; | ||
651 | |||
652 | if (!vif->bss_conf.idle) | ||
653 | *idle = false; | ||
654 | } | ||
655 | |||
656 | bool iwl_mvm_is_idle(struct iwl_mvm *mvm) | ||
657 | { | ||
658 | bool idle = true; | ||
659 | |||
660 | ieee80211_iterate_active_interfaces_atomic( | ||
661 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | ||
662 | iwl_mvm_idle_iter, &idle); | ||
663 | |||
664 | return idle; | ||
665 | } | ||
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c index dcfd6d866d09..2365553f1ef7 100644 --- a/drivers/net/wireless/iwlwifi/pcie/trans.c +++ b/drivers/net/wireless/iwlwifi/pcie/trans.c | |||
@@ -1749,6 +1749,10 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, | |||
1749 | * PCI Tx retries from interfering with C3 CPU state */ | 1749 | * PCI Tx retries from interfering with C3 CPU state */ |
1750 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); | 1750 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); |
1751 | 1751 | ||
1752 | trans->dev = &pdev->dev; | ||
1753 | trans_pcie->pci_dev = pdev; | ||
1754 | iwl_disable_interrupts(trans); | ||
1755 | |||
1752 | err = pci_enable_msi(pdev); | 1756 | err = pci_enable_msi(pdev); |
1753 | if (err) { | 1757 | if (err) { |
1754 | dev_err(&pdev->dev, "pci_enable_msi failed(0X%x)\n", err); | 1758 | dev_err(&pdev->dev, "pci_enable_msi failed(0X%x)\n", err); |
@@ -1760,8 +1764,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, | |||
1760 | } | 1764 | } |
1761 | } | 1765 | } |
1762 | 1766 | ||
1763 | trans->dev = &pdev->dev; | ||
1764 | trans_pcie->pci_dev = pdev; | ||
1765 | trans->hw_rev = iwl_read32(trans, CSR_HW_REV); | 1767 | trans->hw_rev = iwl_read32(trans, CSR_HW_REV); |
1766 | trans->hw_id = (pdev->device << 16) + pdev->subsystem_device; | 1768 | trans->hw_id = (pdev->device << 16) + pdev->subsystem_device; |
1767 | snprintf(trans->hw_id_str, sizeof(trans->hw_id_str), | 1769 | snprintf(trans->hw_id_str, sizeof(trans->hw_id_str), |
@@ -1787,8 +1789,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, | |||
1787 | goto out_pci_disable_msi; | 1789 | goto out_pci_disable_msi; |
1788 | } | 1790 | } |
1789 | 1791 | ||
1790 | trans_pcie->inta_mask = CSR_INI_SET_MASK; | ||
1791 | |||
1792 | if (iwl_pcie_alloc_ict(trans)) | 1792 | if (iwl_pcie_alloc_ict(trans)) |
1793 | goto out_free_cmd_pool; | 1793 | goto out_free_cmd_pool; |
1794 | 1794 | ||
@@ -1800,6 +1800,8 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, | |||
1800 | goto out_free_ict; | 1800 | goto out_free_ict; |
1801 | } | 1801 | } |
1802 | 1802 | ||
1803 | trans_pcie->inta_mask = CSR_INI_SET_MASK; | ||
1804 | |||
1803 | return trans; | 1805 | return trans; |
1804 | 1806 | ||
1805 | out_free_ict: | 1807 | out_free_ict: |
diff --git a/drivers/net/xen-netback/common.h b/drivers/net/xen-netback/common.h index 630a3fcf65bc..0d4a285cbd7e 100644 --- a/drivers/net/xen-netback/common.h +++ b/drivers/net/xen-netback/common.h | |||
@@ -226,7 +226,7 @@ int xenvif_map_frontend_rings(struct xenvif *vif, | |||
226 | grant_ref_t rx_ring_ref); | 226 | grant_ref_t rx_ring_ref); |
227 | 227 | ||
228 | /* Check for SKBs from frontend and schedule backend processing */ | 228 | /* Check for SKBs from frontend and schedule backend processing */ |
229 | void xenvif_check_rx_xenvif(struct xenvif *vif); | 229 | void xenvif_napi_schedule_or_enable_events(struct xenvif *vif); |
230 | 230 | ||
231 | /* Prevent the device from generating any further traffic. */ | 231 | /* Prevent the device from generating any further traffic. */ |
232 | void xenvif_carrier_off(struct xenvif *vif); | 232 | void xenvif_carrier_off(struct xenvif *vif); |
diff --git a/drivers/net/xen-netback/interface.c b/drivers/net/xen-netback/interface.c index ef05c5c49d41..20e9defa1060 100644 --- a/drivers/net/xen-netback/interface.c +++ b/drivers/net/xen-netback/interface.c | |||
@@ -75,32 +75,8 @@ static int xenvif_poll(struct napi_struct *napi, int budget) | |||
75 | work_done = xenvif_tx_action(vif, budget); | 75 | work_done = xenvif_tx_action(vif, budget); |
76 | 76 | ||
77 | if (work_done < budget) { | 77 | if (work_done < budget) { |
78 | int more_to_do = 0; | 78 | napi_complete(napi); |
79 | unsigned long flags; | 79 | xenvif_napi_schedule_or_enable_events(vif); |
80 | |||
81 | /* It is necessary to disable IRQ before calling | ||
82 | * RING_HAS_UNCONSUMED_REQUESTS. Otherwise we might | ||
83 | * lose event from the frontend. | ||
84 | * | ||
85 | * Consider: | ||
86 | * RING_HAS_UNCONSUMED_REQUESTS | ||
87 | * <frontend generates event to trigger napi_schedule> | ||
88 | * __napi_complete | ||
89 | * | ||
90 | * This handler is still in scheduled state so the | ||
91 | * event has no effect at all. After __napi_complete | ||
92 | * this handler is descheduled and cannot get | ||
93 | * scheduled again. We lose event in this case and the ring | ||
94 | * will be completely stalled. | ||
95 | */ | ||
96 | |||
97 | local_irq_save(flags); | ||
98 | |||
99 | RING_FINAL_CHECK_FOR_REQUESTS(&vif->tx, more_to_do); | ||
100 | if (!more_to_do) | ||
101 | __napi_complete(napi); | ||
102 | |||
103 | local_irq_restore(flags); | ||
104 | } | 80 | } |
105 | 81 | ||
106 | return work_done; | 82 | return work_done; |
@@ -194,7 +170,7 @@ static void xenvif_up(struct xenvif *vif) | |||
194 | enable_irq(vif->tx_irq); | 170 | enable_irq(vif->tx_irq); |
195 | if (vif->tx_irq != vif->rx_irq) | 171 | if (vif->tx_irq != vif->rx_irq) |
196 | enable_irq(vif->rx_irq); | 172 | enable_irq(vif->rx_irq); |
197 | xenvif_check_rx_xenvif(vif); | 173 | xenvif_napi_schedule_or_enable_events(vif); |
198 | } | 174 | } |
199 | 175 | ||
200 | static void xenvif_down(struct xenvif *vif) | 176 | static void xenvif_down(struct xenvif *vif) |
diff --git a/drivers/net/xen-netback/netback.c b/drivers/net/xen-netback/netback.c index 76665405c5aa..7367208ee8cd 100644 --- a/drivers/net/xen-netback/netback.c +++ b/drivers/net/xen-netback/netback.c | |||
@@ -104,7 +104,7 @@ static inline unsigned long idx_to_kaddr(struct xenvif *vif, | |||
104 | 104 | ||
105 | /* Find the containing VIF's structure from a pointer in pending_tx_info array | 105 | /* Find the containing VIF's structure from a pointer in pending_tx_info array |
106 | */ | 106 | */ |
107 | static inline struct xenvif* ubuf_to_vif(struct ubuf_info *ubuf) | 107 | static inline struct xenvif *ubuf_to_vif(const struct ubuf_info *ubuf) |
108 | { | 108 | { |
109 | u16 pending_idx = ubuf->desc; | 109 | u16 pending_idx = ubuf->desc; |
110 | struct pending_tx_info *temp = | 110 | struct pending_tx_info *temp = |
@@ -323,6 +323,35 @@ static void xenvif_gop_frag_copy(struct xenvif *vif, struct sk_buff *skb, | |||
323 | } | 323 | } |
324 | 324 | ||
325 | /* | 325 | /* |
326 | * Find the grant ref for a given frag in a chain of struct ubuf_info's | ||
327 | * skb: the skb itself | ||
328 | * i: the frag's number | ||
329 | * ubuf: a pointer to an element in the chain. It should not be NULL | ||
330 | * | ||
331 | * Returns a pointer to the element in the chain where the page were found. If | ||
332 | * not found, returns NULL. | ||
333 | * See the definition of callback_struct in common.h for more details about | ||
334 | * the chain. | ||
335 | */ | ||
336 | static const struct ubuf_info *xenvif_find_gref(const struct sk_buff *const skb, | ||
337 | const int i, | ||
338 | const struct ubuf_info *ubuf) | ||
339 | { | ||
340 | struct xenvif *foreign_vif = ubuf_to_vif(ubuf); | ||
341 | |||
342 | do { | ||
343 | u16 pending_idx = ubuf->desc; | ||
344 | |||
345 | if (skb_shinfo(skb)->frags[i].page.p == | ||
346 | foreign_vif->mmap_pages[pending_idx]) | ||
347 | break; | ||
348 | ubuf = (struct ubuf_info *) ubuf->ctx; | ||
349 | } while (ubuf); | ||
350 | |||
351 | return ubuf; | ||
352 | } | ||
353 | |||
354 | /* | ||
326 | * Prepare an SKB to be transmitted to the frontend. | 355 | * Prepare an SKB to be transmitted to the frontend. |
327 | * | 356 | * |
328 | * This function is responsible for allocating grant operations, meta | 357 | * This function is responsible for allocating grant operations, meta |
@@ -346,9 +375,8 @@ static int xenvif_gop_skb(struct sk_buff *skb, | |||
346 | int head = 1; | 375 | int head = 1; |
347 | int old_meta_prod; | 376 | int old_meta_prod; |
348 | int gso_type; | 377 | int gso_type; |
349 | struct ubuf_info *ubuf = skb_shinfo(skb)->destructor_arg; | 378 | const struct ubuf_info *ubuf = skb_shinfo(skb)->destructor_arg; |
350 | grant_ref_t foreign_grefs[MAX_SKB_FRAGS]; | 379 | const struct ubuf_info *const head_ubuf = ubuf; |
351 | struct xenvif *foreign_vif = NULL; | ||
352 | 380 | ||
353 | old_meta_prod = npo->meta_prod; | 381 | old_meta_prod = npo->meta_prod; |
354 | 382 | ||
@@ -386,19 +414,6 @@ static int xenvif_gop_skb(struct sk_buff *skb, | |||
386 | npo->copy_off = 0; | 414 | npo->copy_off = 0; |
387 | npo->copy_gref = req->gref; | 415 | npo->copy_gref = req->gref; |
388 | 416 | ||
389 | if ((skb_shinfo(skb)->tx_flags & SKBTX_DEV_ZEROCOPY) && | ||
390 | (ubuf->callback == &xenvif_zerocopy_callback)) { | ||
391 | int i = 0; | ||
392 | foreign_vif = ubuf_to_vif(ubuf); | ||
393 | |||
394 | do { | ||
395 | u16 pending_idx = ubuf->desc; | ||
396 | foreign_grefs[i++] = | ||
397 | foreign_vif->pending_tx_info[pending_idx].req.gref; | ||
398 | ubuf = (struct ubuf_info *) ubuf->ctx; | ||
399 | } while (ubuf); | ||
400 | } | ||
401 | |||
402 | data = skb->data; | 417 | data = skb->data; |
403 | while (data < skb_tail_pointer(skb)) { | 418 | while (data < skb_tail_pointer(skb)) { |
404 | unsigned int offset = offset_in_page(data); | 419 | unsigned int offset = offset_in_page(data); |
@@ -415,13 +430,60 @@ static int xenvif_gop_skb(struct sk_buff *skb, | |||
415 | } | 430 | } |
416 | 431 | ||
417 | for (i = 0; i < nr_frags; i++) { | 432 | for (i = 0; i < nr_frags; i++) { |
433 | /* This variable also signals whether foreign_gref has a real | ||
434 | * value or not. | ||
435 | */ | ||
436 | struct xenvif *foreign_vif = NULL; | ||
437 | grant_ref_t foreign_gref; | ||
438 | |||
439 | if ((skb_shinfo(skb)->tx_flags & SKBTX_DEV_ZEROCOPY) && | ||
440 | (ubuf->callback == &xenvif_zerocopy_callback)) { | ||
441 | const struct ubuf_info *const startpoint = ubuf; | ||
442 | |||
443 | /* Ideally ubuf points to the chain element which | ||
444 | * belongs to this frag. Or if frags were removed from | ||
445 | * the beginning, then shortly before it. | ||
446 | */ | ||
447 | ubuf = xenvif_find_gref(skb, i, ubuf); | ||
448 | |||
449 | /* Try again from the beginning of the list, if we | ||
450 | * haven't tried from there. This only makes sense in | ||
451 | * the unlikely event of reordering the original frags. | ||
452 | * For injected local pages it's an unnecessary second | ||
453 | * run. | ||
454 | */ | ||
455 | if (unlikely(!ubuf) && startpoint != head_ubuf) | ||
456 | ubuf = xenvif_find_gref(skb, i, head_ubuf); | ||
457 | |||
458 | if (likely(ubuf)) { | ||
459 | u16 pending_idx = ubuf->desc; | ||
460 | |||
461 | foreign_vif = ubuf_to_vif(ubuf); | ||
462 | foreign_gref = foreign_vif->pending_tx_info[pending_idx].req.gref; | ||
463 | /* Just a safety measure. If this was the last | ||
464 | * element on the list, the for loop will | ||
465 | * iterate again if a local page were added to | ||
466 | * the end. Using head_ubuf here prevents the | ||
467 | * second search on the chain. Or the original | ||
468 | * frags changed order, but that's less likely. | ||
469 | * In any way, ubuf shouldn't be NULL. | ||
470 | */ | ||
471 | ubuf = ubuf->ctx ? | ||
472 | (struct ubuf_info *) ubuf->ctx : | ||
473 | head_ubuf; | ||
474 | } else | ||
475 | /* This frag was a local page, added to the | ||
476 | * array after the skb left netback. | ||
477 | */ | ||
478 | ubuf = head_ubuf; | ||
479 | } | ||
418 | xenvif_gop_frag_copy(vif, skb, npo, | 480 | xenvif_gop_frag_copy(vif, skb, npo, |
419 | skb_frag_page(&skb_shinfo(skb)->frags[i]), | 481 | skb_frag_page(&skb_shinfo(skb)->frags[i]), |
420 | skb_frag_size(&skb_shinfo(skb)->frags[i]), | 482 | skb_frag_size(&skb_shinfo(skb)->frags[i]), |
421 | skb_shinfo(skb)->frags[i].page_offset, | 483 | skb_shinfo(skb)->frags[i].page_offset, |
422 | &head, | 484 | &head, |
423 | foreign_vif, | 485 | foreign_vif, |
424 | foreign_grefs[i]); | 486 | foreign_vif ? foreign_gref : UINT_MAX); |
425 | } | 487 | } |
426 | 488 | ||
427 | return npo->meta_prod - old_meta_prod; | 489 | return npo->meta_prod - old_meta_prod; |
@@ -654,7 +716,7 @@ done: | |||
654 | notify_remote_via_irq(vif->rx_irq); | 716 | notify_remote_via_irq(vif->rx_irq); |
655 | } | 717 | } |
656 | 718 | ||
657 | void xenvif_check_rx_xenvif(struct xenvif *vif) | 719 | void xenvif_napi_schedule_or_enable_events(struct xenvif *vif) |
658 | { | 720 | { |
659 | int more_to_do; | 721 | int more_to_do; |
660 | 722 | ||
@@ -688,7 +750,7 @@ static void tx_credit_callback(unsigned long data) | |||
688 | { | 750 | { |
689 | struct xenvif *vif = (struct xenvif *)data; | 751 | struct xenvif *vif = (struct xenvif *)data; |
690 | tx_add_credit(vif); | 752 | tx_add_credit(vif); |
691 | xenvif_check_rx_xenvif(vif); | 753 | xenvif_napi_schedule_or_enable_events(vif); |
692 | } | 754 | } |
693 | 755 | ||
694 | static void xenvif_tx_err(struct xenvif *vif, | 756 | static void xenvif_tx_err(struct xenvif *vif, |
diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig index 6963bdf54175..6aea373547f6 100644 --- a/drivers/ptp/Kconfig +++ b/drivers/ptp/Kconfig | |||
@@ -6,6 +6,7 @@ menu "PTP clock support" | |||
6 | 6 | ||
7 | config PTP_1588_CLOCK | 7 | config PTP_1588_CLOCK |
8 | tristate "PTP clock support" | 8 | tristate "PTP clock support" |
9 | depends on NET | ||
9 | select PPS | 10 | select PPS |
10 | select NET_PTP_CLASSIFY | 11 | select NET_PTP_CLASSIFY |
11 | help | 12 | help |
@@ -74,7 +75,7 @@ config DP83640_PHY | |||
74 | config PTP_1588_CLOCK_PCH | 75 | config PTP_1588_CLOCK_PCH |
75 | tristate "Intel PCH EG20T as PTP clock" | 76 | tristate "Intel PCH EG20T as PTP clock" |
76 | depends on X86 || COMPILE_TEST | 77 | depends on X86 || COMPILE_TEST |
77 | depends on HAS_IOMEM | 78 | depends on HAS_IOMEM && NET |
78 | select PTP_1588_CLOCK | 79 | select PTP_1588_CLOCK |
79 | help | 80 | help |
80 | This driver adds support for using the PCH EG20T as a PTP | 81 | This driver adds support for using the PCH EG20T as a PTP |
diff --git a/drivers/scsi/scsi_transport_sas.c b/drivers/scsi/scsi_transport_sas.c index 1b681427dde0..c341f855fadc 100644 --- a/drivers/scsi/scsi_transport_sas.c +++ b/drivers/scsi/scsi_transport_sas.c | |||
@@ -1621,8 +1621,6 @@ void sas_rphy_free(struct sas_rphy *rphy) | |||
1621 | list_del(&rphy->list); | 1621 | list_del(&rphy->list); |
1622 | mutex_unlock(&sas_host->lock); | 1622 | mutex_unlock(&sas_host->lock); |
1623 | 1623 | ||
1624 | sas_bsg_remove(shost, rphy); | ||
1625 | |||
1626 | transport_destroy_device(dev); | 1624 | transport_destroy_device(dev); |
1627 | 1625 | ||
1628 | put_device(dev); | 1626 | put_device(dev); |
@@ -1681,6 +1679,7 @@ sas_rphy_remove(struct sas_rphy *rphy) | |||
1681 | } | 1679 | } |
1682 | 1680 | ||
1683 | sas_rphy_unlink(rphy); | 1681 | sas_rphy_unlink(rphy); |
1682 | sas_bsg_remove(NULL, rphy); | ||
1684 | transport_remove_device(dev); | 1683 | transport_remove_device(dev); |
1685 | device_del(dev); | 1684 | device_del(dev); |
1686 | } | 1685 | } |