diff options
author | Felix Fietkau <nbd@openwrt.org> | 2010-07-01 18:09:50 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-07-02 13:44:36 -0400 |
commit | f2552e28375cb34073a2f940ee9a8439c37d9ec2 (patch) | |
tree | 85c718798e4f64cbc2ddd1beb93541722719d69e /drivers | |
parent | ba17bc5e55ba541d2a8765fca53b6883b667ab21 (diff) |
ath9k_hw: sanitize noise floor values properly on all chips
This refactors the noise floor range checks to make them generic,
and adds proper ranges for each supported chip type.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar5008_phy.c | 11 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_phy.c | 32 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_phy.h | 26 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.c | 66 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/calib.c | 57 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/calib.h | 6 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 3 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 14 |
8 files changed, 120 insertions, 95 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c index ee34a495b0be..c6751826ce70 100644 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c | |||
@@ -1676,6 +1676,15 @@ static void ar5008_hw_ani_cache_ini_regs(struct ath_hw *ah) | |||
1676 | aniState->cycleCount = 0; | 1676 | aniState->cycleCount = 0; |
1677 | } | 1677 | } |
1678 | 1678 | ||
1679 | static void ar5008_hw_set_nf_limits(struct ath_hw *ah) | ||
1680 | { | ||
1681 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ; | ||
1682 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ; | ||
1683 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ; | ||
1684 | ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ; | ||
1685 | ah->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ; | ||
1686 | ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ; | ||
1687 | } | ||
1679 | 1688 | ||
1680 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah) | 1689 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah) |
1681 | { | 1690 | { |
@@ -1713,4 +1722,6 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah) | |||
1713 | priv_ops->compute_pll_control = ar9160_hw_compute_pll_control; | 1722 | priv_ops->compute_pll_control = ar9160_hw_compute_pll_control; |
1714 | else | 1723 | else |
1715 | priv_ops->compute_pll_control = ar5008_hw_compute_pll_control; | 1724 | priv_ops->compute_pll_control = ar5008_hw_compute_pll_control; |
1725 | |||
1726 | ar5008_hw_set_nf_limits(ah); | ||
1716 | } | 1727 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c index ed314e89bfe1..240e8a402c9f 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c | |||
@@ -481,9 +481,6 @@ static void ar9002_hw_do_getnf(struct ath_hw *ah, | |||
481 | ath_print(common, ATH_DBG_CALIBRATE, | 481 | ath_print(common, ATH_DBG_CALIBRATE, |
482 | "NF calibrated [ctl] [chain 0] is %d\n", nf); | 482 | "NF calibrated [ctl] [chain 0] is %d\n", nf); |
483 | 483 | ||
484 | if (AR_SREV_9271(ah) && (nf >= -114)) | ||
485 | nf = -116; | ||
486 | |||
487 | nfarray[0] = nf; | 484 | nfarray[0] = nf; |
488 | 485 | ||
489 | if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) { | 486 | if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) { |
@@ -503,9 +500,6 @@ static void ar9002_hw_do_getnf(struct ath_hw *ah, | |||
503 | ath_print(common, ATH_DBG_CALIBRATE, | 500 | ath_print(common, ATH_DBG_CALIBRATE, |
504 | "NF calibrated [ext] [chain 0] is %d\n", nf); | 501 | "NF calibrated [ext] [chain 0] is %d\n", nf); |
505 | 502 | ||
506 | if (AR_SREV_9271(ah) && (nf >= -114)) | ||
507 | nf = -116; | ||
508 | |||
509 | nfarray[3] = nf; | 503 | nfarray[3] = nf; |
510 | 504 | ||
511 | if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) { | 505 | if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) { |
@@ -520,6 +514,30 @@ static void ar9002_hw_do_getnf(struct ath_hw *ah, | |||
520 | } | 514 | } |
521 | } | 515 | } |
522 | 516 | ||
517 | static void ar9002_hw_set_nf_limits(struct ath_hw *ah) | ||
518 | { | ||
519 | if (AR_SREV_9285(ah)) { | ||
520 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ; | ||
521 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ; | ||
522 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9285_2GHZ; | ||
523 | } else if (AR_SREV_9287(ah)) { | ||
524 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ; | ||
525 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ; | ||
526 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9287_2GHZ; | ||
527 | } else if (AR_SREV_9271(ah)) { | ||
528 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9271_2GHZ; | ||
529 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9271_2GHZ; | ||
530 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9271_2GHZ; | ||
531 | } else { | ||
532 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9280_2GHZ; | ||
533 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9280_2GHZ; | ||
534 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9280_2GHZ; | ||
535 | ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9280_5GHZ; | ||
536 | ah->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9280_5GHZ; | ||
537 | ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9280_5GHZ; | ||
538 | } | ||
539 | } | ||
540 | |||
523 | void ar9002_hw_attach_phy_ops(struct ath_hw *ah) | 541 | void ar9002_hw_attach_phy_ops(struct ath_hw *ah) |
524 | { | 542 | { |
525 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); | 543 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); |
@@ -532,4 +550,6 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah) | |||
532 | priv_ops->olc_init = ar9002_olc_init; | 550 | priv_ops->olc_init = ar9002_olc_init; |
533 | priv_ops->compute_pll_control = ar9002_hw_compute_pll_control; | 551 | priv_ops->compute_pll_control = ar9002_hw_compute_pll_control; |
534 | priv_ops->do_getnf = ar9002_hw_do_getnf; | 552 | priv_ops->do_getnf = ar9002_hw_do_getnf; |
553 | |||
554 | ar9002_hw_set_nf_limits(ah); | ||
535 | } | 555 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.h b/drivers/net/wireless/ath/ath9k/ar9002_phy.h index ce8bb001c6d1..c5151a4dd10b 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.h | |||
@@ -576,4 +576,30 @@ | |||
576 | #define AR_PHY_CH2_EXT_MINCCA_PWR 0xFF800000 | 576 | #define AR_PHY_CH2_EXT_MINCCA_PWR 0xFF800000 |
577 | #define AR_PHY_CH2_EXT_MINCCA_PWR_S 23 | 577 | #define AR_PHY_CH2_EXT_MINCCA_PWR_S 23 |
578 | 578 | ||
579 | #define AR_PHY_CCA_NOM_VAL_5416_2GHZ -90 | ||
580 | #define AR_PHY_CCA_NOM_VAL_5416_5GHZ -100 | ||
581 | #define AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ -100 | ||
582 | #define AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ -110 | ||
583 | #define AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ -80 | ||
584 | #define AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ -90 | ||
585 | |||
586 | #define AR_PHY_CCA_NOM_VAL_9280_2GHZ -112 | ||
587 | #define AR_PHY_CCA_NOM_VAL_9280_5GHZ -112 | ||
588 | #define AR_PHY_CCA_MIN_GOOD_VAL_9280_2GHZ -127 | ||
589 | #define AR_PHY_CCA_MIN_GOOD_VAL_9280_5GHZ -122 | ||
590 | #define AR_PHY_CCA_MAX_GOOD_VAL_9280_2GHZ -97 | ||
591 | #define AR_PHY_CCA_MAX_GOOD_VAL_9280_5GHZ -102 | ||
592 | |||
593 | #define AR_PHY_CCA_NOM_VAL_9285_2GHZ -118 | ||
594 | #define AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ -127 | ||
595 | #define AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ -108 | ||
596 | |||
597 | #define AR_PHY_CCA_NOM_VAL_9271_2GHZ -118 | ||
598 | #define AR_PHY_CCA_MIN_GOOD_VAL_9271_2GHZ -127 | ||
599 | #define AR_PHY_CCA_MAX_GOOD_VAL_9271_2GHZ -116 | ||
600 | |||
601 | #define AR_PHY_CCA_NOM_VAL_9287_2GHZ -120 | ||
602 | #define AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ -127 | ||
603 | #define AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ -110 | ||
604 | |||
579 | #endif | 605 | #endif |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 19bc05c41136..a0bc1b77cd1d 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
@@ -1015,52 +1015,6 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, | |||
1015 | return true; | 1015 | return true; |
1016 | } | 1016 | } |
1017 | 1017 | ||
1018 | static void ar9003_hw_nf_sanitize_2g(struct ath_hw *ah, s16 *nf) | ||
1019 | { | ||
1020 | struct ath_common *common = ath9k_hw_common(ah); | ||
1021 | |||
1022 | if (*nf > ah->nf_2g_max) { | ||
1023 | ath_print(common, ATH_DBG_CALIBRATE, | ||
1024 | "2 GHz NF (%d) > MAX (%d), " | ||
1025 | "correcting to MAX", | ||
1026 | *nf, ah->nf_2g_max); | ||
1027 | *nf = ah->nf_2g_max; | ||
1028 | } else if (*nf < ah->nf_2g_min) { | ||
1029 | ath_print(common, ATH_DBG_CALIBRATE, | ||
1030 | "2 GHz NF (%d) < MIN (%d), " | ||
1031 | "correcting to MIN", | ||
1032 | *nf, ah->nf_2g_min); | ||
1033 | *nf = ah->nf_2g_min; | ||
1034 | } | ||
1035 | } | ||
1036 | |||
1037 | static void ar9003_hw_nf_sanitize_5g(struct ath_hw *ah, s16 *nf) | ||
1038 | { | ||
1039 | struct ath_common *common = ath9k_hw_common(ah); | ||
1040 | |||
1041 | if (*nf > ah->nf_5g_max) { | ||
1042 | ath_print(common, ATH_DBG_CALIBRATE, | ||
1043 | "5 GHz NF (%d) > MAX (%d), " | ||
1044 | "correcting to MAX", | ||
1045 | *nf, ah->nf_5g_max); | ||
1046 | *nf = ah->nf_5g_max; | ||
1047 | } else if (*nf < ah->nf_5g_min) { | ||
1048 | ath_print(common, ATH_DBG_CALIBRATE, | ||
1049 | "5 GHz NF (%d) < MIN (%d), " | ||
1050 | "correcting to MIN", | ||
1051 | *nf, ah->nf_5g_min); | ||
1052 | *nf = ah->nf_5g_min; | ||
1053 | } | ||
1054 | } | ||
1055 | |||
1056 | static void ar9003_hw_nf_sanitize(struct ath_hw *ah, s16 *nf) | ||
1057 | { | ||
1058 | if (IS_CHAN_2GHZ(ah->curchan)) | ||
1059 | ar9003_hw_nf_sanitize_2g(ah, nf); | ||
1060 | else | ||
1061 | ar9003_hw_nf_sanitize_5g(ah, nf); | ||
1062 | } | ||
1063 | |||
1064 | static void ar9003_hw_do_getnf(struct ath_hw *ah, | 1018 | static void ar9003_hw_do_getnf(struct ath_hw *ah, |
1065 | int16_t nfarray[NUM_NF_READINGS]) | 1019 | int16_t nfarray[NUM_NF_READINGS]) |
1066 | { | 1020 | { |
@@ -1070,7 +1024,6 @@ static void ar9003_hw_do_getnf(struct ath_hw *ah, | |||
1070 | nf = MS(REG_READ(ah, AR_PHY_CCA_0), AR_PHY_MINCCA_PWR); | 1024 | nf = MS(REG_READ(ah, AR_PHY_CCA_0), AR_PHY_MINCCA_PWR); |
1071 | if (nf & 0x100) | 1025 | if (nf & 0x100) |
1072 | nf = 0 - ((nf ^ 0x1ff) + 1); | 1026 | nf = 0 - ((nf ^ 0x1ff) + 1); |
1073 | ar9003_hw_nf_sanitize(ah, &nf); | ||
1074 | ath_print(common, ATH_DBG_CALIBRATE, | 1027 | ath_print(common, ATH_DBG_CALIBRATE, |
1075 | "NF calibrated [ctl] [chain 0] is %d\n", nf); | 1028 | "NF calibrated [ctl] [chain 0] is %d\n", nf); |
1076 | nfarray[0] = nf; | 1029 | nfarray[0] = nf; |
@@ -1078,7 +1031,6 @@ static void ar9003_hw_do_getnf(struct ath_hw *ah, | |||
1078 | nf = MS(REG_READ(ah, AR_PHY_CCA_1), AR_PHY_CH1_MINCCA_PWR); | 1031 | nf = MS(REG_READ(ah, AR_PHY_CCA_1), AR_PHY_CH1_MINCCA_PWR); |
1079 | if (nf & 0x100) | 1032 | if (nf & 0x100) |
1080 | nf = 0 - ((nf ^ 0x1ff) + 1); | 1033 | nf = 0 - ((nf ^ 0x1ff) + 1); |
1081 | ar9003_hw_nf_sanitize(ah, &nf); | ||
1082 | ath_print(common, ATH_DBG_CALIBRATE, | 1034 | ath_print(common, ATH_DBG_CALIBRATE, |
1083 | "NF calibrated [ctl] [chain 1] is %d\n", nf); | 1035 | "NF calibrated [ctl] [chain 1] is %d\n", nf); |
1084 | nfarray[1] = nf; | 1036 | nfarray[1] = nf; |
@@ -1086,7 +1038,6 @@ static void ar9003_hw_do_getnf(struct ath_hw *ah, | |||
1086 | nf = MS(REG_READ(ah, AR_PHY_CCA_2), AR_PHY_CH2_MINCCA_PWR); | 1038 | nf = MS(REG_READ(ah, AR_PHY_CCA_2), AR_PHY_CH2_MINCCA_PWR); |
1087 | if (nf & 0x100) | 1039 | if (nf & 0x100) |
1088 | nf = 0 - ((nf ^ 0x1ff) + 1); | 1040 | nf = 0 - ((nf ^ 0x1ff) + 1); |
1089 | ar9003_hw_nf_sanitize(ah, &nf); | ||
1090 | ath_print(common, ATH_DBG_CALIBRATE, | 1041 | ath_print(common, ATH_DBG_CALIBRATE, |
1091 | "NF calibrated [ctl] [chain 2] is %d\n", nf); | 1042 | "NF calibrated [ctl] [chain 2] is %d\n", nf); |
1092 | nfarray[2] = nf; | 1043 | nfarray[2] = nf; |
@@ -1094,7 +1045,6 @@ static void ar9003_hw_do_getnf(struct ath_hw *ah, | |||
1094 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR); | 1045 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR); |
1095 | if (nf & 0x100) | 1046 | if (nf & 0x100) |
1096 | nf = 0 - ((nf ^ 0x1ff) + 1); | 1047 | nf = 0 - ((nf ^ 0x1ff) + 1); |
1097 | ar9003_hw_nf_sanitize(ah, &nf); | ||
1098 | ath_print(common, ATH_DBG_CALIBRATE, | 1048 | ath_print(common, ATH_DBG_CALIBRATE, |
1099 | "NF calibrated [ext] [chain 0] is %d\n", nf); | 1049 | "NF calibrated [ext] [chain 0] is %d\n", nf); |
1100 | nfarray[3] = nf; | 1050 | nfarray[3] = nf; |
@@ -1102,7 +1052,6 @@ static void ar9003_hw_do_getnf(struct ath_hw *ah, | |||
1102 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_1), AR_PHY_CH1_EXT_MINCCA_PWR); | 1052 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_1), AR_PHY_CH1_EXT_MINCCA_PWR); |
1103 | if (nf & 0x100) | 1053 | if (nf & 0x100) |
1104 | nf = 0 - ((nf ^ 0x1ff) + 1); | 1054 | nf = 0 - ((nf ^ 0x1ff) + 1); |
1105 | ar9003_hw_nf_sanitize(ah, &nf); | ||
1106 | ath_print(common, ATH_DBG_CALIBRATE, | 1055 | ath_print(common, ATH_DBG_CALIBRATE, |
1107 | "NF calibrated [ext] [chain 1] is %d\n", nf); | 1056 | "NF calibrated [ext] [chain 1] is %d\n", nf); |
1108 | nfarray[4] = nf; | 1057 | nfarray[4] = nf; |
@@ -1110,18 +1059,19 @@ static void ar9003_hw_do_getnf(struct ath_hw *ah, | |||
1110 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_2), AR_PHY_CH2_EXT_MINCCA_PWR); | 1059 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_2), AR_PHY_CH2_EXT_MINCCA_PWR); |
1111 | if (nf & 0x100) | 1060 | if (nf & 0x100) |
1112 | nf = 0 - ((nf ^ 0x1ff) + 1); | 1061 | nf = 0 - ((nf ^ 0x1ff) + 1); |
1113 | ar9003_hw_nf_sanitize(ah, &nf); | ||
1114 | ath_print(common, ATH_DBG_CALIBRATE, | 1062 | ath_print(common, ATH_DBG_CALIBRATE, |
1115 | "NF calibrated [ext] [chain 2] is %d\n", nf); | 1063 | "NF calibrated [ext] [chain 2] is %d\n", nf); |
1116 | nfarray[5] = nf; | 1064 | nfarray[5] = nf; |
1117 | } | 1065 | } |
1118 | 1066 | ||
1119 | void ar9003_hw_set_nf_limits(struct ath_hw *ah) | 1067 | static void ar9003_hw_set_nf_limits(struct ath_hw *ah) |
1120 | { | 1068 | { |
1121 | ah->nf_2g_max = AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ; | 1069 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ; |
1122 | ah->nf_2g_min = AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ; | 1070 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ; |
1123 | ah->nf_5g_max = AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ; | 1071 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9300_2GHZ; |
1124 | ah->nf_5g_min = AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ; | 1072 | ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ; |
1073 | ah->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ; | ||
1074 | ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9300_5GHZ; | ||
1125 | } | 1075 | } |
1126 | 1076 | ||
1127 | /* | 1077 | /* |
@@ -1309,6 +1259,8 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah) | |||
1309 | priv_ops->do_getnf = ar9003_hw_do_getnf; | 1259 | priv_ops->do_getnf = ar9003_hw_do_getnf; |
1310 | priv_ops->loadnf = ar9003_hw_loadnf; | 1260 | priv_ops->loadnf = ar9003_hw_loadnf; |
1311 | priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; | 1261 | priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; |
1262 | |||
1263 | ar9003_hw_set_nf_limits(ah); | ||
1312 | } | 1264 | } |
1313 | 1265 | ||
1314 | void ar9003_hw_bb_watchdog_config(struct ath_hw *ah) | 1266 | void ar9003_hw_bb_watchdog_config(struct ath_hw *ah) |
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c index 07b8fa6fb62f..7f49b7511bfd 100644 --- a/drivers/net/wireless/ath/ath9k/calib.c +++ b/drivers/net/wireless/ath/ath9k/calib.c | |||
@@ -74,13 +74,8 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath9k_nfcal_hist *h, | |||
74 | h[i].currIndex = 0; | 74 | h[i].currIndex = 0; |
75 | 75 | ||
76 | if (h[i].invalidNFcount > 0) { | 76 | if (h[i].invalidNFcount > 0) { |
77 | if (nfarray[i] < AR_PHY_CCA_MIN_BAD_VALUE || | 77 | h[i].invalidNFcount--; |
78 | nfarray[i] > AR_PHY_CCA_MAX_HIGH_VALUE) { | 78 | h[i].privNF = nfarray[i]; |
79 | h[i].invalidNFcount = ATH9K_NF_CAL_HIST_MAX; | ||
80 | } else { | ||
81 | h[i].invalidNFcount--; | ||
82 | h[i].privNF = nfarray[i]; | ||
83 | } | ||
84 | } else { | 79 | } else { |
85 | h[i].privNF = | 80 | h[i].privNF = |
86 | ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer); | 81 | ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer); |
@@ -172,6 +167,35 @@ void ath9k_hw_start_nfcal(struct ath_hw *ah) | |||
172 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); | 167 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); |
173 | } | 168 | } |
174 | 169 | ||
170 | static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf) | ||
171 | { | ||
172 | struct ath_common *common = ath9k_hw_common(ah); | ||
173 | struct ath_nf_limits *limit; | ||
174 | int i; | ||
175 | |||
176 | if (IS_CHAN_2GHZ(ah->curchan)) | ||
177 | limit = &ah->nf_2g; | ||
178 | else | ||
179 | limit = &ah->nf_5g; | ||
180 | |||
181 | for (i = 0; i < NUM_NF_READINGS; i++) { | ||
182 | if (!nf[i]) | ||
183 | continue; | ||
184 | |||
185 | if (nf[i] > limit->max) { | ||
186 | ath_print(common, ATH_DBG_CALIBRATE, | ||
187 | "NF[%d] (%d) > MAX (%d), correcting to MAX", | ||
188 | i, nf[i], limit->max); | ||
189 | nf[i] = limit->max; | ||
190 | } else if (nf[i] < limit->min) { | ||
191 | ath_print(common, ATH_DBG_CALIBRATE, | ||
192 | "NF[%d] (%d) < MIN (%d), correcting to NOM", | ||
193 | i, nf[i], limit->min); | ||
194 | nf[i] = limit->nominal; | ||
195 | } | ||
196 | } | ||
197 | } | ||
198 | |||
175 | int16_t ath9k_hw_getnf(struct ath_hw *ah, | 199 | int16_t ath9k_hw_getnf(struct ath_hw *ah, |
176 | struct ath9k_channel *chan) | 200 | struct ath9k_channel *chan) |
177 | { | 201 | { |
@@ -190,6 +214,7 @@ int16_t ath9k_hw_getnf(struct ath_hw *ah, | |||
190 | return chan->rawNoiseFloor; | 214 | return chan->rawNoiseFloor; |
191 | } else { | 215 | } else { |
192 | ath9k_hw_do_getnf(ah, nfarray); | 216 | ath9k_hw_do_getnf(ah, nfarray); |
217 | ath9k_hw_nf_sanitize(ah, nfarray); | ||
193 | nf = nfarray[0]; | 218 | nf = nfarray[0]; |
194 | if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh) | 219 | if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh) |
195 | && nf > nfThresh) { | 220 | && nf > nfThresh) { |
@@ -211,25 +236,21 @@ int16_t ath9k_hw_getnf(struct ath_hw *ah, | |||
211 | 236 | ||
212 | void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah) | 237 | void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah) |
213 | { | 238 | { |
239 | struct ath_nf_limits *limit; | ||
214 | int i, j; | 240 | int i, j; |
215 | s16 noise_floor; | 241 | |
216 | 242 | if (!ah->curchan || IS_CHAN_2GHZ(ah->curchan)) | |
217 | if (AR_SREV_9280(ah)) | 243 | limit = &ah->nf_2g; |
218 | noise_floor = AR_PHY_CCA_MAX_AR9280_GOOD_VALUE; | ||
219 | else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) | ||
220 | noise_floor = AR_PHY_CCA_MAX_AR9285_GOOD_VALUE; | ||
221 | else if (AR_SREV_9287(ah)) | ||
222 | noise_floor = AR_PHY_CCA_MAX_AR9287_GOOD_VALUE; | ||
223 | else | 244 | else |
224 | noise_floor = AR_PHY_CCA_MAX_AR5416_GOOD_VALUE; | 245 | limit = &ah->nf_5g; |
225 | 246 | ||
226 | for (i = 0; i < NUM_NF_READINGS; i++) { | 247 | for (i = 0; i < NUM_NF_READINGS; i++) { |
227 | ah->nfCalHist[i].currIndex = 0; | 248 | ah->nfCalHist[i].currIndex = 0; |
228 | ah->nfCalHist[i].privNF = noise_floor; | 249 | ah->nfCalHist[i].privNF = limit->nominal; |
229 | ah->nfCalHist[i].invalidNFcount = | 250 | ah->nfCalHist[i].invalidNFcount = |
230 | AR_PHY_CCA_FILTERWINDOW_LENGTH; | 251 | AR_PHY_CCA_FILTERWINDOW_LENGTH; |
231 | for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) { | 252 | for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) { |
232 | ah->nfCalHist[i].nfCalBuffer[j] = noise_floor; | 253 | ah->nfCalHist[i].nfCalBuffer[j] = limit->nominal; |
233 | } | 254 | } |
234 | } | 255 | } |
235 | } | 256 | } |
diff --git a/drivers/net/wireless/ath/ath9k/calib.h b/drivers/net/wireless/ath/ath9k/calib.h index 24538bdb9126..ca4638d500b8 100644 --- a/drivers/net/wireless/ath/ath9k/calib.h +++ b/drivers/net/wireless/ath/ath9k/calib.h | |||
@@ -19,12 +19,6 @@ | |||
19 | 19 | ||
20 | #include "hw.h" | 20 | #include "hw.h" |
21 | 21 | ||
22 | #define AR_PHY_CCA_MAX_AR5416_GOOD_VALUE -85 | ||
23 | #define AR_PHY_CCA_MAX_AR9280_GOOD_VALUE -112 | ||
24 | #define AR_PHY_CCA_MAX_AR9285_GOOD_VALUE -118 | ||
25 | #define AR_PHY_CCA_MAX_AR9287_GOOD_VALUE -118 | ||
26 | #define AR_PHY_CCA_MAX_HIGH_VALUE -62 | ||
27 | #define AR_PHY_CCA_MIN_BAD_VALUE -140 | ||
28 | #define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT 3 | 22 | #define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT 3 |
29 | #define AR_PHY_CCA_FILTERWINDOW_LENGTH 5 | 23 | #define AR_PHY_CCA_FILTERWINDOW_LENGTH 5 |
30 | 24 | ||
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 3ed5c9ec7bc1..2acd79985599 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -609,9 +609,6 @@ static int __ath9k_hw_init(struct ath_hw *ah) | |||
609 | else | 609 | else |
610 | ah->tx_trig_level = (AR_FTRIG_512B >> AR_FTRIG_S); | 610 | ah->tx_trig_level = (AR_FTRIG_512B >> AR_FTRIG_S); |
611 | 611 | ||
612 | if (AR_SREV_9300_20_OR_LATER(ah)) | ||
613 | ar9003_hw_set_nf_limits(ah); | ||
614 | |||
615 | ath9k_init_nfcal_hist_buffer(ah); | 612 | ath9k_init_nfcal_hist_buffer(ah); |
616 | ah->bb_watchdog_timeout_ms = 25; | 613 | ah->bb_watchdog_timeout_ms = 25; |
617 | 614 | ||
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index bb99e2e1f943..6a4b69257100 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -630,6 +630,12 @@ struct ath_hw_ops { | |||
630 | void (*ani_monitor)(struct ath_hw *ah, struct ath9k_channel *chan); | 630 | void (*ani_monitor)(struct ath_hw *ah, struct ath9k_channel *chan); |
631 | }; | 631 | }; |
632 | 632 | ||
633 | struct ath_nf_limits { | ||
634 | s16 max; | ||
635 | s16 min; | ||
636 | s16 nominal; | ||
637 | }; | ||
638 | |||
633 | struct ath_hw { | 639 | struct ath_hw { |
634 | struct ieee80211_hw *hw; | 640 | struct ieee80211_hw *hw; |
635 | struct ath_common common; | 641 | struct ath_common common; |
@@ -651,10 +657,9 @@ struct ath_hw { | |||
651 | bool is_pciexpress; | 657 | bool is_pciexpress; |
652 | bool need_an_top2_fixup; | 658 | bool need_an_top2_fixup; |
653 | u16 tx_trig_level; | 659 | u16 tx_trig_level; |
654 | s16 nf_2g_max; | 660 | |
655 | s16 nf_2g_min; | 661 | struct ath_nf_limits nf_2g; |
656 | s16 nf_5g_max; | 662 | struct ath_nf_limits nf_5g; |
657 | s16 nf_5g_min; | ||
658 | u16 rfsilent; | 663 | u16 rfsilent; |
659 | u32 rfkill_gpio; | 664 | u32 rfkill_gpio; |
660 | u32 rfkill_polarity; | 665 | u32 rfkill_polarity; |
@@ -943,7 +948,6 @@ void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah); | |||
943 | * Code specific to AR9003, we stuff these here to avoid callbacks | 948 | * Code specific to AR9003, we stuff these here to avoid callbacks |
944 | * for older families | 949 | * for older families |
945 | */ | 950 | */ |
946 | void ar9003_hw_set_nf_limits(struct ath_hw *ah); | ||
947 | void ar9003_hw_bb_watchdog_config(struct ath_hw *ah); | 951 | void ar9003_hw_bb_watchdog_config(struct ath_hw *ah); |
948 | void ar9003_hw_bb_watchdog_read(struct ath_hw *ah); | 952 | void ar9003_hw_bb_watchdog_read(struct ath_hw *ah); |
949 | void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah); | 953 | void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah); |