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authorTony Lindgren <tony@atomide.com>2008-09-04 19:25:14 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2008-10-17 17:41:00 -0400
commitf1c9e151b18ade3be5b1865d288a490bff4339e6 (patch)
tree50f08adce13f6d3bd687fc3369e5882ee8a8159e /drivers
parent9b466c3b8208f395cb3492e32b254a81c5b31780 (diff)
USB: omap_udc: sync with OMAP tree
Sync up USB parts of the omap_udc support in mainline with the OMAP tree. This patch addresses some OMAP2 differences ... there's another, with respect to the double-buffering issue with PIO-IN in omap_ep_setup() (which is now out of sync with the comments), but it's not clear right now how to address that. From: Tony Lindgren <tony@atomide.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/gadget/Kconfig2
-rw-r--r--drivers/usb/gadget/omap_udc.c7
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 1a72715bce8a..dd4cd5a51370 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -190,7 +190,7 @@ config USB_LH7A40X
190config USB_GADGET_OMAP 190config USB_GADGET_OMAP
191 boolean "OMAP USB Device Controller" 191 boolean "OMAP USB Device Controller"
192 depends on ARCH_OMAP 192 depends on ARCH_OMAP
193 select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 193 select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG
194 help 194 help
195 Many Texas Instruments OMAP processors have flexible full 195 Many Texas Instruments OMAP processors have flexible full
196 speed USB device controllers, with support for up to 30 196 speed USB device controllers, with support for up to 30
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index bb54cca4c543..34e9e393f929 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -2313,6 +2313,13 @@ static int proc_otg_show(struct seq_file *s)
2313 2313
2314 tmp = omap_readl(OTG_REV); 2314 tmp = omap_readl(OTG_REV);
2315 if (cpu_is_omap24xx()) { 2315 if (cpu_is_omap24xx()) {
2316 /*
2317 * REVISIT: Not clear how this works on OMAP2. trans
2318 * is ANDed to produce bits 7 and 8, which might make
2319 * sense for USB_TRANSCEIVER_CTRL on OMAP1,
2320 * but with CONTROL_DEVCONF, these bits have something to
2321 * do with the frame adjustment counter and McBSP2.
2322 */
2316 ctrl_name = "control_devconf"; 2323 ctrl_name = "control_devconf";
2317 trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); 2324 trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
2318 } else { 2325 } else {