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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-12-01 15:03:59 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-12-06 07:19:13 -0500
commitef04f00d12312e43b13ba8f79435763e25aaff5c (patch)
tree6cd60c6a4ac2f562c768afd0b6901c2af39920b4 /drivers
parent9ee32fea5fe810ec06af3a15e4c65478de56d4f5 (diff)
drm/i915: use _NOTRACE for gmbus/dp aux wait loops
Less clutter in the traces. And in both cases we yell rather loud into the logs if we time out. Patch suggested by Chris Wilson. v2: Annotate another I915_READ in dp_aux to be consistent - we filter out all register io in wait_for and similar loops. Chris also suggested to mark all dp_aux register access as _NOTRACE, but I think we should keep all functionally relevant access around, and filter unneeded bits in userspace after the trace is captured. Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c4
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ada1b316195c..3f633cadc8ba 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -351,7 +351,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq)
351 } 351 }
352 } 352 }
353 353
354#define C (((status = I915_READ(ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) 354#define C (((status = I915_READ_NOTRACE(ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0)
355 if (has_aux_irq) 355 if (has_aux_irq)
356 done = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 10); 356 done = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 10);
357 else 357 else
@@ -439,7 +439,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
439 439
440 /* Try to wait for any previous AUX channel activity */ 440 /* Try to wait for any previous AUX channel activity */
441 for (try = 0; try < 3; try++) { 441 for (try = 0; try < 3; try++) {
442 status = I915_READ(ch_ctl); 442 status = I915_READ_NOTRACE(ch_ctl);
443 if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0) 443 if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
444 break; 444 break;
445 msleep(1); 445 msleep(1);
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 1fc31191b910..7f0904170963 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -223,7 +223,7 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
223 prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait, 223 prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait,
224 TASK_UNINTERRUPTIBLE); 224 TASK_UNINTERRUPTIBLE);
225 225
226 gmbus2 = I915_READ(GMBUS2 + reg_offset); 226 gmbus2 = I915_READ_NOTRACE(GMBUS2 + reg_offset);
227 if (gmbus2 & (GMBUS_SATOER | gmbus2_status)) 227 if (gmbus2 & (GMBUS_SATOER | gmbus2_status))
228 break; 228 break;
229 229
@@ -246,7 +246,7 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
246 int ret; 246 int ret;
247 int reg_offset = dev_priv->gpio_mmio_base; 247 int reg_offset = dev_priv->gpio_mmio_base;
248 248
249#define C ((I915_READ(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0) 249#define C ((I915_READ_NOTRACE(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0)
250 250
251 if (!HAS_GMBUS_IRQ(dev_priv->dev)) 251 if (!HAS_GMBUS_IRQ(dev_priv->dev))
252 return wait_for(C, 10); 252 return wait_for(C, 10);