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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2014-09-02 06:45:21 -0400
committerLee Jones <lee.jones@linaro.org>2014-09-26 03:15:58 -0400
commitec689a8a8155ce8b966bd5d7737a3916f5e48be3 (patch)
treece1efafa31e3eef2b7a67fd5ccd84d2dc6e74c46 /drivers
parentbb048713bba3ead39f6112910906d9fe3f88ede7 (diff)
mfd: lpc_sch: Add support for Intel Quark X1000
Intel Quark X1000 SoC supports IRQ based GPIO. This patch will enable MFD support for Quark X1000 and provide IRQ resources to Quark X1000 GPIO device driver. Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Tested-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/lpc_sch.c37
1 files changed, 31 insertions, 6 deletions
diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
index bde070a3a3c0..ae614b2aca7e 100644
--- a/drivers/mfd/lpc_sch.c
+++ b/drivers/mfd/lpc_sch.c
@@ -37,6 +37,9 @@
37#define GPIO_IO_SIZE 64 37#define GPIO_IO_SIZE 64
38#define GPIO_IO_SIZE_CENTERTON 128 38#define GPIO_IO_SIZE_CENTERTON 128
39 39
40/* Intel Quark X1000 GPIO IRQ Number */
41#define GPIO_IRQ_QUARK_X1000 9
42
40#define WDTBASE 0x84 43#define WDTBASE 0x84
41#define WDT_IO_SIZE 64 44#define WDT_IO_SIZE 64
42 45
@@ -44,28 +47,37 @@ enum sch_chipsets {
44 LPC_SCH = 0, /* Intel Poulsbo SCH */ 47 LPC_SCH = 0, /* Intel Poulsbo SCH */
45 LPC_ITC, /* Intel Tunnel Creek */ 48 LPC_ITC, /* Intel Tunnel Creek */
46 LPC_CENTERTON, /* Intel Centerton */ 49 LPC_CENTERTON, /* Intel Centerton */
50 LPC_QUARK_X1000, /* Intel Quark X1000 */
47}; 51};
48 52
49struct lpc_sch_info { 53struct lpc_sch_info {
50 unsigned int io_size_smbus; 54 unsigned int io_size_smbus;
51 unsigned int io_size_gpio; 55 unsigned int io_size_gpio;
52 unsigned int io_size_wdt; 56 unsigned int io_size_wdt;
57 int irq_gpio;
53}; 58};
54 59
55static struct lpc_sch_info sch_chipset_info[] = { 60static struct lpc_sch_info sch_chipset_info[] = {
56 [LPC_SCH] = { 61 [LPC_SCH] = {
57 .io_size_smbus = SMBUS_IO_SIZE, 62 .io_size_smbus = SMBUS_IO_SIZE,
58 .io_size_gpio = GPIO_IO_SIZE, 63 .io_size_gpio = GPIO_IO_SIZE,
64 .irq_gpio = -1,
59 }, 65 },
60 [LPC_ITC] = { 66 [LPC_ITC] = {
61 .io_size_smbus = SMBUS_IO_SIZE, 67 .io_size_smbus = SMBUS_IO_SIZE,
62 .io_size_gpio = GPIO_IO_SIZE, 68 .io_size_gpio = GPIO_IO_SIZE,
63 .io_size_wdt = WDT_IO_SIZE, 69 .io_size_wdt = WDT_IO_SIZE,
70 .irq_gpio = -1,
64 }, 71 },
65 [LPC_CENTERTON] = { 72 [LPC_CENTERTON] = {
66 .io_size_smbus = SMBUS_IO_SIZE, 73 .io_size_smbus = SMBUS_IO_SIZE,
67 .io_size_gpio = GPIO_IO_SIZE_CENTERTON, 74 .io_size_gpio = GPIO_IO_SIZE_CENTERTON,
68 .io_size_wdt = WDT_IO_SIZE, 75 .io_size_wdt = WDT_IO_SIZE,
76 .irq_gpio = -1,
77 },
78 [LPC_QUARK_X1000] = {
79 .io_size_gpio = GPIO_IO_SIZE,
80 .irq_gpio = GPIO_IRQ_QUARK_X1000,
69 }, 81 },
70}; 82};
71 83
@@ -73,6 +85,7 @@ static const struct pci_device_id lpc_sch_ids[] = {
73 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH }, 85 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
74 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC }, 86 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
75 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON }, 87 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
88 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
76 { 0, } 89 { 0, }
77}; 90};
78MODULE_DEVICE_TABLE(pci, lpc_sch_ids); 91MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
@@ -110,13 +123,13 @@ static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
110} 123}
111 124
112static int lpc_sch_populate_cell(struct pci_dev *pdev, int where, 125static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
113 const char *name, int size, int id, 126 const char *name, int size, int irq,
114 struct mfd_cell *cell) 127 int id, struct mfd_cell *cell)
115{ 128{
116 struct resource *res; 129 struct resource *res;
117 int ret; 130 int ret;
118 131
119 res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL); 132 res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
120 if (!res) 133 if (!res)
121 return -ENOMEM; 134 return -ENOMEM;
122 135
@@ -132,6 +145,18 @@ static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
132 cell->ignore_resource_conflicts = true; 145 cell->ignore_resource_conflicts = true;
133 cell->id = id; 146 cell->id = id;
134 147
148 /* Check if we need to add an IRQ resource */
149 if (irq < 0)
150 return 0;
151
152 res++;
153
154 res->start = irq;
155 res->end = irq;
156 res->flags = IORESOURCE_IRQ;
157
158 cell->num_resources++;
159
135 return 0; 160 return 0;
136} 161}
137 162
@@ -143,7 +168,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
143 int ret; 168 int ret;
144 169
145 ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus", 170 ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
146 info->io_size_smbus, 171 info->io_size_smbus, -1,
147 id->device, &lpc_sch_cells[cells]); 172 id->device, &lpc_sch_cells[cells]);
148 if (ret < 0) 173 if (ret < 0)
149 return ret; 174 return ret;
@@ -151,7 +176,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
151 cells++; 176 cells++;
152 177
153 ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio", 178 ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
154 info->io_size_gpio, 179 info->io_size_gpio, info->irq_gpio,
155 id->device, &lpc_sch_cells[cells]); 180 id->device, &lpc_sch_cells[cells]);
156 if (ret < 0) 181 if (ret < 0)
157 return ret; 182 return ret;
@@ -159,7 +184,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
159 cells++; 184 cells++;
160 185
161 ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt", 186 ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
162 info->io_size_wdt, 187 info->io_size_wdt, -1,
163 id->device, &lpc_sch_cells[cells]); 188 id->device, &lpc_sch_cells[cells]);
164 if (ret < 0) 189 if (ret < 0)
165 return ret; 190 return ret;