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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-07-15 09:14:22 -0400
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-07-29 09:17:42 -0400
commite3d93b46718f12924128e5e70e2f3f992a95fa3b (patch)
tree4f3d246b2bdcc845808ab5805bacedc40ff85d59 /drivers
parent757b055a65c5e0f84185012ef45cc2e15a337b63 (diff)
sh-pfc: Consolidate PFC SoC data macros
Move macros defined in several SoC data files to a common location and document them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a73a4.c3
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7740.c5
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7778.c40
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7779.c61
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c57
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7372.c5
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh73a0.c5
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7734.c10
-rw-r--r--drivers/pinctrl/sh-pfc/sh_pfc.h168
9 files changed, 140 insertions, 214 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
index d5cbbc72ee4f..d8115331e6d3 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
@@ -428,9 +428,6 @@ enum {
428 PINMUX_MARK_END, 428 PINMUX_MARK_END,
429}; 429};
430 430
431#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx)
432#define PINMUX_DATA_ALL() CPU_ALL_PORT(_PORT_DATA, , unused)
433
434static const u16 pinmux_data[] = { 431static const u16 pinmux_data[] = {
435 /* specify valid pin states for each pin in GPIO mode */ 432 /* specify valid pin states for each pin in GPIO mode */
436 PINMUX_DATA_ALL(), 433 PINMUX_DATA_ALL(),
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index 214ac6ce3104..e6900511cb2b 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -583,11 +583,8 @@ enum {
583 PINMUX_MARK_END, 583 PINMUX_MARK_END,
584}; 584};
585 585
586#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx)
587#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_PORT_DATA, , unused)
588
589static const u16 pinmux_data[] = { 586static const u16 pinmux_data[] = {
590 PINMUX_DATA_GP_ALL(), 587 PINMUX_DATA_ALL(),
591 588
592 /* Port0 */ 589 /* Port0 */
593 PINMUX_DATA(DBGMDT2_MARK, PORT0_FN1), 590 PINMUX_DATA(DBGMDT2_MARK, PORT0_FN1),
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
index 018d8bcb23ae..40aecfee1581 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
@@ -23,26 +23,6 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include "sh_pfc.h" 24#include "sh_pfc.h"
25 25
26#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
27
28#define PORT_GP_32(bank, fn, sfx) \
29 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
30 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
31 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
32 PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
33 PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
34 PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
35 PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
36 PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
37 PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
38 PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
39 PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
40 PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
41 PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
42 PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
43 PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \
44 PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
45
46#define PORT_GP_27(bank, fn, sfx) \ 26#define PORT_GP_27(bank, fn, sfx) \
47 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \ 27 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
48 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \ 28 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
@@ -66,26 +46,6 @@
66 PORT_GP_32(3, fn, sfx), \ 46 PORT_GP_32(3, fn, sfx), \
67 PORT_GP_27(4, fn, sfx) 47 PORT_GP_27(4, fn, sfx)
68 48
69#define _GP_PORT_ALL(bank, pin, name, sfx) name##_##sfx
70
71#define _GP_GPIO(bank, pin, _name, sfx) \
72 [RCAR_GP_PIN(bank, pin)] = { \
73 .name = __stringify(_name), \
74 .enum_id = _name##_DATA, \
75 }
76
77#define _GP_DATA(bank, pin, name, sfx) \
78 PINMUX_DATA(name##_DATA, name##_FN)
79
80#define GP_ALL(str) CPU_ALL_PORT(_GP_PORT_ALL, str)
81#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
82#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
83
84#define PINMUX_IPSR_NOGP(ispr, fn) PINMUX_DATA(fn##_MARK, FN_##fn)
85#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
86#define PINMUX_IPSR_MSEL(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
87#define PINMUX_IPSR_NOGM(ispr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ms)
88
89enum { 49enum {
90 PINMUX_RESERVED = 0, 50 PINMUX_RESERVED = 0,
91 51
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
index 290de9a9815b..be832dcd8c03 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
@@ -24,51 +24,13 @@
24 24
25#include "sh_pfc.h" 25#include "sh_pfc.h"
26 26
27#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx) 27#define PORT_GP_9(bank, fn, sfx) \
28
29#define PORT_GP_32(bank, fn, sfx) \
30 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
31 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
32 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
33 PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
34 PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
35 PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
36 PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
37 PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
38 PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
39 PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
40 PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
41 PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
42 PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
43 PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
44 PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \
45 PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
46
47#define PORT_GP_32_9(bank, fn, sfx) \
48 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \ 28 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
49 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \ 29 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
50 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \ 30 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
51 PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \ 31 PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
52 PORT_GP_1(bank, 8, fn, sfx) 32 PORT_GP_1(bank, 8, fn, sfx)
53 33
54#define PORT_GP_32_REV(bank, fn, sfx) \
55 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
56 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
57 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
58 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
59 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
60 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
61 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
62 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
63 PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx), \
64 PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx), \
65 PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx), \
66 PORT_GP_1(bank, 9, fn, sfx), PORT_GP_1(bank, 8, fn, sfx), \
67 PORT_GP_1(bank, 7, fn, sfx), PORT_GP_1(bank, 6, fn, sfx), \
68 PORT_GP_1(bank, 5, fn, sfx), PORT_GP_1(bank, 4, fn, sfx), \
69 PORT_GP_1(bank, 3, fn, sfx), PORT_GP_1(bank, 2, fn, sfx), \
70 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
71
72#define CPU_ALL_PORT(fn, sfx) \ 34#define CPU_ALL_PORT(fn, sfx) \
73 PORT_GP_32(0, fn, sfx), \ 35 PORT_GP_32(0, fn, sfx), \
74 PORT_GP_32(1, fn, sfx), \ 36 PORT_GP_32(1, fn, sfx), \
@@ -76,26 +38,7 @@
76 PORT_GP_32(3, fn, sfx), \ 38 PORT_GP_32(3, fn, sfx), \
77 PORT_GP_32(4, fn, sfx), \ 39 PORT_GP_32(4, fn, sfx), \
78 PORT_GP_32(5, fn, sfx), \ 40 PORT_GP_32(5, fn, sfx), \
79 PORT_GP_32_9(6, fn, sfx) 41 PORT_GP_9(6, fn, sfx)
80
81#define _GP_PORT_ALL(bank, pin, name, sfx) name##_##sfx
82
83#define _GP_GPIO(bank, pin, _name, sfx) \
84 [RCAR_GP_PIN(bank, pin)] = { \
85 .name = __stringify(_name), \
86 .enum_id = _name##_DATA, \
87 }
88
89#define _GP_DATA(bank, pin, name, sfx) \
90 PINMUX_DATA(name##_DATA, name##_FN)
91
92#define GP_ALL(str) CPU_ALL_PORT(_GP_PORT_ALL, str)
93#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
94#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
95
96#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
97#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
98 FN_##ipsr, FN_##fn)
99 42
100enum { 43enum {
101 PINMUX_RESERVED = 0, 44 PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 3713c0088b0c..95b38fafe449 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -27,44 +27,6 @@
27#include "core.h" 27#include "core.h"
28#include "sh_pfc.h" 28#include "sh_pfc.h"
29 29
30#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
31
32#define PORT_GP_32(bank, fn, sfx) \
33 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
34 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
35 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
36 PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
37 PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
38 PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
39 PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
40 PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
41 PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
42 PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
43 PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
44 PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
45 PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
46 PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
47 PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \
48 PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
49
50#define PORT_GP_32_REV(bank, fn, sfx) \
51 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
52 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
53 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
54 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
55 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
56 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
57 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
58 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
59 PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx), \
60 PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx), \
61 PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx), \
62 PORT_GP_1(bank, 9, fn, sfx), PORT_GP_1(bank, 8, fn, sfx), \
63 PORT_GP_1(bank, 7, fn, sfx), PORT_GP_1(bank, 6, fn, sfx), \
64 PORT_GP_1(bank, 5, fn, sfx), PORT_GP_1(bank, 4, fn, sfx), \
65 PORT_GP_1(bank, 3, fn, sfx), PORT_GP_1(bank, 2, fn, sfx), \
66 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
67
68#define CPU_ALL_PORT(fn, sfx) \ 30#define CPU_ALL_PORT(fn, sfx) \
69 PORT_GP_32(0, fn, sfx), \ 31 PORT_GP_32(0, fn, sfx), \
70 PORT_GP_32(1, fn, sfx), \ 32 PORT_GP_32(1, fn, sfx), \
@@ -73,25 +35,6 @@
73 PORT_GP_32(4, fn, sfx), \ 35 PORT_GP_32(4, fn, sfx), \
74 PORT_GP_32(5, fn, sfx) 36 PORT_GP_32(5, fn, sfx)
75 37
76#define _GP_PORT_ALL(bank, pin, name, sfx) name##_##sfx
77
78#define _GP_GPIO(bank, pin, _name, sfx) \
79 [(bank * 32) + pin] = { \
80 .name = __stringify(_name), \
81 .enum_id = _name##_DATA, \
82 }
83
84#define _GP_DATA(bank, pin, name, sfx) \
85 PINMUX_DATA(name##_DATA, name##_FN)
86
87#define GP_ALL(str) CPU_ALL_PORT(_GP_PORT_ALL, str)
88#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
89#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
90
91#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
92#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
93 FN_##ipsr, FN_##fn)
94
95enum { 38enum {
96 PINMUX_RESERVED = 0, 39 PINMUX_RESERVED = 0,
97 40
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
index f269c46ad3fa..9174ff26738e 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -384,11 +384,8 @@ enum {
384 PINMUX_MARK_END, 384 PINMUX_MARK_END,
385}; 385};
386 386
387#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx)
388#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_PORT_DATA, , unused)
389
390static const u16 pinmux_data[] = { 387static const u16 pinmux_data[] = {
391 PINMUX_DATA_GP_ALL(), 388 PINMUX_DATA_ALL(),
392 389
393 /* IRQ */ 390 /* IRQ */
394 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0), 391 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 985acd023dd2..914b142d5c2c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -466,12 +466,9 @@ enum {
466 PINMUX_MARK_END, 466 PINMUX_MARK_END,
467}; 467};
468 468
469#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx)
470#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_PORT_DATA, , unused)
471
472static const u16 pinmux_data[] = { 469static const u16 pinmux_data[] = {
473 /* specify valid pin states for each pin in GPIO mode */ 470 /* specify valid pin states for each pin in GPIO mode */
474 PINMUX_DATA_GP_ALL(), 471 PINMUX_DATA_ALL(),
475 472
476 /* Table 25-1 (Function 0-7) */ 473 /* Table 25-1 (Function 0-7) */
477 PINMUX_DATA(VBUS_0_MARK, PORT0_FN1), 474 PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
index 1e1e3e02ec62..537a639e64b7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
@@ -31,6 +31,12 @@
31 PORT_32(fn, pfx##_4_, sfx), \ 31 PORT_32(fn, pfx##_4_, sfx), \
32 CPU_32_PORT5(fn, pfx##_5_, sfx) 32 CPU_32_PORT5(fn, pfx##_5_, sfx)
33 33
34#undef _GP_GPIO
35#undef _GP_DATA
36#undef GP_ALL
37#undef PINMUX_GPIO_GP_ALL
38#undef PINMUX_DATA_GP_ALL
39
34#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) 40#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
35#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ 41#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
36 GP##pfx##_IN, GP##pfx##_OUT) 42 GP##pfx##_IN, GP##pfx##_OUT)
@@ -45,10 +51,6 @@
45#define GP_INOUTSEL(bank) PORT_32_REV(_GP_INOUTSEL, _##bank##_, unused) 51#define GP_INOUTSEL(bank) PORT_32_REV(_GP_INOUTSEL, _##bank##_, unused)
46#define GP_INDT(bank) PORT_32_REV(_GP_INDT, _##bank##_, unused) 52#define GP_INDT(bank) PORT_32_REV(_GP_INDT, _##bank##_, unused)
47 53
48#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
49#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
50 FN_##ipsr, FN_##fn)
51
52enum { 54enum {
53 PINMUX_RESERVED = 0, 55 PINMUX_RESERVED = 0,
54 56
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 7ad1b040e4d7..ebddfe034172 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -66,19 +66,6 @@ struct pinmux_func {
66 const char *name; 66 const char *name;
67}; 67};
68 68
69#define PINMUX_GPIO(gpio, data_or_mark) \
70 [gpio] = { \
71 .name = __stringify(gpio), \
72 .enum_id = data_or_mark, \
73 }
74#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \
75 [gpio - (base)] = { \
76 .name = __stringify(gpio), \
77 .enum_id = data_or_mark, \
78 }
79
80#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
81
82struct pinmux_cfg_reg { 69struct pinmux_cfg_reg {
83 unsigned long reg, reg_width, field_width; 70 unsigned long reg, reg_width, field_width;
84 const u16 *enum_ids; 71 const u16 *enum_ids;
@@ -159,26 +146,108 @@ struct sh_pfc_soc_info {
159 unsigned long unlock_reg; 146 unsigned long unlock_reg;
160}; 147};
161 148
162/* helper macro for port */ 149/* -----------------------------------------------------------------------------
150 * Helper macros to create pin and port lists
151 */
152
153/*
154 * sh_pfc_soc_info gpio_data array macros
155 */
156
157#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
158
159#define PINMUX_IPSR_NOGP(ispr, fn) \
160 PINMUX_DATA(fn##_MARK, FN_##fn)
161#define PINMUX_IPSR_DATA(ipsr, fn) \
162 PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
163#define PINMUX_IPSR_NOGM(ispr, fn, ms) \
164 PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ms)
165#define PINMUX_IPSR_MSEL(ipsr, fn, ms) \
166 PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
167#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) \
168 PINMUX_DATA(fn##_MARK, FN_##ms, FN_##ipsr, FN_##fn)
169
170/*
171 * GP port style (32 ports banks)
172 */
173
174#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
175
176#define PORT_GP_32(bank, fn, sfx) \
177 PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
178 PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
179 PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
180 PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
181 PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
182 PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
183 PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
184 PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
185 PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
186 PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
187 PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
188 PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
189 PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
190 PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
191 PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \
192 PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
193
194#define PORT_GP_32_REV(bank, fn, sfx) \
195 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
196 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
197 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
198 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
199 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
200 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
201 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
202 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
203 PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx), \
204 PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx), \
205 PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx), \
206 PORT_GP_1(bank, 9, fn, sfx), PORT_GP_1(bank, 8, fn, sfx), \
207 PORT_GP_1(bank, 7, fn, sfx), PORT_GP_1(bank, 6, fn, sfx), \
208 PORT_GP_1(bank, 5, fn, sfx), PORT_GP_1(bank, 4, fn, sfx), \
209 PORT_GP_1(bank, 3, fn, sfx), PORT_GP_1(bank, 2, fn, sfx), \
210 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
211
212/* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */
213#define _GP_ALL(bank, pin, name, sfx) name##_##sfx
214#define GP_ALL(str) CPU_ALL_PORT(_GP_ALL, str)
215
216/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
217#define _GP_GPIO(bank, pin, _name, sfx) \
218 [(bank * 32) + pin] = { \
219 .name = __stringify(_name), \
220 .enum_id = _name##_DATA, \
221 }
222#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
223
224/* PINMUX_DATA_GP_ALL - Expand to a list of name_DATA, name_FN marks */
225#define _GP_DATA(bank, pin, name, sfx) PINMUX_DATA(name##_DATA, name##_FN)
226#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
227
228/*
229 * PORT style (linear pin space)
230 */
231
163#define PORT_1(fn, pfx, sfx) fn(pfx, sfx) 232#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
164 233
165#define PORT_10(fn, pfx, sfx) \ 234#define PORT_10(fn, pfx, sfx) \
166 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ 235 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
167 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ 236 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
168 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \ 237 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
169 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \ 238 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
170 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx) 239 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
171 240
172#define PORT_10_REV(fn, pfx, sfx) \ 241#define PORT_10_REV(fn, pfx, sfx) \
173 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ 242 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
174 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ 243 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
175 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ 244 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
176 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ 245 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
177 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) 246 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
178 247
179#define PORT_32(fn, pfx, sfx) \ 248#define PORT_32(fn, pfx, sfx) \
180 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ 249 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
181 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ 250 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
182 PORT_1(fn, pfx##31, sfx) 251 PORT_1(fn, pfx##31, sfx)
183 252
184#define PORT_32_REV(fn, pfx, sfx) \ 253#define PORT_32_REV(fn, pfx, sfx) \
@@ -187,22 +256,43 @@ struct sh_pfc_soc_info {
187 PORT_10_REV(fn, pfx, sfx) 256 PORT_10_REV(fn, pfx, sfx)
188 257
189#define PORT_90(fn, pfx, sfx) \ 258#define PORT_90(fn, pfx, sfx) \
190 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \ 259 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
191 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \ 260 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
192 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \ 261 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
193 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \ 262 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
194 PORT_10(fn, pfx##9, sfx) 263 PORT_10(fn, pfx##9, sfx)
195 264
196#define _PORT_ALL(pfx, sfx) pfx##_##sfx 265/* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */
197#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str) 266#define _PORT_ALL(pfx, sfx) pfx##_##sfx
198#define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK) 267#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
199 268
200/* helper macro for pinmux data arrays */ 269/* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
201#define PORT_DATA_IO(nr) \ 270#define PINMUX_GPIO(gpio, data_or_mark) \
202 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 271 [gpio] = { \
203 PORT##nr##_IN) 272 .name = __stringify(gpio), \
273 .enum_id = data_or_mark, \
274 }
275
276/* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
277 * PORT_name_OUT, PORT_name_IN marks
278 */
279#define _PORT_DATA(pfx, sfx) \
280 PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0, \
281 PORT##pfx##_OUT, PORT##pfx##_IN)
282#define PINMUX_DATA_ALL() CPU_ALL_PORT(_PORT_DATA, , unused)
283
284/* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */
285#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \
286 [gpio - (base)] = { \
287 .name = __stringify(gpio), \
288 .enum_id = data_or_mark, \
289 }
290#define GPIO_FN(str) \
291 PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
204 292
205/* helper macro for top 4 bits in PORTnCR */ 293/*
294 * PORTnCR macro
295 */
206#define _PCRH(in, in_pd, in_pu, out) \ 296#define _PCRH(in, in_pd, in_pu, out) \
207 0, (out), (in), 0, \ 297 0, (out), (in), 0, \
208 0, 0, 0, 0, \ 298 0, 0, 0, 0, \
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 02:20:45 -0400