aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorDaniel Kurtz <djkurtz@chromium.org>2012-03-30 07:46:42 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-12 15:14:08 -0400
commite2ba4fb313d91c9e888f973e65a736f8f55b12b6 (patch)
tree9be4225dd0482169d8d029608cfa44972838e8d4 /drivers
parent90e6b26d6b28ade684a4b16b856a74f27bc644bc (diff)
drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers
The POSTING_READ() calls were originally added to make sure the writes were flushed before any timing delays and across loops. Now that the code has settled a bit, let's remove them. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index c56cc350c9cf..cab879fedf3c 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -217,7 +217,6 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
217 (len << GMBUS_BYTE_COUNT_SHIFT) | 217 (len << GMBUS_BYTE_COUNT_SHIFT) |
218 (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) | 218 (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
219 GMBUS_SLAVE_READ | GMBUS_SW_RDY); 219 GMBUS_SLAVE_READ | GMBUS_SW_RDY);
220 POSTING_READ(GMBUS2 + reg_offset);
221 do { 220 do {
222 int ret; 221 int ret;
223 u32 val, loop = 0; 222 u32 val, loop = 0;
@@ -261,7 +260,6 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
261 (msg->len << GMBUS_BYTE_COUNT_SHIFT) | 260 (msg->len << GMBUS_BYTE_COUNT_SHIFT) |
262 (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) | 261 (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
263 GMBUS_SLAVE_WRITE | GMBUS_SW_RDY); 262 GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
264 POSTING_READ(GMBUS2 + reg_offset);
265 while (len) { 263 while (len) {
266 int ret; 264 int ret;
267 u32 gmbus2; 265 u32 gmbus2;
@@ -272,7 +270,6 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
272 } while (--len && ++loop < 4); 270 } while (--len && ++loop < 4);
273 271
274 I915_WRITE(GMBUS3 + reg_offset, val); 272 I915_WRITE(GMBUS3 + reg_offset, val);
275 POSTING_READ(GMBUS2 + reg_offset);
276 273
277 ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) & 274 ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &
278 (GMBUS_SATOER | GMBUS_HW_RDY), 275 (GMBUS_SATOER | GMBUS_HW_RDY),