diff options
author | Michael Chan <mchan@broadcom.com> | 2005-07-05 17:42:33 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2005-07-05 17:42:33 -0400 |
commit | d244c892c8e23d6baba88af88f78f7201a224d39 (patch) | |
tree | 03e79b06198f0e12bbf8d4bf25cfb93ee3c31eba /drivers | |
parent | e2ed4052aa662e7cfb22a1793b9d8158603be6d7 (diff) |
[TG3]: support for ethtool -C
Add support for ethtool -C with verification of user parameters.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/tg3.c | 65 | ||||
-rw-r--r-- | drivers/net/tg3.h | 10 |
2 files changed, 73 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 7e371b1209a1..7f84dc89bd77 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -5117,7 +5117,7 @@ static void tg3_set_bdinfo(struct tg3 *tp, u32 bdinfo_addr, | |||
5117 | } | 5117 | } |
5118 | 5118 | ||
5119 | static void __tg3_set_rx_mode(struct net_device *); | 5119 | static void __tg3_set_rx_mode(struct net_device *); |
5120 | static void tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec) | 5120 | static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec) |
5121 | { | 5121 | { |
5122 | tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs); | 5122 | tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs); |
5123 | tw32(HOSTCC_TXCOL_TICKS, ec->tx_coalesce_usecs); | 5123 | tw32(HOSTCC_TXCOL_TICKS, ec->tx_coalesce_usecs); |
@@ -5460,7 +5460,7 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5460 | udelay(10); | 5460 | udelay(10); |
5461 | } | 5461 | } |
5462 | 5462 | ||
5463 | tg3_set_coalesce(tp, &tp->coal); | 5463 | __tg3_set_coalesce(tp, &tp->coal); |
5464 | 5464 | ||
5465 | /* set status block DMA address */ | 5465 | /* set status block DMA address */ |
5466 | tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, | 5466 | tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, |
@@ -7821,6 +7821,60 @@ static int tg3_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) | |||
7821 | return 0; | 7821 | return 0; |
7822 | } | 7822 | } |
7823 | 7823 | ||
7824 | static int tg3_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) | ||
7825 | { | ||
7826 | struct tg3 *tp = netdev_priv(dev); | ||
7827 | u32 max_rxcoal_tick_int = 0, max_txcoal_tick_int = 0; | ||
7828 | u32 max_stat_coal_ticks = 0, min_stat_coal_ticks = 0; | ||
7829 | |||
7830 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) { | ||
7831 | max_rxcoal_tick_int = MAX_RXCOAL_TICK_INT; | ||
7832 | max_txcoal_tick_int = MAX_TXCOAL_TICK_INT; | ||
7833 | max_stat_coal_ticks = MAX_STAT_COAL_TICKS; | ||
7834 | min_stat_coal_ticks = MIN_STAT_COAL_TICKS; | ||
7835 | } | ||
7836 | |||
7837 | if ((ec->rx_coalesce_usecs > MAX_RXCOL_TICKS) || | ||
7838 | (ec->tx_coalesce_usecs > MAX_TXCOL_TICKS) || | ||
7839 | (ec->rx_max_coalesced_frames > MAX_RXMAX_FRAMES) || | ||
7840 | (ec->tx_max_coalesced_frames > MAX_TXMAX_FRAMES) || | ||
7841 | (ec->rx_coalesce_usecs_irq > max_rxcoal_tick_int) || | ||
7842 | (ec->tx_coalesce_usecs_irq > max_txcoal_tick_int) || | ||
7843 | (ec->rx_max_coalesced_frames_irq > MAX_RXCOAL_MAXF_INT) || | ||
7844 | (ec->tx_max_coalesced_frames_irq > MAX_TXCOAL_MAXF_INT) || | ||
7845 | (ec->stats_block_coalesce_usecs > max_stat_coal_ticks) || | ||
7846 | (ec->stats_block_coalesce_usecs < min_stat_coal_ticks)) | ||
7847 | return -EINVAL; | ||
7848 | |||
7849 | /* No rx interrupts will be generated if both are zero */ | ||
7850 | if ((ec->rx_coalesce_usecs == 0) && | ||
7851 | (ec->rx_max_coalesced_frames == 0)) | ||
7852 | return -EINVAL; | ||
7853 | |||
7854 | /* No tx interrupts will be generated if both are zero */ | ||
7855 | if ((ec->tx_coalesce_usecs == 0) && | ||
7856 | (ec->tx_max_coalesced_frames == 0)) | ||
7857 | return -EINVAL; | ||
7858 | |||
7859 | /* Only copy relevant parameters, ignore all others. */ | ||
7860 | tp->coal.rx_coalesce_usecs = ec->rx_coalesce_usecs; | ||
7861 | tp->coal.tx_coalesce_usecs = ec->tx_coalesce_usecs; | ||
7862 | tp->coal.rx_max_coalesced_frames = ec->rx_max_coalesced_frames; | ||
7863 | tp->coal.tx_max_coalesced_frames = ec->tx_max_coalesced_frames; | ||
7864 | tp->coal.rx_coalesce_usecs_irq = ec->rx_coalesce_usecs_irq; | ||
7865 | tp->coal.tx_coalesce_usecs_irq = ec->tx_coalesce_usecs_irq; | ||
7866 | tp->coal.rx_max_coalesced_frames_irq = ec->rx_max_coalesced_frames_irq; | ||
7867 | tp->coal.tx_max_coalesced_frames_irq = ec->tx_max_coalesced_frames_irq; | ||
7868 | tp->coal.stats_block_coalesce_usecs = ec->stats_block_coalesce_usecs; | ||
7869 | |||
7870 | if (netif_running(dev)) { | ||
7871 | tg3_full_lock(tp, 0); | ||
7872 | __tg3_set_coalesce(tp, &tp->coal); | ||
7873 | tg3_full_unlock(tp); | ||
7874 | } | ||
7875 | return 0; | ||
7876 | } | ||
7877 | |||
7824 | static struct ethtool_ops tg3_ethtool_ops = { | 7878 | static struct ethtool_ops tg3_ethtool_ops = { |
7825 | .get_settings = tg3_get_settings, | 7879 | .get_settings = tg3_get_settings, |
7826 | .set_settings = tg3_set_settings, | 7880 | .set_settings = tg3_set_settings, |
@@ -7856,6 +7910,7 @@ static struct ethtool_ops tg3_ethtool_ops = { | |||
7856 | .get_stats_count = tg3_get_stats_count, | 7910 | .get_stats_count = tg3_get_stats_count, |
7857 | .get_ethtool_stats = tg3_get_ethtool_stats, | 7911 | .get_ethtool_stats = tg3_get_ethtool_stats, |
7858 | .get_coalesce = tg3_get_coalesce, | 7912 | .get_coalesce = tg3_get_coalesce, |
7913 | .set_coalesce = tg3_set_coalesce, | ||
7859 | }; | 7914 | }; |
7860 | 7915 | ||
7861 | static void __devinit tg3_get_eeprom_size(struct tg3 *tp) | 7916 | static void __devinit tg3_get_eeprom_size(struct tg3 *tp) |
@@ -9800,6 +9855,12 @@ static void __devinit tg3_init_coal(struct tg3 *tp) | |||
9800 | ec->tx_coalesce_usecs = LOW_TXCOL_TICKS_CLRTCKS; | 9855 | ec->tx_coalesce_usecs = LOW_TXCOL_TICKS_CLRTCKS; |
9801 | ec->tx_coalesce_usecs_irq = DEFAULT_TXCOAL_TICK_INT_CLRTCKS; | 9856 | ec->tx_coalesce_usecs_irq = DEFAULT_TXCOAL_TICK_INT_CLRTCKS; |
9802 | } | 9857 | } |
9858 | |||
9859 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { | ||
9860 | ec->rx_coalesce_usecs_irq = 0; | ||
9861 | ec->tx_coalesce_usecs_irq = 0; | ||
9862 | ec->stats_block_coalesce_usecs = 0; | ||
9863 | } | ||
9803 | } | 9864 | } |
9804 | 9865 | ||
9805 | static int __devinit tg3_init_one(struct pci_dev *pdev, | 9866 | static int __devinit tg3_init_one(struct pci_dev *pdev, |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 99c5f9675a56..70ad450733e6 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -879,31 +879,41 @@ | |||
879 | #define LOW_RXCOL_TICKS_CLRTCKS 0x00000014 | 879 | #define LOW_RXCOL_TICKS_CLRTCKS 0x00000014 |
880 | #define DEFAULT_RXCOL_TICKS 0x00000048 | 880 | #define DEFAULT_RXCOL_TICKS 0x00000048 |
881 | #define HIGH_RXCOL_TICKS 0x00000096 | 881 | #define HIGH_RXCOL_TICKS 0x00000096 |
882 | #define MAX_RXCOL_TICKS 0x000003ff | ||
882 | #define HOSTCC_TXCOL_TICKS 0x00003c0c | 883 | #define HOSTCC_TXCOL_TICKS 0x00003c0c |
883 | #define LOW_TXCOL_TICKS 0x00000096 | 884 | #define LOW_TXCOL_TICKS 0x00000096 |
884 | #define LOW_TXCOL_TICKS_CLRTCKS 0x00000048 | 885 | #define LOW_TXCOL_TICKS_CLRTCKS 0x00000048 |
885 | #define DEFAULT_TXCOL_TICKS 0x0000012c | 886 | #define DEFAULT_TXCOL_TICKS 0x0000012c |
886 | #define HIGH_TXCOL_TICKS 0x00000145 | 887 | #define HIGH_TXCOL_TICKS 0x00000145 |
888 | #define MAX_TXCOL_TICKS 0x000003ff | ||
887 | #define HOSTCC_RXMAX_FRAMES 0x00003c10 | 889 | #define HOSTCC_RXMAX_FRAMES 0x00003c10 |
888 | #define LOW_RXMAX_FRAMES 0x00000005 | 890 | #define LOW_RXMAX_FRAMES 0x00000005 |
889 | #define DEFAULT_RXMAX_FRAMES 0x00000008 | 891 | #define DEFAULT_RXMAX_FRAMES 0x00000008 |
890 | #define HIGH_RXMAX_FRAMES 0x00000012 | 892 | #define HIGH_RXMAX_FRAMES 0x00000012 |
893 | #define MAX_RXMAX_FRAMES 0x000000ff | ||
891 | #define HOSTCC_TXMAX_FRAMES 0x00003c14 | 894 | #define HOSTCC_TXMAX_FRAMES 0x00003c14 |
892 | #define LOW_TXMAX_FRAMES 0x00000035 | 895 | #define LOW_TXMAX_FRAMES 0x00000035 |
893 | #define DEFAULT_TXMAX_FRAMES 0x0000004b | 896 | #define DEFAULT_TXMAX_FRAMES 0x0000004b |
894 | #define HIGH_TXMAX_FRAMES 0x00000052 | 897 | #define HIGH_TXMAX_FRAMES 0x00000052 |
898 | #define MAX_TXMAX_FRAMES 0x000000ff | ||
895 | #define HOSTCC_RXCOAL_TICK_INT 0x00003c18 | 899 | #define HOSTCC_RXCOAL_TICK_INT 0x00003c18 |
896 | #define DEFAULT_RXCOAL_TICK_INT 0x00000019 | 900 | #define DEFAULT_RXCOAL_TICK_INT 0x00000019 |
897 | #define DEFAULT_RXCOAL_TICK_INT_CLRTCKS 0x00000014 | 901 | #define DEFAULT_RXCOAL_TICK_INT_CLRTCKS 0x00000014 |
902 | #define MAX_RXCOAL_TICK_INT 0x000003ff | ||
898 | #define HOSTCC_TXCOAL_TICK_INT 0x00003c1c | 903 | #define HOSTCC_TXCOAL_TICK_INT 0x00003c1c |
899 | #define DEFAULT_TXCOAL_TICK_INT 0x00000019 | 904 | #define DEFAULT_TXCOAL_TICK_INT 0x00000019 |
900 | #define DEFAULT_TXCOAL_TICK_INT_CLRTCKS 0x00000014 | 905 | #define DEFAULT_TXCOAL_TICK_INT_CLRTCKS 0x00000014 |
906 | #define MAX_TXCOAL_TICK_INT 0x000003ff | ||
901 | #define HOSTCC_RXCOAL_MAXF_INT 0x00003c20 | 907 | #define HOSTCC_RXCOAL_MAXF_INT 0x00003c20 |
902 | #define DEFAULT_RXCOAL_MAXF_INT 0x00000005 | 908 | #define DEFAULT_RXCOAL_MAXF_INT 0x00000005 |
909 | #define MAX_RXCOAL_MAXF_INT 0x000000ff | ||
903 | #define HOSTCC_TXCOAL_MAXF_INT 0x00003c24 | 910 | #define HOSTCC_TXCOAL_MAXF_INT 0x00003c24 |
904 | #define DEFAULT_TXCOAL_MAXF_INT 0x00000005 | 911 | #define DEFAULT_TXCOAL_MAXF_INT 0x00000005 |
912 | #define MAX_TXCOAL_MAXF_INT 0x000000ff | ||
905 | #define HOSTCC_STAT_COAL_TICKS 0x00003c28 | 913 | #define HOSTCC_STAT_COAL_TICKS 0x00003c28 |
906 | #define DEFAULT_STAT_COAL_TICKS 0x000f4240 | 914 | #define DEFAULT_STAT_COAL_TICKS 0x000f4240 |
915 | #define MAX_STAT_COAL_TICKS 0xd693d400 | ||
916 | #define MIN_STAT_COAL_TICKS 0x00000064 | ||
907 | /* 0x3c2c --> 0x3c30 unused */ | 917 | /* 0x3c2c --> 0x3c30 unused */ |
908 | #define HOSTCC_STATS_BLK_HOST_ADDR 0x00003c30 /* 64-bit */ | 918 | #define HOSTCC_STATS_BLK_HOST_ADDR 0x00003c30 /* 64-bit */ |
909 | #define HOSTCC_STATUS_BLK_HOST_ADDR 0x00003c38 /* 64-bit */ | 919 | #define HOSTCC_STATUS_BLK_HOST_ADDR 0x00003c38 /* 64-bit */ |