Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 "The most notable new addition inside this pull request is the support
  for MIPS's latest and greatest core called "inter/proAptiv".  The
  patch series describes this core as follows.

    "The interAptiv is a power-efficient multi-core microprocessor
     for use in system-on-chip (SoC) applications. The interAptiv combines
     a multi-threading pipeline with a coherence manager to deliver improved
     computational throughput and power efficiency. The interAptiv can
     contain one to four MIPS32R3 interAptiv cores, system level
     coherence manager with L2 cache, optional coherent I/O port,
     and optional floating point unit."

  The platform specific patches touch all 3 Broadcom families.  It adds
  support for the new Broadcom/Netlogix XLP9xx Soc, building a common
  BCM63XX SMP kernel for all BCM63XX SoCs regardless of core type/count
  and full gpio button/led descriptions for BCM47xx.

  The rest of the series are cleanups and bug fixes that are MIPS
  generic and consist largely of changes that Imgtec/MIPS had published
  in their linux-mti-3.10.git stable tree.  Random other cleanups and
  patches preparing code to be merged in 3.15"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits)
  mips: select ARCH_MIGHT_HAVE_PC_SERIO
  mips: delete non-required instances of include <linux/init.h>
  MIPS: KVM: remove shadow_tlb code
  MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI
  mips/ide: flush dcache also if icache does not snoop dcache
  MIPS: BCM47XX: fix position of cpu_wait disabling
  MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value
  MIPS: update MIPS_L1_CACHE_SHIFT based on MIPS_L1_CACHE_SHIFT_<N>
  MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>
  MIPS: ZBOOT: gather string functions into string.c
  arch/mips/pci: don't check resource with devm_ioremap_resource
  arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource
  bcma: gpio: don't cast u32 to unsigned long
  ssb: gpio: add own IRQ domain
  MIPS: BCM47XX: fix sparse warnings in board.c
  MIPS: BCM47XX: add board detection for Linksys WRT54GS V1
  MIPS: BCM47XX: fix detection for some boards
  MIPS: BCM47XX: Enable buttons support on SSB
  MIPS: BCM47XX: Convert WNDR4500 to new syntax
  MIPS: BCM47XX: Use "timer" trigger for status LEDs
  ...

6 files changed, 437 insertions, 29 deletions

diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig
index 7c081b38ef3e..0ee48be23837 100644
--- a/drivers/bcma/Kconfig
+++ b/drivers/bcma/Kconfig
@@ -75,6 +75,7 @@ config BCMA_DRIVER_GMAC_CMN
 config BCMA_DRIVER_GPIO
         bool "BCMA GPIO driver"
         depends on BCMA && GPIOLIB
+        select IRQ_DOMAIN if BCMA_HOST_SOC
         help
           Driver to provide access to the GPIO pins of the bcma bus.
 
diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c
index 45f0996a3752..25f9887a35d0 100644
--- a/drivers/bcma/driver_gpio.c
+++ b/drivers/bcma/driver_gpio.c
@@ -9,6 +9,9 @@
  */
 
 #include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/irqdomain.h>
 #include <linux/export.h>
 #include <linux/bcma/bcma.h>
 
@@ -73,19 +76,136 @@ static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio)
         bcma_chipco_gpio_pullup(cc, 1 << gpio, 0);
 }
 
+#if IS_BUILTIN(CONFIG_BCMA_HOST_SOC)
 static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 {
         struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
 
         if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
-                return bcma_core_irq(cc->core);
+                return irq_find_mapping(cc->irq_domain, gpio);
         else
                 return -EINVAL;
 }
 
+static void bcma_gpio_irq_unmask(struct irq_data *d)
+{
+        struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
+        int gpio = irqd_to_hwirq(d);
+        u32 val = bcma_chipco_gpio_in(cc, BIT(gpio));
+
+        bcma_chipco_gpio_polarity(cc, BIT(gpio), val);
+        bcma_chipco_gpio_intmask(cc, BIT(gpio), BIT(gpio));
+}
+
+static void bcma_gpio_irq_mask(struct irq_data *d)
+{
+        struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
+        int gpio = irqd_to_hwirq(d);
+
+        bcma_chipco_gpio_intmask(cc, BIT(gpio), 0);
+}
+
+static struct irq_chip bcma_gpio_irq_chip = {
+        .name           = "BCMA-GPIO",
+        .irq_mask       = bcma_gpio_irq_mask,
+        .irq_unmask     = bcma_gpio_irq_unmask,
+};
+
+static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id)
+{
+        struct bcma_drv_cc *cc = dev_id;
+        u32 val = bcma_cc_read32(cc, BCMA_CC_GPIOIN);
+        u32 mask = bcma_cc_read32(cc, BCMA_CC_GPIOIRQ);
+        u32 pol = bcma_cc_read32(cc, BCMA_CC_GPIOPOL);
+        unsigned long irqs = (val ^ pol) & mask;
+        int gpio;
+
+        if (!irqs)
+                return IRQ_NONE;
+
+        for_each_set_bit(gpio, &irqs, cc->gpio.ngpio)
+                generic_handle_irq(bcma_gpio_to_irq(&cc->gpio, gpio));
+        bcma_chipco_gpio_polarity(cc, irqs, val & irqs);
+
+        return IRQ_HANDLED;
+}
+
+static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
+{
+        struct gpio_chip *chip = &cc->gpio;
+        int gpio, hwirq, err;
+
+        if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
+                return 0;
+
+        cc->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
+                                               &irq_domain_simple_ops, cc);
+        if (!cc->irq_domain) {
+                err = -ENODEV;
+                goto err_irq_domain;
+        }
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_create_mapping(cc->irq_domain, gpio);
+
+                irq_set_chip_data(irq, cc);
+                irq_set_chip_and_handler(irq, &bcma_gpio_irq_chip,
+                                         handle_simple_irq);
+        }
+
+        hwirq = bcma_core_irq(cc->core);
+        err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio",
+                          cc);
+        if (err)
+                goto err_req_irq;
+
+        bcma_chipco_gpio_intmask(cc, ~0, 0);
+        bcma_cc_set32(cc, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO);
+
+        return 0;
+
+err_req_irq:
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_find_mapping(cc->irq_domain, gpio);
+
+                irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(cc->irq_domain);
+err_irq_domain:
+        return err;
+}
+
+static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
+{
+        struct gpio_chip *chip = &cc->gpio;
+        int gpio;
+
+        if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
+                return;
+
+        bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO);
+        free_irq(bcma_core_irq(cc->core), cc);
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_find_mapping(cc->irq_domain, gpio);
+
+                irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(cc->irq_domain);
+}
+#else
+static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
+{
+        return 0;
+}
+
+static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
+{
+}
+#endif
+
 int bcma_gpio_init(struct bcma_drv_cc *cc)
 {
         struct gpio_chip *chip = &cc->gpio;
+        int err;
 
         chip->label             = "bcma_gpio";
         chip->owner             = THIS_MODULE;
@@ -95,7 +215,9 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
         chip->set               = bcma_gpio_set_value;
         chip->direction_input   = bcma_gpio_direction_input;
         chip->direction_output  = bcma_gpio_direction_output;
+#if IS_BUILTIN(CONFIG_BCMA_HOST_SOC)
         chip->to_irq            = bcma_gpio_to_irq;
+#endif
         chip->ngpio             = 16;
         /* There is just one SoC in one device and its GPIO addresses should be
          * deterministic to address them more easily. The other buses could get
@@ -105,10 +227,21 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
         else
                 chip->base              = -1;
 
-        return gpiochip_add(chip);
+        err = bcma_gpio_irq_domain_init(cc);
+        if (err)
+                return err;
+
+        err = gpiochip_add(chip);
+        if (err) {
+                bcma_gpio_irq_domain_exit(cc);
+                return err;
+        }
+
+        return 0;
 }
 
 int bcma_gpio_unregister(struct bcma_drv_cc *cc)
 {
+        bcma_gpio_irq_domain_exit(cc);
         return gpiochip_remove(&cc->gpio);
 }
diff --git a/drivers/ssb/Kconfig b/drivers/ssb/Kconfig
index 2cd9b0e44a41..75b3603906c1 100644
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -168,6 +168,7 @@ config SSB_DRIVER_GIGE
 config SSB_DRIVER_GPIO
         bool "SSB GPIO driver"
         depends on SSB && GPIOLIB
+        select IRQ_DOMAIN if SSB_EMBEDDED
         help
           Driver to provide access to the GPIO pins on the bus.
 
diff --git a/drivers/ssb/driver_gpio.c b/drivers/ssb/driver_gpio.c
index dc109de228c6..ba350d2035c0 100644
--- a/drivers/ssb/driver_gpio.c
+++ b/drivers/ssb/driver_gpio.c
@@ -9,16 +9,40 @@
  */
 
 #include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/irqdomain.h>
 #include <linux/export.h>
 #include <linux/ssb/ssb.h>
 
 #include "ssb_private.h"
 
+
+/**************************************************
+ * Shared
+ **************************************************/
+
 static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
 {
         return container_of(chip, struct ssb_bus, gpio);
 }
 
+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
+static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        if (bus->bustype == SSB_BUSTYPE_SSB)
+                return irq_find_mapping(bus->irq_domain, gpio);
+        else
+                return -EINVAL;
+}
+#endif
+
+/**************************************************
+ * ChipCommon
+ **************************************************/
+
 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
 {
         struct ssb_bus *bus = ssb_gpio_get_bus(chip);
@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio)
         ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
 }
 
-static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
+static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
 {
-        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+        struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
+        int gpio = irqd_to_hwirq(d);
 
-        if (bus->bustype == SSB_BUSTYPE_SSB)
-                return ssb_mips_irq(bus->chipco.dev) + 2;
-        else
-                return -EINVAL;
+        ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
+}
+
+static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
+{
+        struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
+        int gpio = irqd_to_hwirq(d);
+        u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
+
+        ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
+        ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
+}
+
+static struct irq_chip ssb_gpio_irq_chipco_chip = {
+        .name           = "SSB-GPIO-CC",
+        .irq_mask       = ssb_gpio_irq_chipco_mask,
+        .irq_unmask     = ssb_gpio_irq_chipco_unmask,
+};
+
+static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
+{
+        struct ssb_bus *bus = dev_id;
+        struct ssb_chipcommon *chipco = &bus->chipco;
+        u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
+        u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
+        u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
+        unsigned long irqs = (val ^ pol) & mask;
+        int gpio;
+
+        if (!irqs)
+                return IRQ_NONE;
+
+        for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
+                generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
+        ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
+
+        return IRQ_HANDLED;
+}
+
+static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
+{
+        struct ssb_chipcommon *chipco = &bus->chipco;
+        struct gpio_chip *chip = &bus->gpio;
+        int gpio, hwirq, err;
+
+        if (bus->bustype != SSB_BUSTYPE_SSB)
+                return 0;
+
+        bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
+                                                &irq_domain_simple_ops, chipco);
+        if (!bus->irq_domain) {
+                err = -ENODEV;
+                goto err_irq_domain;
+        }
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_create_mapping(bus->irq_domain, gpio);
+
+                irq_set_chip_data(irq, bus);
+                irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
+                                         handle_simple_irq);
+        }
+
+        hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
+        err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
+                          "gpio", bus);
+        if (err)
+                goto err_req_irq;
+
+        ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
+        chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
+
+        return 0;
+
+err_req_irq:
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_find_mapping(bus->irq_domain, gpio);
+
+                irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(bus->irq_domain);
+err_irq_domain:
+        return err;
+}
+
+static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
+{
+        struct ssb_chipcommon *chipco = &bus->chipco;
+        struct gpio_chip *chip = &bus->gpio;
+        int gpio;
+
+        if (bus->bustype != SSB_BUSTYPE_SSB)
+                return;
+
+        chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
+        free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_find_mapping(bus->irq_domain, gpio);
+
+                irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(bus->irq_domain);
+}
+#else
+static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
+{
+        return 0;
 }
 
+static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
+{
+}
+#endif
+
 static int ssb_gpio_chipco_init(struct ssb_bus *bus)
 {
         struct gpio_chip *chip = &bus->gpio;
+        int err;
 
         chip->label             = "ssb_chipco_gpio";
         chip->owner             = THIS_MODULE;
@@ -96,7 +230,9 @@ static int ssb_gpio_chipco_init(struct ssb_bus *bus)
         chip->set               = ssb_gpio_chipco_set_value;
         chip->direction_input   = ssb_gpio_chipco_direction_input;
         chip->direction_output  = ssb_gpio_chipco_direction_output;
-        chip->to_irq            = ssb_gpio_chipco_to_irq;
+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
+        chip->to_irq            = ssb_gpio_to_irq;
+#endif
         chip->ngpio             = 16;
         /* There is just one SoC in one device and its GPIO addresses should be
          * deterministic to address them more easily. The other buses could get
@@ -106,9 +242,23 @@ static int ssb_gpio_chipco_init(struct ssb_bus *bus)
         else
                 chip->base              = -1;
 
-        return gpiochip_add(chip);
+        err = ssb_gpio_irq_chipco_domain_init(bus);
+        if (err)
+                return err;
+
+        err = gpiochip_add(chip);
+        if (err) {
+                ssb_gpio_irq_chipco_domain_exit(bus);
+                return err;
+        }
+
+        return 0;
 }
 
+/**************************************************
+ * EXTIF
+ **************************************************/
+
 #ifdef CONFIG_SSB_DRIVER_EXTIF
 
 static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
@@ -145,19 +295,127 @@ static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
         return 0;
 }
 
-static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
+static void ssb_gpio_irq_extif_mask(struct irq_data *d)
 {
-        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+        struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
+        int gpio = irqd_to_hwirq(d);
 
-        if (bus->bustype == SSB_BUSTYPE_SSB)
-                return ssb_mips_irq(bus->extif.dev) + 2;
-        else
-                return -EINVAL;
+        ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
+}
+
+static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
+{
+        struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
+        int gpio = irqd_to_hwirq(d);
+        u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
+
+        ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
+        ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
+}
+
+static struct irq_chip ssb_gpio_irq_extif_chip = {
+        .name           = "SSB-GPIO-EXTIF",
+        .irq_mask       = ssb_gpio_irq_extif_mask,
+        .irq_unmask     = ssb_gpio_irq_extif_unmask,
+};
+
+static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
+{
+        struct ssb_bus *bus = dev_id;
+        struct ssb_extif *extif = &bus->extif;
+        u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
+        u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
+        u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
+        unsigned long irqs = (val ^ pol) & mask;
+        int gpio;
+
+        if (!irqs)
+                return IRQ_NONE;
+
+        for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
+                generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
+        ssb_extif_gpio_polarity(extif, irqs, val & irqs);
+
+        return IRQ_HANDLED;
+}
+
+static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
+{
+        struct ssb_extif *extif = &bus->extif;
+        struct gpio_chip *chip = &bus->gpio;
+        int gpio, hwirq, err;
+
+        if (bus->bustype != SSB_BUSTYPE_SSB)
+                return 0;
+
+        bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
+                                                &irq_domain_simple_ops, extif);
+        if (!bus->irq_domain) {
+                err = -ENODEV;
+                goto err_irq_domain;
+        }
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_create_mapping(bus->irq_domain, gpio);
+
+                irq_set_chip_data(irq, bus);
+                irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
+                                         handle_simple_irq);
+        }
+
+        hwirq = ssb_mips_irq(bus->extif.dev) + 2;
+        err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
+                          "gpio", bus);
+        if (err)
+                goto err_req_irq;
+
+        ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
+
+        return 0;
+
+err_req_irq:
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_find_mapping(bus->irq_domain, gpio);
+
+                irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(bus->irq_domain);
+err_irq_domain:
+        return err;
+}
+
+static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
+{
+        struct ssb_extif *extif = &bus->extif;
+        struct gpio_chip *chip = &bus->gpio;
+        int gpio;
+
+        if (bus->bustype != SSB_BUSTYPE_SSB)
+                return;
+
+        free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
+        for (gpio = 0; gpio < chip->ngpio; gpio++) {
+                int irq = irq_find_mapping(bus->irq_domain, gpio);
+
+                irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(bus->irq_domain);
 }
+#else
+static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
+{
+        return 0;
+}
+
+static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
+{
+}
+#endif
 
 static int ssb_gpio_extif_init(struct ssb_bus *bus)
 {
         struct gpio_chip *chip = &bus->gpio;
+        int err;
 
         chip->label             = "ssb_extif_gpio";
         chip->owner             = THIS_MODULE;
@@ -165,7 +423,9 @@ static int ssb_gpio_extif_init(struct ssb_bus *bus)
         chip->set               = ssb_gpio_extif_set_value;
         chip->direction_input   = ssb_gpio_extif_direction_input;
         chip->direction_output  = ssb_gpio_extif_direction_output;
-        chip->to_irq            = ssb_gpio_extif_to_irq;
+#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
+        chip->to_irq            = ssb_gpio_to_irq;
+#endif
         chip->ngpio             = 5;
         /* There is just one SoC in one device and its GPIO addresses should be
          * deterministic to address them more easily. The other buses could get
@@ -175,7 +435,17 @@ static int ssb_gpio_extif_init(struct ssb_bus *bus)
         else
                 chip->base              = -1;
 
-        return gpiochip_add(chip);
+        err = ssb_gpio_irq_extif_domain_init(bus);
+        if (err)
+                return err;
+
+        err = gpiochip_add(chip);
+        if (err) {
+                ssb_gpio_irq_extif_domain_exit(bus);
+                return err;
+        }
+
+        return 0;
 }
 
 #else
@@ -185,6 +455,10 @@ static int ssb_gpio_extif_init(struct ssb_bus *bus)
 }
 #endif
 
+/**************************************************
+ * Init
+ **************************************************/
+
 int ssb_gpio_init(struct ssb_bus *bus)
 {
         if (ssb_chipco_available(&bus->chipco))
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 32a811d11c25..2fead3820849 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -593,6 +593,13 @@ static int ssb_attach_queued_buses(void)
                 ssb_pcicore_init(&bus->pcicore);
                 if (bus->bustype == SSB_BUSTYPE_SSB)
                         ssb_watchdog_register(bus);
+
+                err = ssb_gpio_init(bus);
+                if (err == -ENOTSUPP)
+                        ssb_dbg("GPIO driver not activated\n");
+                else if (err)
+                        ssb_dbg("Error registering GPIO driver: %i\n", err);
+
                 ssb_bus_may_powerdown(bus);
 
                 err = ssb_devices_register(bus);
@@ -830,11 +837,6 @@ static int ssb_bus_register(struct ssb_bus *bus,
         ssb_chipcommon_init(&bus->chipco);
         ssb_extif_init(&bus->extif);
         ssb_mipscore_init(&bus->mipscore);
-        err = ssb_gpio_init(bus);
-        if (err == -ENOTSUPP)
-                ssb_dbg("GPIO driver not activated\n");
-        else if (err)
-                ssb_dbg("Error registering GPIO driver: %i\n", err);
         err = ssb_fetch_invariants(bus, get_invariants);
         if (err) {
                 ssb_bus_may_powerdown(bus);
diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
index 649d5129c4b4..78e82b017b92 100644
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -29,10 +29,7 @@
 #include <linux/sysrq.h>
 #include <linux/serial.h>
 #include <linux/serial_core.h>
-
-#include <bcm63xx_irq.h>
-#include <bcm63xx_regs.h>
-#include <bcm63xx_io.h>
+#include <linux/serial_bcm63xx.h>
 
 #define BCM63XX_NR_UARTS        2
 
@@ -81,13 +78,13 @@ static struct uart_port ports[BCM63XX_NR_UARTS];
 static inline unsigned int bcm_uart_readl(struct uart_port *port,
                                          unsigned int offset)
 {
-        return bcm_readl(port->membase + offset);
+        return __raw_readl(port->membase + offset);
 }
 
 static inline void bcm_uart_writel(struct uart_port *port,
                                   unsigned int value, unsigned int offset)
 {
-        bcm_writel(value, port->membase + offset);
+        __raw_writel(value, port->membase + offset);
 }
 
 /*