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authorDan Williams <dan.j.williams@intel.com>2010-05-17 19:24:16 -0400
committerDan Williams <dan.j.williams@intel.com>2010-05-17 19:24:16 -0400
commitcaa20d974c86af496b419eef70010e63b7fab7ac (patch)
treea38165bd839a398528a4ef4c7fa8481fb0fefed3 /drivers
parentc86e1401c9f2ba8d989fa1c4b33d0f0ec3ba8aaf (diff)
async_tx: trim dma_async_tx_descriptor in 'no channel switch' case
Saves 24 bytes per descriptor (64-bit) when the channel-switching capabilities of async_tx are not required. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/dmaengine.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index d18b5d069d7e..fcfe1a62ffa5 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -978,7 +978,9 @@ void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
978 struct dma_chan *chan) 978 struct dma_chan *chan)
979{ 979{
980 tx->chan = chan; 980 tx->chan = chan;
981 #ifndef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH
981 spin_lock_init(&tx->lock); 982 spin_lock_init(&tx->lock);
983 #endif
982} 984}
983EXPORT_SYMBOL(dma_async_tx_descriptor_init); 985EXPORT_SYMBOL(dma_async_tx_descriptor_init);
984 986
@@ -1011,7 +1013,7 @@ EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
1011 */ 1013 */
1012void dma_run_dependencies(struct dma_async_tx_descriptor *tx) 1014void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1013{ 1015{
1014 struct dma_async_tx_descriptor *dep = tx->next; 1016 struct dma_async_tx_descriptor *dep = txd_next(tx);
1015 struct dma_async_tx_descriptor *dep_next; 1017 struct dma_async_tx_descriptor *dep_next;
1016 struct dma_chan *chan; 1018 struct dma_chan *chan;
1017 1019
@@ -1019,7 +1021,7 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1019 return; 1021 return;
1020 1022
1021 /* we'll submit tx->next now, so clear the link */ 1023 /* we'll submit tx->next now, so clear the link */
1022 tx->next = NULL; 1024 txd_clear_next(tx);
1023 chan = dep->chan; 1025 chan = dep->chan;
1024 1026
1025 /* keep submitting up until a channel switch is detected 1027 /* keep submitting up until a channel switch is detected
@@ -1027,14 +1029,14 @@ void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1027 * processing the interrupt from async_tx_channel_switch 1029 * processing the interrupt from async_tx_channel_switch
1028 */ 1030 */
1029 for (; dep; dep = dep_next) { 1031 for (; dep; dep = dep_next) {
1030 spin_lock_bh(&dep->lock); 1032 txd_lock(dep);
1031 dep->parent = NULL; 1033 txd_clear_parent(dep);
1032 dep_next = dep->next; 1034 dep_next = txd_next(dep);
1033 if (dep_next && dep_next->chan == chan) 1035 if (dep_next && dep_next->chan == chan)
1034 dep->next = NULL; /* ->next will be submitted */ 1036 txd_clear_next(dep); /* ->next will be submitted */
1035 else 1037 else
1036 dep_next = NULL; /* submit current dep and terminate */ 1038 dep_next = NULL; /* submit current dep and terminate */
1037 spin_unlock_bh(&dep->lock); 1039 txd_unlock(dep);
1038 1040
1039 dep->tx_submit(dep); 1041 dep->tx_submit(dep);
1040 } 1042 }