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authorWei WANG <wei_wang@realsil.com.cn>2013-01-22 20:51:06 -0500
committerSamuel Ortiz <sameo@linux.intel.com>2013-01-26 19:30:20 -0500
commitab4e8f8b7bdfeff0c961fdbbdacb262d68f094c0 (patch)
tree543440d2656343141c14e565e795a655378a0f72 /drivers
parentef85e736b1052d8c1e56990f0d08b6fce7cdbe41 (diff)
mfd: rtsx: Add clock divider hook
Add callback function conv_clk_and_div_n to convert between SSC clock and its divider N. For rtl8411, the formula to calculate SSC clock divider N is different with the other card reader models. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/rtl8411.c13
-rw-r--r--drivers/mfd/rts5209.c1
-rw-r--r--drivers/mfd/rts5229.c1
-rw-r--r--drivers/mfd/rtsx_pcr.c14
4 files changed, 27 insertions, 2 deletions
diff --git a/drivers/mfd/rtl8411.c b/drivers/mfd/rtl8411.c
index 5058ba8dec3b..3d3b4addf81a 100644
--- a/drivers/mfd/rtl8411.c
+++ b/drivers/mfd/rtl8411.c
@@ -178,6 +178,18 @@ static unsigned int rtl8411_cd_deglitch(struct rtsx_pcr *pcr)
178 return card_exist; 178 return card_exist;
179} 179}
180 180
181static int rtl8411_conv_clk_and_div_n(int input, int dir)
182{
183 int output;
184
185 if (dir == CLK_TO_DIV_N)
186 output = input * 4 / 5 - 2;
187 else
188 output = (input + 2) * 5 / 4;
189
190 return output;
191}
192
181static const struct pcr_ops rtl8411_pcr_ops = { 193static const struct pcr_ops rtl8411_pcr_ops = {
182 .extra_init_hw = rtl8411_extra_init_hw, 194 .extra_init_hw = rtl8411_extra_init_hw,
183 .optimize_phy = NULL, 195 .optimize_phy = NULL,
@@ -189,6 +201,7 @@ static const struct pcr_ops rtl8411_pcr_ops = {
189 .card_power_off = rtl8411_card_power_off, 201 .card_power_off = rtl8411_card_power_off,
190 .switch_output_voltage = rtl8411_switch_output_voltage, 202 .switch_output_voltage = rtl8411_switch_output_voltage,
191 .cd_deglitch = rtl8411_cd_deglitch, 203 .cd_deglitch = rtl8411_cd_deglitch,
204 .conv_clk_and_div_n = rtl8411_conv_clk_and_div_n,
192}; 205};
193 206
194/* SD Pull Control Enable: 207/* SD Pull Control Enable:
diff --git a/drivers/mfd/rts5209.c b/drivers/mfd/rts5209.c
index ba74de8a7c24..98fe0f39463e 100644
--- a/drivers/mfd/rts5209.c
+++ b/drivers/mfd/rts5209.c
@@ -174,6 +174,7 @@ static const struct pcr_ops rts5209_pcr_ops = {
174 .card_power_off = rts5209_card_power_off, 174 .card_power_off = rts5209_card_power_off,
175 .switch_output_voltage = rts5209_switch_output_voltage, 175 .switch_output_voltage = rts5209_switch_output_voltage,
176 .cd_deglitch = NULL, 176 .cd_deglitch = NULL,
177 .conv_clk_and_div_n = NULL,
177}; 178};
178 179
179/* SD Pull Control Enable: 180/* SD Pull Control Enable:
diff --git a/drivers/mfd/rts5229.c b/drivers/mfd/rts5229.c
index ec1747adf5d3..29d889cbb9c5 100644
--- a/drivers/mfd/rts5229.c
+++ b/drivers/mfd/rts5229.c
@@ -144,6 +144,7 @@ static const struct pcr_ops rts5229_pcr_ops = {
144 .card_power_off = rts5229_card_power_off, 144 .card_power_off = rts5229_card_power_off,
145 .switch_output_voltage = rts5229_switch_output_voltage, 145 .switch_output_voltage = rts5229_switch_output_voltage,
146 .cd_deglitch = NULL, 146 .cd_deglitch = NULL,
147 .conv_clk_and_div_n = NULL,
147}; 148};
148 149
149/* SD Pull Control Enable: 150/* SD Pull Control Enable:
diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c
index f4e02d089271..910200e10fa0 100644
--- a/drivers/mfd/rtsx_pcr.c
+++ b/drivers/mfd/rtsx_pcr.c
@@ -630,7 +630,10 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
630 if (clk == pcr->cur_clock) 630 if (clk == pcr->cur_clock)
631 return 0; 631 return 0;
632 632
633 N = (u8)(clk - 2); 633 if (pcr->ops->conv_clk_and_div_n)
634 N = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N);
635 else
636 N = (u8)(clk - 2);
634 if ((clk <= 2) || (N > max_N)) 637 if ((clk <= 2) || (N > max_N))
635 return -EINVAL; 638 return -EINVAL;
636 639
@@ -641,7 +644,14 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
641 /* Make sure that the SSC clock div_n is equal or greater than min_N */ 644 /* Make sure that the SSC clock div_n is equal or greater than min_N */
642 div = CLK_DIV_1; 645 div = CLK_DIV_1;
643 while ((N < min_N) && (div < max_div)) { 646 while ((N < min_N) && (div < max_div)) {
644 N = (N + 2) * 2 - 2; 647 if (pcr->ops->conv_clk_and_div_n) {
648 int dbl_clk = pcr->ops->conv_clk_and_div_n(N,
649 DIV_N_TO_CLK) * 2;
650 N = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk,
651 CLK_TO_DIV_N);
652 } else {
653 N = (N + 2) * 2 - 2;
654 }
645 div++; 655 div++;
646 } 656 }
647 dev_dbg(&(pcr->pci->dev), "N = %d, div = %d\n", N, div); 657 dev_dbg(&(pcr->pci->dev), "N = %d, div = %d\n", N, div);