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authorTomoya MORINAGA <tomoya-linux@dsn.okisemi.com>2011-02-22 20:03:16 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2011-02-22 20:22:03 -0500
commitaac6c0b0fd6458f166651fc102695fb8836a4d95 (patch)
tree4d6dcf555b22c8d79dbc292eee6f915fbb7b4f82 /drivers
parent23877fdc6df3306037d81d2ac71c2d6e26ec08f4 (diff)
pch_uart: fix uart clock setting issue
Currently, uart clock is not set correctly. This patch fixes the issue. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/tty/serial/pch_uart.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 68855351c76e..189886122516 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -1089,7 +1089,12 @@ static int pch_uart_startup(struct uart_port *port)
1089 1089
1090 priv = container_of(port, struct eg20t_port, port); 1090 priv = container_of(port, struct eg20t_port, port);
1091 priv->tx_empty = 1; 1091 priv->tx_empty = 1;
1092 port->uartclk = priv->base_baud; 1092
1093 if (port->uartclk)
1094 priv->base_baud = port->uartclk;
1095 else
1096 port->uartclk = priv->base_baud;
1097
1093 pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT); 1098 pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT);
1094 ret = pch_uart_hal_set_line(priv, default_baud, 1099 ret = pch_uart_hal_set_line(priv, default_baud,
1095 PCH_UART_HAL_PARITY_NONE, PCH_UART_HAL_8BIT, 1100 PCH_UART_HAL_PARITY_NONE, PCH_UART_HAL_8BIT,