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authorBrian Niebuhr <bniebuhr@efjohnson.com>2010-10-01 04:30:48 -0400
committerSekhar Nori <nsekhar@ti.com>2010-11-18 08:08:34 -0500
commita4f4497b86a689aa8c827d4ebe0d00c4eba66f76 (patch)
tree63fe8cdaf22c83b6f1d8214e784f0c385b80493e /drivers
parent49fc3f497d7d409e9b0dc384fe7c173bccd3b1a1 (diff)
spi: davinci: fix DMA event generation stoppage
Do not stop SPI DMA event generation in either transmit or receive DMA event call back because the single setting affects both transmit and receive event generation. Depending on the order in which the callbacks happen, transmit or receive events can get unintentionally stalled. Instead, disable event generation once after both the transmit and receive DMA completes. While at it, remove the largely under-used function to set or clear DMA event generation. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/davinci_spi.c18
1 files changed, 3 insertions, 15 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 67f1e463c1f0..9695f98b03bd 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -211,16 +211,6 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits)
211 iowrite32(v, addr); 211 iowrite32(v, addr);
212} 212}
213 213
214static void davinci_spi_set_dma_req(const struct spi_device *spi, int enable)
215{
216 struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master);
217
218 if (enable)
219 set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
220 else
221 clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
222}
223
224/* 214/*
225 * Interface to control the chip select signal 215 * Interface to control the chip select signal
226 */ 216 */
@@ -414,8 +404,6 @@ static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
414 edma_clean_channel(davinci_spi_dma->dma_rx_channel); 404 edma_clean_channel(davinci_spi_dma->dma_rx_channel);
415 405
416 complete(&davinci_spi_dma->dma_rx_completion); 406 complete(&davinci_spi_dma->dma_rx_completion);
417 /* We must disable the DMA RX request */
418 davinci_spi_set_dma_req(spi, 0);
419} 407}
420 408
421static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) 409static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
@@ -433,8 +421,6 @@ static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
433 edma_clean_channel(davinci_spi_dma->dma_tx_channel); 421 edma_clean_channel(davinci_spi_dma->dma_tx_channel);
434 422
435 complete(&davinci_spi_dma->dma_tx_completion); 423 complete(&davinci_spi_dma->dma_tx_completion);
436 /* We must disable the DMA TX request */
437 davinci_spi_set_dma_req(spi, 0);
438} 424}
439 425
440static int davinci_spi_request_dma(struct spi_device *spi) 426static int davinci_spi_request_dma(struct spi_device *spi)
@@ -831,7 +817,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
831 817
832 edma_start(davinci_spi_dma->dma_rx_channel); 818 edma_start(davinci_spi_dma->dma_rx_channel);
833 edma_start(davinci_spi_dma->dma_tx_channel); 819 edma_start(davinci_spi_dma->dma_tx_channel);
834 davinci_spi_set_dma_req(spi, 1); 820 set_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
835 821
836 wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion); 822 wait_for_completion_interruptible(&davinci_spi_dma->dma_tx_completion);
837 wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion); 823 wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion);
@@ -841,6 +827,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
841 827
842 dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE); 828 dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE);
843 829
830 clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN);
831
844 /* 832 /*
845 * Check for bit error, desync error,parity error,timeout error and 833 * Check for bit error, desync error,parity error,timeout error and
846 * receive overflow errors 834 * receive overflow errors