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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-10 12:01:01 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-10 12:01:01 -0500
commit9e66645d72d3c395da92b0f8855c787f4b5f0e89 (patch)
tree61b94adb6c32340c45b6d984837556b6b845e983 /drivers
parentecb50f0afd35a51ef487e8a54b976052eb03d729 (diff)
parent74faaf7aa64c76b60db0f5c994fd43a46be772ce (diff)
Merge branch 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq domain updates from Thomas Gleixner: "The real interesting irq updates: - Support for hierarchical irq domains: For complex interrupt routing scenarios where more than one interrupt related chip is involved we had no proper representation in the generic interrupt infrastructure so far. That made people implement rather ugly constructs in their nested irq chip implementations. The main offenders are x86 and arm/gic. To distangle that mess we have now hierarchical irqdomains which seperate the various interrupt chips and connect them via the hierarchical domains. That keeps the domain specific details internal to the particular hierarchy level and removes the criss/cross referencing of chip internals. The resulting hierarchy for a complex x86 system will look like this: vector mapped: 74 msi-0 mapped: 2 dmar-ir-1 mapped: 69 ioapic-1 mapped: 4 ioapic-0 mapped: 20 pci-msi-2 mapped: 45 dmar-ir-0 mapped: 3 ioapic-2 mapped: 1 pci-msi-1 mapped: 2 htirq mapped: 0 Neither ioapic nor pci-msi know about the dmar interrupt remapping between themself and the vector domain. If interrupt remapping is disabled ioapic and pci-msi become direct childs of the vector domain. In hindsight we should have done that years ago, but in hindsight we always know better :) - Support for generic MSI interrupt domain handling We have more and more non PCI related MSI interrupts, so providing a generic infrastructure for this is better than having all affected architectures implementing their own private hacks. - Support for PCI-MSI interrupt domain handling, based on the generic MSI support. This part carries the pci/msi branch from Bjorn Helgaas pci tree to avoid a massive conflict. The PCI/MSI parts are acked by Bjorn. I have two more branches on top of this. The full conversion of x86 to hierarchical domains and a partial conversion of arm/gic" * 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits) genirq: Move irq_chip_write_msi_msg() helper to core PCI/MSI: Allow an msi_controller to be associated to an irq domain PCI/MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain PCI/MSI: Enhance core to support hierarchy irqdomain PCI/MSI: Move cached entry functions to irq core genirq: Provide default callbacks for msi_domain_ops genirq: Introduce msi_domain_alloc/free_irqs() asm-generic: Add msi.h genirq: Add generic msi irq domain support genirq: Introduce callback irq_chip.irq_write_msi_msg genirq: Work around __irq_set_handler vs stacked domains ordering issues irqdomain: Introduce helper function irq_domain_add_hierarchy() irqdomain: Implement a method to automatically call parent domains alloc/free genirq: Introduce helper irq_domain_set_info() to reduce duplicated code genirq: Split out flow handler typedefs into seperate header file genirq: Add IRQ_SET_MASK_OK_DONE to support stacked irqchip genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip genirq: Add more helper functions to support stacked irq_chip genirq: Introduce helper functions to support stacked irq_chip irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/iommu/irq_remapping.c8
-rw-r--r--drivers/irqchip/irq-armada-370-xp.c16
-rw-r--r--drivers/of/of_pci.c8
-rw-r--r--drivers/pci/Kconfig6
-rw-r--r--drivers/pci/host/pci-keystone-dw.c6
-rw-r--r--drivers/pci/host/pci-keystone.h2
-rw-r--r--drivers/pci/host/pci-mvebu.c13
-rw-r--r--drivers/pci/host/pci-tegra.c35
-rw-r--r--drivers/pci/host/pcie-designware.c32
-rw-r--r--drivers/pci/host/pcie-designware.h2
-rw-r--r--drivers/pci/host/pcie-rcar.c31
-rw-r--r--drivers/pci/host/pcie-xilinx.c37
-rw-r--r--drivers/pci/msi.c394
-rw-r--r--drivers/vfio/pci/vfio_pci_intrs.c2
14 files changed, 390 insertions, 202 deletions
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index 74a1767c89b5..2c3f5ad01098 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -56,19 +56,13 @@ static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
56 unsigned int irq; 56 unsigned int irq;
57 struct msi_desc *msidesc; 57 struct msi_desc *msidesc;
58 58
59 WARN_ON(!list_is_singular(&dev->msi_list));
60 msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); 59 msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
61 WARN_ON(msidesc->irq);
62 WARN_ON(msidesc->msi_attrib.multiple);
63 WARN_ON(msidesc->nvec_used);
64 60
65 irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev)); 61 irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev));
66 if (irq == 0) 62 if (irq == 0)
67 return -ENOSPC; 63 return -ENOSPC;
68 64
69 nvec_pow2 = __roundup_pow_of_two(nvec); 65 nvec_pow2 = __roundup_pow_of_two(nvec);
70 msidesc->nvec_used = nvec;
71 msidesc->msi_attrib.multiple = ilog2(nvec_pow2);
72 for (sub_handle = 0; sub_handle < nvec; sub_handle++) { 66 for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
73 if (!sub_handle) { 67 if (!sub_handle) {
74 index = msi_alloc_remapped_irq(dev, irq, nvec_pow2); 68 index = msi_alloc_remapped_irq(dev, irq, nvec_pow2);
@@ -96,8 +90,6 @@ error:
96 * IRQs from tearing down again in default_teardown_msi_irqs() 90 * IRQs from tearing down again in default_teardown_msi_irqs()
97 */ 91 */
98 msidesc->irq = 0; 92 msidesc->irq = 0;
99 msidesc->nvec_used = 0;
100 msidesc->msi_attrib.multiple = 0;
101 93
102 return ret; 94 return ret;
103} 95}
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index a3fd2b37ddb6..463c235acbdc 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -132,7 +132,7 @@ static void armada_370_xp_free_msi(int hwirq)
132 mutex_unlock(&msi_used_lock); 132 mutex_unlock(&msi_used_lock);
133} 133}
134 134
135static int armada_370_xp_setup_msi_irq(struct msi_chip *chip, 135static int armada_370_xp_setup_msi_irq(struct msi_controller *chip,
136 struct pci_dev *pdev, 136 struct pci_dev *pdev,
137 struct msi_desc *desc) 137 struct msi_desc *desc)
138{ 138{
@@ -159,11 +159,11 @@ static int armada_370_xp_setup_msi_irq(struct msi_chip *chip,
159 msg.address_hi = 0; 159 msg.address_hi = 0;
160 msg.data = 0xf00 | (hwirq + 16); 160 msg.data = 0xf00 | (hwirq + 16);
161 161
162 write_msi_msg(virq, &msg); 162 pci_write_msi_msg(virq, &msg);
163 return 0; 163 return 0;
164} 164}
165 165
166static void armada_370_xp_teardown_msi_irq(struct msi_chip *chip, 166static void armada_370_xp_teardown_msi_irq(struct msi_controller *chip,
167 unsigned int irq) 167 unsigned int irq)
168{ 168{
169 struct irq_data *d = irq_get_irq_data(irq); 169 struct irq_data *d = irq_get_irq_data(irq);
@@ -175,10 +175,10 @@ static void armada_370_xp_teardown_msi_irq(struct msi_chip *chip,
175 175
176static struct irq_chip armada_370_xp_msi_irq_chip = { 176static struct irq_chip armada_370_xp_msi_irq_chip = {
177 .name = "armada_370_xp_msi_irq", 177 .name = "armada_370_xp_msi_irq",
178 .irq_enable = unmask_msi_irq, 178 .irq_enable = pci_msi_unmask_irq,
179 .irq_disable = mask_msi_irq, 179 .irq_disable = pci_msi_mask_irq,
180 .irq_mask = mask_msi_irq, 180 .irq_mask = pci_msi_mask_irq,
181 .irq_unmask = unmask_msi_irq, 181 .irq_unmask = pci_msi_unmask_irq,
182}; 182};
183 183
184static int armada_370_xp_msi_map(struct irq_domain *domain, unsigned int virq, 184static int armada_370_xp_msi_map(struct irq_domain *domain, unsigned int virq,
@@ -198,7 +198,7 @@ static const struct irq_domain_ops armada_370_xp_msi_irq_ops = {
198static int armada_370_xp_msi_init(struct device_node *node, 198static int armada_370_xp_msi_init(struct device_node *node,
199 phys_addr_t main_int_phys_base) 199 phys_addr_t main_int_phys_base)
200{ 200{
201 struct msi_chip *msi_chip; 201 struct msi_controller *msi_chip;
202 u32 reg; 202 u32 reg;
203 int ret; 203 int ret;
204 204
diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
index 8882b467be95..88471d3d98cd 100644
--- a/drivers/of/of_pci.c
+++ b/drivers/of/of_pci.c
@@ -236,7 +236,7 @@ EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources);
236static LIST_HEAD(of_pci_msi_chip_list); 236static LIST_HEAD(of_pci_msi_chip_list);
237static DEFINE_MUTEX(of_pci_msi_chip_mutex); 237static DEFINE_MUTEX(of_pci_msi_chip_mutex);
238 238
239int of_pci_msi_chip_add(struct msi_chip *chip) 239int of_pci_msi_chip_add(struct msi_controller *chip)
240{ 240{
241 if (!of_property_read_bool(chip->of_node, "msi-controller")) 241 if (!of_property_read_bool(chip->of_node, "msi-controller"))
242 return -EINVAL; 242 return -EINVAL;
@@ -249,7 +249,7 @@ int of_pci_msi_chip_add(struct msi_chip *chip)
249} 249}
250EXPORT_SYMBOL_GPL(of_pci_msi_chip_add); 250EXPORT_SYMBOL_GPL(of_pci_msi_chip_add);
251 251
252void of_pci_msi_chip_remove(struct msi_chip *chip) 252void of_pci_msi_chip_remove(struct msi_controller *chip)
253{ 253{
254 mutex_lock(&of_pci_msi_chip_mutex); 254 mutex_lock(&of_pci_msi_chip_mutex);
255 list_del(&chip->list); 255 list_del(&chip->list);
@@ -257,9 +257,9 @@ void of_pci_msi_chip_remove(struct msi_chip *chip)
257} 257}
258EXPORT_SYMBOL_GPL(of_pci_msi_chip_remove); 258EXPORT_SYMBOL_GPL(of_pci_msi_chip_remove);
259 259
260struct msi_chip *of_pci_find_msi_chip_by_node(struct device_node *of_node) 260struct msi_controller *of_pci_find_msi_chip_by_node(struct device_node *of_node)
261{ 261{
262 struct msi_chip *c; 262 struct msi_controller *c;
263 263
264 mutex_lock(&of_pci_msi_chip_mutex); 264 mutex_lock(&of_pci_msi_chip_mutex);
265 list_for_each_entry(c, &of_pci_msi_chip_list, list) { 265 list_for_each_entry(c, &of_pci_msi_chip_list, list) {
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 893503fa1782..cced84233ac0 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -4,6 +4,7 @@
4config PCI_MSI 4config PCI_MSI
5 bool "Message Signaled Interrupts (MSI and MSI-X)" 5 bool "Message Signaled Interrupts (MSI and MSI-X)"
6 depends on PCI 6 depends on PCI
7 select GENERIC_MSI_IRQ
7 help 8 help
8 This allows device drivers to enable MSI (Message Signaled 9 This allows device drivers to enable MSI (Message Signaled
9 Interrupts). Message Signaled Interrupts enable a device to 10 Interrupts). Message Signaled Interrupts enable a device to
@@ -16,6 +17,11 @@ config PCI_MSI
16 17
17 If you don't know what to do here, say Y. 18 If you don't know what to do here, say Y.
18 19
20config PCI_MSI_IRQ_DOMAIN
21 bool
22 depends on PCI_MSI
23 select GENERIC_MSI_IRQ_DOMAIN
24
19config PCI_DEBUG 25config PCI_DEBUG
20 bool "PCI Debugging" 26 bool "PCI Debugging"
21 depends on PCI && DEBUG_KERNEL 27 depends on PCI && DEBUG_KERNEL
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index 34086ce88e8e..313338db0e43 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -155,7 +155,7 @@ static void ks_dw_pcie_msi_irq_mask(struct irq_data *d)
155 /* Mask the end point if PVM implemented */ 155 /* Mask the end point if PVM implemented */
156 if (IS_ENABLED(CONFIG_PCI_MSI)) { 156 if (IS_ENABLED(CONFIG_PCI_MSI)) {
157 if (msi->msi_attrib.maskbit) 157 if (msi->msi_attrib.maskbit)
158 mask_msi_irq(d); 158 pci_msi_mask_irq(d);
159 } 159 }
160 160
161 ks_dw_pcie_msi_clear_irq(pp, offset); 161 ks_dw_pcie_msi_clear_irq(pp, offset);
@@ -177,7 +177,7 @@ static void ks_dw_pcie_msi_irq_unmask(struct irq_data *d)
177 /* Mask the end point if PVM implemented */ 177 /* Mask the end point if PVM implemented */
178 if (IS_ENABLED(CONFIG_PCI_MSI)) { 178 if (IS_ENABLED(CONFIG_PCI_MSI)) {
179 if (msi->msi_attrib.maskbit) 179 if (msi->msi_attrib.maskbit)
180 unmask_msi_irq(d); 180 pci_msi_unmask_irq(d);
181 } 181 }
182 182
183 ks_dw_pcie_msi_set_irq(pp, offset); 183 ks_dw_pcie_msi_set_irq(pp, offset);
@@ -205,7 +205,7 @@ const struct irq_domain_ops ks_dw_pcie_msi_domain_ops = {
205 .map = ks_dw_pcie_msi_map, 205 .map = ks_dw_pcie_msi_map,
206}; 206};
207 207
208int ks_dw_pcie_msi_host_init(struct pcie_port *pp, struct msi_chip *chip) 208int ks_dw_pcie_msi_host_init(struct pcie_port *pp, struct msi_controller *chip)
209{ 209{
210 struct keystone_pcie *ks_pcie = to_keystone_pcie(pp); 210 struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
211 int i; 211 int i;
diff --git a/drivers/pci/host/pci-keystone.h b/drivers/pci/host/pci-keystone.h
index 1fc1fceede9e..478d932b602d 100644
--- a/drivers/pci/host/pci-keystone.h
+++ b/drivers/pci/host/pci-keystone.h
@@ -55,4 +55,4 @@ void ks_dw_pcie_msi_set_irq(struct pcie_port *pp, int irq);
55void ks_dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq); 55void ks_dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq);
56void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp); 56void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp);
57int ks_dw_pcie_msi_host_init(struct pcie_port *pp, 57int ks_dw_pcie_msi_host_init(struct pcie_port *pp,
58 struct msi_chip *chip); 58 struct msi_controller *chip);
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index b1315e197ffb..9aa810b733a8 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -99,7 +99,7 @@ struct mvebu_pcie_port;
99struct mvebu_pcie { 99struct mvebu_pcie {
100 struct platform_device *pdev; 100 struct platform_device *pdev;
101 struct mvebu_pcie_port *ports; 101 struct mvebu_pcie_port *ports;
102 struct msi_chip *msi; 102 struct msi_controller *msi;
103 struct resource io; 103 struct resource io;
104 char io_name[30]; 104 char io_name[30];
105 struct resource realio; 105 struct resource realio;
@@ -774,12 +774,6 @@ static struct pci_bus *mvebu_pcie_scan_bus(int nr, struct pci_sys_data *sys)
774 return bus; 774 return bus;
775} 775}
776 776
777static void mvebu_pcie_add_bus(struct pci_bus *bus)
778{
779 struct mvebu_pcie *pcie = sys_to_pcie(bus->sysdata);
780 bus->msi = pcie->msi;
781}
782
783static resource_size_t mvebu_pcie_align_resource(struct pci_dev *dev, 777static resource_size_t mvebu_pcie_align_resource(struct pci_dev *dev,
784 const struct resource *res, 778 const struct resource *res,
785 resource_size_t start, 779 resource_size_t start,
@@ -816,6 +810,10 @@ static void mvebu_pcie_enable(struct mvebu_pcie *pcie)
816 810
817 memset(&hw, 0, sizeof(hw)); 811 memset(&hw, 0, sizeof(hw));
818 812
813#ifdef CONFIG_PCI_MSI
814 hw.msi_ctrl = pcie->msi;
815#endif
816
819 hw.nr_controllers = 1; 817 hw.nr_controllers = 1;
820 hw.private_data = (void **)&pcie; 818 hw.private_data = (void **)&pcie;
821 hw.setup = mvebu_pcie_setup; 819 hw.setup = mvebu_pcie_setup;
@@ -823,7 +821,6 @@ static void mvebu_pcie_enable(struct mvebu_pcie *pcie)
823 hw.map_irq = of_irq_parse_and_map_pci; 821 hw.map_irq = of_irq_parse_and_map_pci;
824 hw.ops = &mvebu_pcie_ops; 822 hw.ops = &mvebu_pcie_ops;
825 hw.align_resource = mvebu_pcie_align_resource; 823 hw.align_resource = mvebu_pcie_align_resource;
826 hw.add_bus = mvebu_pcie_add_bus;
827 824
828 pci_common_init(&hw); 825 pci_common_init(&hw);
829} 826}
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 19bb19c7db4a..feccfa6b6c11 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -238,7 +238,7 @@
238 ) 238 )
239 239
240struct tegra_msi { 240struct tegra_msi {
241 struct msi_chip chip; 241 struct msi_controller chip;
242 DECLARE_BITMAP(used, INT_PCI_MSI_NR); 242 DECLARE_BITMAP(used, INT_PCI_MSI_NR);
243 struct irq_domain *domain; 243 struct irq_domain *domain;
244 unsigned long pages; 244 unsigned long pages;
@@ -259,7 +259,7 @@ struct tegra_pcie_soc_data {
259 bool has_gen2; 259 bool has_gen2;
260}; 260};
261 261
262static inline struct tegra_msi *to_tegra_msi(struct msi_chip *chip) 262static inline struct tegra_msi *to_tegra_msi(struct msi_controller *chip)
263{ 263{
264 return container_of(chip, struct tegra_msi, chip); 264 return container_of(chip, struct tegra_msi, chip);
265} 265}
@@ -692,15 +692,6 @@ static int tegra_pcie_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
692 return irq; 692 return irq;
693} 693}
694 694
695static void tegra_pcie_add_bus(struct pci_bus *bus)
696{
697 if (IS_ENABLED(CONFIG_PCI_MSI)) {
698 struct tegra_pcie *pcie = sys_to_pcie(bus->sysdata);
699
700 bus->msi = &pcie->msi.chip;
701 }
702}
703
704static struct pci_bus *tegra_pcie_scan_bus(int nr, struct pci_sys_data *sys) 695static struct pci_bus *tegra_pcie_scan_bus(int nr, struct pci_sys_data *sys)
705{ 696{
706 struct tegra_pcie *pcie = sys_to_pcie(sys); 697 struct tegra_pcie *pcie = sys_to_pcie(sys);
@@ -1280,8 +1271,8 @@ static irqreturn_t tegra_pcie_msi_irq(int irq, void *data)
1280 return processed > 0 ? IRQ_HANDLED : IRQ_NONE; 1271 return processed > 0 ? IRQ_HANDLED : IRQ_NONE;
1281} 1272}
1282 1273
1283static int tegra_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev, 1274static int tegra_msi_setup_irq(struct msi_controller *chip,
1284 struct msi_desc *desc) 1275 struct pci_dev *pdev, struct msi_desc *desc)
1285{ 1276{
1286 struct tegra_msi *msi = to_tegra_msi(chip); 1277 struct tegra_msi *msi = to_tegra_msi(chip);
1287 struct msi_msg msg; 1278 struct msi_msg msg;
@@ -1305,12 +1296,13 @@ static int tegra_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
1305 msg.address_hi = 0; 1296 msg.address_hi = 0;
1306 msg.data = hwirq; 1297 msg.data = hwirq;
1307 1298
1308 write_msi_msg(irq, &msg); 1299 pci_write_msi_msg(irq, &msg);
1309 1300
1310 return 0; 1301 return 0;
1311} 1302}
1312 1303
1313static void tegra_msi_teardown_irq(struct msi_chip *chip, unsigned int irq) 1304static void tegra_msi_teardown_irq(struct msi_controller *chip,
1305 unsigned int irq)
1314{ 1306{
1315 struct tegra_msi *msi = to_tegra_msi(chip); 1307 struct tegra_msi *msi = to_tegra_msi(chip);
1316 struct irq_data *d = irq_get_irq_data(irq); 1308 struct irq_data *d = irq_get_irq_data(irq);
@@ -1322,10 +1314,10 @@ static void tegra_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
1322 1314
1323static struct irq_chip tegra_msi_irq_chip = { 1315static struct irq_chip tegra_msi_irq_chip = {
1324 .name = "Tegra PCIe MSI", 1316 .name = "Tegra PCIe MSI",
1325 .irq_enable = unmask_msi_irq, 1317 .irq_enable = pci_msi_unmask_irq,
1326 .irq_disable = mask_msi_irq, 1318 .irq_disable = pci_msi_mask_irq,
1327 .irq_mask = mask_msi_irq, 1319 .irq_mask = pci_msi_mask_irq,
1328 .irq_unmask = unmask_msi_irq, 1320 .irq_unmask = pci_msi_unmask_irq,
1329}; 1321};
1330 1322
1331static int tegra_msi_map(struct irq_domain *domain, unsigned int irq, 1323static int tegra_msi_map(struct irq_domain *domain, unsigned int irq,
@@ -1893,11 +1885,14 @@ static int tegra_pcie_enable(struct tegra_pcie *pcie)
1893 1885
1894 memset(&hw, 0, sizeof(hw)); 1886 memset(&hw, 0, sizeof(hw));
1895 1887
1888#ifdef CONFIG_PCI_MSI
1889 hw.msi_ctrl = &pcie->msi.chip;
1890#endif
1891
1896 hw.nr_controllers = 1; 1892 hw.nr_controllers = 1;
1897 hw.private_data = (void **)&pcie; 1893 hw.private_data = (void **)&pcie;
1898 hw.setup = tegra_pcie_setup; 1894 hw.setup = tegra_pcie_setup;
1899 hw.map_irq = tegra_pcie_map_irq; 1895 hw.map_irq = tegra_pcie_map_irq;
1900 hw.add_bus = tegra_pcie_add_bus;
1901 hw.scan = tegra_pcie_scan_bus; 1896 hw.scan = tegra_pcie_scan_bus;
1902 hw.ops = &tegra_pcie_ops; 1897 hw.ops = &tegra_pcie_ops;
1903 1898
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index dfed00aa3ac0..17b51550f9b5 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -152,10 +152,10 @@ static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size,
152 152
153static struct irq_chip dw_msi_irq_chip = { 153static struct irq_chip dw_msi_irq_chip = {
154 .name = "PCI-MSI", 154 .name = "PCI-MSI",
155 .irq_enable = unmask_msi_irq, 155 .irq_enable = pci_msi_unmask_irq,
156 .irq_disable = mask_msi_irq, 156 .irq_disable = pci_msi_mask_irq,
157 .irq_mask = mask_msi_irq, 157 .irq_mask = pci_msi_mask_irq,
158 .irq_unmask = unmask_msi_irq, 158 .irq_unmask = pci_msi_unmask_irq,
159}; 159};
160 160
161/* MSI int handler */ 161/* MSI int handler */
@@ -276,7 +276,7 @@ no_valid_irq:
276 return -ENOSPC; 276 return -ENOSPC;
277} 277}
278 278
279static int dw_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev, 279static int dw_msi_setup_irq(struct msi_controller *chip, struct pci_dev *pdev,
280 struct msi_desc *desc) 280 struct msi_desc *desc)
281{ 281{
282 int irq, pos; 282 int irq, pos;
@@ -298,12 +298,12 @@ static int dw_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
298 else 298 else
299 msg.data = pos; 299 msg.data = pos;
300 300
301 write_msi_msg(irq, &msg); 301 pci_write_msi_msg(irq, &msg);
302 302
303 return 0; 303 return 0;
304} 304}
305 305
306static void dw_msi_teardown_irq(struct msi_chip *chip, unsigned int irq) 306static void dw_msi_teardown_irq(struct msi_controller *chip, unsigned int irq)
307{ 307{
308 struct irq_data *data = irq_get_irq_data(irq); 308 struct irq_data *data = irq_get_irq_data(irq);
309 struct msi_desc *msi = irq_data_get_msi(data); 309 struct msi_desc *msi = irq_data_get_msi(data);
@@ -312,7 +312,7 @@ static void dw_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
312 clear_irq_range(pp, irq, 1, data->hwirq); 312 clear_irq_range(pp, irq, 1, data->hwirq);
313} 313}
314 314
315static struct msi_chip dw_pcie_msi_chip = { 315static struct msi_controller dw_pcie_msi_chip = {
316 .setup_irq = dw_msi_setup_irq, 316 .setup_irq = dw_msi_setup_irq,
317 .teardown_irq = dw_msi_teardown_irq, 317 .teardown_irq = dw_msi_teardown_irq,
318}; 318};
@@ -498,6 +498,11 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
498 val |= PORT_LOGIC_SPEED_CHANGE; 498 val |= PORT_LOGIC_SPEED_CHANGE;
499 dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); 499 dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val);
500 500
501#ifdef CONFIG_PCI_MSI
502 dw_pcie_msi_chip.dev = pp->dev;
503 dw_pci.msi_ctrl = &dw_pcie_msi_chip;
504#endif
505
501 dw_pci.nr_controllers = 1; 506 dw_pci.nr_controllers = 1;
502 dw_pci.private_data = (void **)&pp; 507 dw_pci.private_data = (void **)&pp;
503 508
@@ -747,21 +752,10 @@ static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
747 return irq; 752 return irq;
748} 753}
749 754
750static void dw_pcie_add_bus(struct pci_bus *bus)
751{
752 if (IS_ENABLED(CONFIG_PCI_MSI)) {
753 struct pcie_port *pp = sys_to_pcie(bus->sysdata);
754
755 dw_pcie_msi_chip.dev = pp->dev;
756 bus->msi = &dw_pcie_msi_chip;
757 }
758}
759
760static struct hw_pci dw_pci = { 755static struct hw_pci dw_pci = {
761 .setup = dw_pcie_setup, 756 .setup = dw_pcie_setup,
762 .scan = dw_pcie_scan_bus, 757 .scan = dw_pcie_scan_bus,
763 .map_irq = dw_pcie_map_irq, 758 .map_irq = dw_pcie_map_irq,
764 .add_bus = dw_pcie_add_bus,
765}; 759};
766 760
767void dw_pcie_setup_rc(struct pcie_port *pp) 761void dw_pcie_setup_rc(struct pcie_port *pp)
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index c6256751daff..d0bbd276840d 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -73,7 +73,7 @@ struct pcie_host_ops {
73 u32 (*get_msi_addr)(struct pcie_port *pp); 73 u32 (*get_msi_addr)(struct pcie_port *pp);
74 u32 (*get_msi_data)(struct pcie_port *pp, int pos); 74 u32 (*get_msi_data)(struct pcie_port *pp, int pos);
75 void (*scan_bus)(struct pcie_port *pp); 75 void (*scan_bus)(struct pcie_port *pp);
76 int (*msi_host_init)(struct pcie_port *pp, struct msi_chip *chip); 76 int (*msi_host_init)(struct pcie_port *pp, struct msi_controller *chip);
77}; 77};
78 78
79int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val); 79int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val);
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 61158e03ab5f..d3053e53cf35 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -111,14 +111,14 @@
111struct rcar_msi { 111struct rcar_msi {
112 DECLARE_BITMAP(used, INT_PCI_MSI_NR); 112 DECLARE_BITMAP(used, INT_PCI_MSI_NR);
113 struct irq_domain *domain; 113 struct irq_domain *domain;
114 struct msi_chip chip; 114 struct msi_controller chip;
115 unsigned long pages; 115 unsigned long pages;
116 struct mutex lock; 116 struct mutex lock;
117 int irq1; 117 int irq1;
118 int irq2; 118 int irq2;
119}; 119};
120 120
121static inline struct rcar_msi *to_rcar_msi(struct msi_chip *chip) 121static inline struct rcar_msi *to_rcar_msi(struct msi_controller *chip)
122{ 122{
123 return container_of(chip, struct rcar_msi, chip); 123 return container_of(chip, struct rcar_msi, chip);
124} 124}
@@ -380,20 +380,10 @@ static int rcar_pcie_setup(int nr, struct pci_sys_data *sys)
380 return 1; 380 return 1;
381} 381}
382 382
383static void rcar_pcie_add_bus(struct pci_bus *bus)
384{
385 if (IS_ENABLED(CONFIG_PCI_MSI)) {
386 struct rcar_pcie *pcie = sys_to_pcie(bus->sysdata);
387
388 bus->msi = &pcie->msi.chip;
389 }
390}
391
392struct hw_pci rcar_pci = { 383struct hw_pci rcar_pci = {
393 .setup = rcar_pcie_setup, 384 .setup = rcar_pcie_setup,
394 .map_irq = of_irq_parse_and_map_pci, 385 .map_irq = of_irq_parse_and_map_pci,
395 .ops = &rcar_pcie_ops, 386 .ops = &rcar_pcie_ops,
396 .add_bus = rcar_pcie_add_bus,
397}; 387};
398 388
399static void rcar_pcie_enable(struct rcar_pcie *pcie) 389static void rcar_pcie_enable(struct rcar_pcie *pcie)
@@ -402,6 +392,9 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
402 392
403 rcar_pci.nr_controllers = 1; 393 rcar_pci.nr_controllers = 1;
404 rcar_pci.private_data = (void **)&pcie; 394 rcar_pci.private_data = (void **)&pcie;
395#ifdef CONFIG_PCI_MSI
396 rcar_pci.msi_ctrl = &pcie->msi.chip;
397#endif
405 398
406 pci_common_init_dev(&pdev->dev, &rcar_pci); 399 pci_common_init_dev(&pdev->dev, &rcar_pci);
407#ifdef CONFIG_PCI_DOMAINS 400#ifdef CONFIG_PCI_DOMAINS
@@ -622,7 +615,7 @@ static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
622 return IRQ_HANDLED; 615 return IRQ_HANDLED;
623} 616}
624 617
625static int rcar_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev, 618static int rcar_msi_setup_irq(struct msi_controller *chip, struct pci_dev *pdev,
626 struct msi_desc *desc) 619 struct msi_desc *desc)
627{ 620{
628 struct rcar_msi *msi = to_rcar_msi(chip); 621 struct rcar_msi *msi = to_rcar_msi(chip);
@@ -647,12 +640,12 @@ static int rcar_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
647 msg.address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR); 640 msg.address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR);
648 msg.data = hwirq; 641 msg.data = hwirq;
649 642
650 write_msi_msg(irq, &msg); 643 pci_write_msi_msg(irq, &msg);
651 644
652 return 0; 645 return 0;
653} 646}
654 647
655static void rcar_msi_teardown_irq(struct msi_chip *chip, unsigned int irq) 648static void rcar_msi_teardown_irq(struct msi_controller *chip, unsigned int irq)
656{ 649{
657 struct rcar_msi *msi = to_rcar_msi(chip); 650 struct rcar_msi *msi = to_rcar_msi(chip);
658 struct irq_data *d = irq_get_irq_data(irq); 651 struct irq_data *d = irq_get_irq_data(irq);
@@ -662,10 +655,10 @@ static void rcar_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
662 655
663static struct irq_chip rcar_msi_irq_chip = { 656static struct irq_chip rcar_msi_irq_chip = {
664 .name = "R-Car PCIe MSI", 657 .name = "R-Car PCIe MSI",
665 .irq_enable = unmask_msi_irq, 658 .irq_enable = pci_msi_unmask_irq,
666 .irq_disable = mask_msi_irq, 659 .irq_disable = pci_msi_mask_irq,
667 .irq_mask = mask_msi_irq, 660 .irq_mask = pci_msi_mask_irq,
668 .irq_unmask = unmask_msi_irq, 661 .irq_unmask = pci_msi_unmask_irq,
669}; 662};
670 663
671static int rcar_msi_map(struct irq_domain *domain, unsigned int irq, 664static int rcar_msi_map(struct irq_domain *domain, unsigned int irq,
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index ccc496b33a97..2f50fa5953fd 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -335,7 +335,8 @@ static int xilinx_pcie_assign_msi(struct xilinx_pcie_port *port)
335 * @chip: MSI Chip descriptor 335 * @chip: MSI Chip descriptor
336 * @irq: MSI IRQ to destroy 336 * @irq: MSI IRQ to destroy
337 */ 337 */
338static void xilinx_msi_teardown_irq(struct msi_chip *chip, unsigned int irq) 338static void xilinx_msi_teardown_irq(struct msi_controller *chip,
339 unsigned int irq)
339{ 340{
340 xilinx_pcie_destroy_msi(irq); 341 xilinx_pcie_destroy_msi(irq);
341} 342}
@@ -348,7 +349,7 @@ static void xilinx_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
348 * 349 *
349 * Return: '0' on success and error value on failure 350 * Return: '0' on success and error value on failure
350 */ 351 */
351static int xilinx_pcie_msi_setup_irq(struct msi_chip *chip, 352static int xilinx_pcie_msi_setup_irq(struct msi_controller *chip,
352 struct pci_dev *pdev, 353 struct pci_dev *pdev,
353 struct msi_desc *desc) 354 struct msi_desc *desc)
354{ 355{
@@ -374,13 +375,13 @@ static int xilinx_pcie_msi_setup_irq(struct msi_chip *chip,
374 msg.address_lo = msg_addr; 375 msg.address_lo = msg_addr;
375 msg.data = irq; 376 msg.data = irq;
376 377
377 write_msi_msg(irq, &msg); 378 pci_write_msi_msg(irq, &msg);
378 379
379 return 0; 380 return 0;
380} 381}
381 382
382/* MSI Chip Descriptor */ 383/* MSI Chip Descriptor */
383static struct msi_chip xilinx_pcie_msi_chip = { 384static struct msi_controller xilinx_pcie_msi_chip = {
384 .setup_irq = xilinx_pcie_msi_setup_irq, 385 .setup_irq = xilinx_pcie_msi_setup_irq,
385 .teardown_irq = xilinx_msi_teardown_irq, 386 .teardown_irq = xilinx_msi_teardown_irq,
386}; 387};
@@ -388,10 +389,10 @@ static struct msi_chip xilinx_pcie_msi_chip = {
388/* HW Interrupt Chip Descriptor */ 389/* HW Interrupt Chip Descriptor */
389static struct irq_chip xilinx_msi_irq_chip = { 390static struct irq_chip xilinx_msi_irq_chip = {
390 .name = "Xilinx PCIe MSI", 391 .name = "Xilinx PCIe MSI",
391 .irq_enable = unmask_msi_irq, 392 .irq_enable = pci_msi_unmask_irq,
392 .irq_disable = mask_msi_irq, 393 .irq_disable = pci_msi_mask_irq,
393 .irq_mask = mask_msi_irq, 394 .irq_mask = pci_msi_mask_irq,
394 .irq_unmask = unmask_msi_irq, 395 .irq_unmask = pci_msi_unmask_irq,
395}; 396};
396 397
397/** 398/**
@@ -431,20 +432,6 @@ static void xilinx_pcie_enable_msi(struct xilinx_pcie_port *port)
431 pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2); 432 pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2);
432} 433}
433 434
434/**
435 * xilinx_pcie_add_bus - Add MSI chip info to PCIe bus
436 * @bus: PCIe bus
437 */
438static void xilinx_pcie_add_bus(struct pci_bus *bus)
439{
440 if (IS_ENABLED(CONFIG_PCI_MSI)) {
441 struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);
442
443 xilinx_pcie_msi_chip.dev = port->dev;
444 bus->msi = &xilinx_pcie_msi_chip;
445 }
446}
447
448/* INTx Functions */ 435/* INTx Functions */
449 436
450/** 437/**
@@ -924,10 +911,14 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
924 .private_data = (void **)&port, 911 .private_data = (void **)&port,
925 .setup = xilinx_pcie_setup, 912 .setup = xilinx_pcie_setup,
926 .map_irq = of_irq_parse_and_map_pci, 913 .map_irq = of_irq_parse_and_map_pci,
927 .add_bus = xilinx_pcie_add_bus,
928 .scan = xilinx_pcie_scan_bus, 914 .scan = xilinx_pcie_scan_bus,
929 .ops = &xilinx_pcie_ops, 915 .ops = &xilinx_pcie_ops,
930 }; 916 };
917
918#ifdef CONFIG_PCI_MSI
919 xilinx_pcie_msi_chip.dev = port->dev;
920 hw.msi_ctrl = &xilinx_pcie_msi_chip;
921#endif
931 pci_common_init_dev(dev, &hw); 922 pci_common_init_dev(dev, &hw);
932 923
933 return 0; 924 return 0;
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 084587d7cd13..fd60806d3fd0 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -19,19 +19,82 @@
19#include <linux/errno.h> 19#include <linux/errno.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/irqdomain.h>
22 23
23#include "pci.h" 24#include "pci.h"
24 25
25static int pci_msi_enable = 1; 26static int pci_msi_enable = 1;
27int pci_msi_ignore_mask;
26 28
27#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) 29#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
28 30
31#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
32static struct irq_domain *pci_msi_default_domain;
33static DEFINE_MUTEX(pci_msi_domain_lock);
34
35struct irq_domain * __weak arch_get_pci_msi_domain(struct pci_dev *dev)
36{
37 return pci_msi_default_domain;
38}
39
40static struct irq_domain *pci_msi_get_domain(struct pci_dev *dev)
41{
42 struct irq_domain *domain = NULL;
43
44 if (dev->bus->msi)
45 domain = dev->bus->msi->domain;
46 if (!domain)
47 domain = arch_get_pci_msi_domain(dev);
48
49 return domain;
50}
51
52static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
53{
54 struct irq_domain *domain;
55
56 domain = pci_msi_get_domain(dev);
57 if (domain)
58 return pci_msi_domain_alloc_irqs(domain, dev, nvec, type);
59
60 return arch_setup_msi_irqs(dev, nvec, type);
61}
62
63static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
64{
65 struct irq_domain *domain;
66
67 domain = pci_msi_get_domain(dev);
68 if (domain)
69 pci_msi_domain_free_irqs(domain, dev);
70 else
71 arch_teardown_msi_irqs(dev);
72}
73#else
74#define pci_msi_setup_msi_irqs arch_setup_msi_irqs
75#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
76#endif
29 77
30/* Arch hooks */ 78/* Arch hooks */
31 79
80struct msi_controller * __weak pcibios_msi_controller(struct pci_dev *dev)
81{
82 return NULL;
83}
84
85static struct msi_controller *pci_msi_controller(struct pci_dev *dev)
86{
87 struct msi_controller *msi_ctrl = dev->bus->msi;
88
89 if (msi_ctrl)
90 return msi_ctrl;
91
92 return pcibios_msi_controller(dev);
93}
94
32int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) 95int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
33{ 96{
34 struct msi_chip *chip = dev->bus->msi; 97 struct msi_controller *chip = pci_msi_controller(dev);
35 int err; 98 int err;
36 99
37 if (!chip || !chip->setup_irq) 100 if (!chip || !chip->setup_irq)
@@ -48,7 +111,7 @@ int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
48 111
49void __weak arch_teardown_msi_irq(unsigned int irq) 112void __weak arch_teardown_msi_irq(unsigned int irq)
50{ 113{
51 struct msi_chip *chip = irq_get_chip_data(irq); 114 struct msi_controller *chip = irq_get_chip_data(irq);
52 115
53 if (!chip || !chip->teardown_irq) 116 if (!chip || !chip->teardown_irq)
54 return; 117 return;
@@ -85,19 +148,13 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
85 */ 148 */
86void default_teardown_msi_irqs(struct pci_dev *dev) 149void default_teardown_msi_irqs(struct pci_dev *dev)
87{ 150{
151 int i;
88 struct msi_desc *entry; 152 struct msi_desc *entry;
89 153
90 list_for_each_entry(entry, &dev->msi_list, list) { 154 list_for_each_entry(entry, &dev->msi_list, list)
91 int i, nvec; 155 if (entry->irq)
92 if (entry->irq == 0) 156 for (i = 0; i < entry->nvec_used; i++)
93 continue; 157 arch_teardown_msi_irq(entry->irq + i);
94 if (entry->nvec_used)
95 nvec = entry->nvec_used;
96 else
97 nvec = 1 << entry->msi_attrib.multiple;
98 for (i = 0; i < nvec; i++)
99 arch_teardown_msi_irq(entry->irq + i);
100 }
101} 158}
102 159
103void __weak arch_teardown_msi_irqs(struct pci_dev *dev) 160void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
@@ -120,7 +177,7 @@ static void default_restore_msi_irq(struct pci_dev *dev, int irq)
120 } 177 }
121 178
122 if (entry) 179 if (entry)
123 __write_msi_msg(entry, &entry->msg); 180 __pci_write_msi_msg(entry, &entry->msg);
124} 181}
125 182
126void __weak arch_restore_msi_irqs(struct pci_dev *dev) 183void __weak arch_restore_msi_irqs(struct pci_dev *dev)
@@ -163,11 +220,11 @@ static inline __attribute_const__ u32 msi_mask(unsigned x)
163 * reliably as devices without an INTx disable bit will then generate a 220 * reliably as devices without an INTx disable bit will then generate a
164 * level IRQ which will never be cleared. 221 * level IRQ which will never be cleared.
165 */ 222 */
166u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 223u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
167{ 224{
168 u32 mask_bits = desc->masked; 225 u32 mask_bits = desc->masked;
169 226
170 if (!desc->msi_attrib.maskbit) 227 if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
171 return 0; 228 return 0;
172 229
173 mask_bits &= ~mask; 230 mask_bits &= ~mask;
@@ -177,14 +234,9 @@ u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
177 return mask_bits; 234 return mask_bits;
178} 235}
179 236
180__weak u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
181{
182 return default_msi_mask_irq(desc, mask, flag);
183}
184
185static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 237static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
186{ 238{
187 desc->masked = arch_msi_mask_irq(desc, mask, flag); 239 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
188} 240}
189 241
190/* 242/*
@@ -194,11 +246,15 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
194 * file. This saves a few milliseconds when initialising devices with lots 246 * file. This saves a few milliseconds when initialising devices with lots
195 * of MSI-X interrupts. 247 * of MSI-X interrupts.
196 */ 248 */
197u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag) 249u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
198{ 250{
199 u32 mask_bits = desc->masked; 251 u32 mask_bits = desc->masked;
200 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + 252 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
201 PCI_MSIX_ENTRY_VECTOR_CTRL; 253 PCI_MSIX_ENTRY_VECTOR_CTRL;
254
255 if (pci_msi_ignore_mask)
256 return 0;
257
202 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; 258 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
203 if (flag) 259 if (flag)
204 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; 260 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
@@ -207,14 +263,9 @@ u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag)
207 return mask_bits; 263 return mask_bits;
208} 264}
209 265
210__weak u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
211{
212 return default_msix_mask_irq(desc, flag);
213}
214
215static void msix_mask_irq(struct msi_desc *desc, u32 flag) 266static void msix_mask_irq(struct msi_desc *desc, u32 flag)
216{ 267{
217 desc->masked = arch_msix_mask_irq(desc, flag); 268 desc->masked = __pci_msix_desc_mask_irq(desc, flag);
218} 269}
219 270
220static void msi_set_mask_bit(struct irq_data *data, u32 flag) 271static void msi_set_mask_bit(struct irq_data *data, u32 flag)
@@ -230,12 +281,20 @@ static void msi_set_mask_bit(struct irq_data *data, u32 flag)
230 } 281 }
231} 282}
232 283
233void mask_msi_irq(struct irq_data *data) 284/**
285 * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
286 * @data: pointer to irqdata associated to that interrupt
287 */
288void pci_msi_mask_irq(struct irq_data *data)
234{ 289{
235 msi_set_mask_bit(data, 1); 290 msi_set_mask_bit(data, 1);
236} 291}
237 292
238void unmask_msi_irq(struct irq_data *data) 293/**
294 * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
295 * @data: pointer to irqdata associated to that interrupt
296 */
297void pci_msi_unmask_irq(struct irq_data *data)
239{ 298{
240 msi_set_mask_bit(data, 0); 299 msi_set_mask_bit(data, 0);
241} 300}
@@ -244,12 +303,11 @@ void default_restore_msi_irqs(struct pci_dev *dev)
244{ 303{
245 struct msi_desc *entry; 304 struct msi_desc *entry;
246 305
247 list_for_each_entry(entry, &dev->msi_list, list) { 306 list_for_each_entry(entry, &dev->msi_list, list)
248 default_restore_msi_irq(dev, entry->irq); 307 default_restore_msi_irq(dev, entry->irq);
249 }
250} 308}
251 309
252void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) 310void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
253{ 311{
254 BUG_ON(entry->dev->current_state != PCI_D0); 312 BUG_ON(entry->dev->current_state != PCI_D0);
255 313
@@ -279,32 +337,7 @@ void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
279 } 337 }
280} 338}
281 339
282void read_msi_msg(unsigned int irq, struct msi_msg *msg) 340void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
283{
284 struct msi_desc *entry = irq_get_msi_desc(irq);
285
286 __read_msi_msg(entry, msg);
287}
288
289void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
290{
291 /* Assert that the cache is valid, assuming that
292 * valid messages are not all-zeroes. */
293 BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
294 entry->msg.data));
295
296 *msg = entry->msg;
297}
298
299void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
300{
301 struct msi_desc *entry = irq_get_msi_desc(irq);
302
303 __get_cached_msi_msg(entry, msg);
304}
305EXPORT_SYMBOL_GPL(get_cached_msi_msg);
306
307void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
308{ 341{
309 if (entry->dev->current_state != PCI_D0) { 342 if (entry->dev->current_state != PCI_D0) {
310 /* Don't touch the hardware now */ 343 /* Don't touch the hardware now */
@@ -341,34 +374,27 @@ void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
341 entry->msg = *msg; 374 entry->msg = *msg;
342} 375}
343 376
344void write_msi_msg(unsigned int irq, struct msi_msg *msg) 377void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
345{ 378{
346 struct msi_desc *entry = irq_get_msi_desc(irq); 379 struct msi_desc *entry = irq_get_msi_desc(irq);
347 380
348 __write_msi_msg(entry, msg); 381 __pci_write_msi_msg(entry, msg);
349} 382}
350EXPORT_SYMBOL_GPL(write_msi_msg); 383EXPORT_SYMBOL_GPL(pci_write_msi_msg);
351 384
352static void free_msi_irqs(struct pci_dev *dev) 385static void free_msi_irqs(struct pci_dev *dev)
353{ 386{
354 struct msi_desc *entry, *tmp; 387 struct msi_desc *entry, *tmp;
355 struct attribute **msi_attrs; 388 struct attribute **msi_attrs;
356 struct device_attribute *dev_attr; 389 struct device_attribute *dev_attr;
357 int count = 0; 390 int i, count = 0;
358 391
359 list_for_each_entry(entry, &dev->msi_list, list) { 392 list_for_each_entry(entry, &dev->msi_list, list)
360 int i, nvec; 393 if (entry->irq)
361 if (!entry->irq) 394 for (i = 0; i < entry->nvec_used; i++)
362 continue; 395 BUG_ON(irq_has_action(entry->irq + i));
363 if (entry->nvec_used)
364 nvec = entry->nvec_used;
365 else
366 nvec = 1 << entry->msi_attrib.multiple;
367 for (i = 0; i < nvec; i++)
368 BUG_ON(irq_has_action(entry->irq + i));
369 }
370 396
371 arch_teardown_msi_irqs(dev); 397 pci_msi_teardown_msi_irqs(dev);
372 398
373 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { 399 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
374 if (entry->msi_attrib.is_msix) { 400 if (entry->msi_attrib.is_msix) {
@@ -451,9 +477,8 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
451 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); 477 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
452 478
453 arch_restore_msi_irqs(dev); 479 arch_restore_msi_irqs(dev);
454 list_for_each_entry(entry, &dev->msi_list, list) { 480 list_for_each_entry(entry, &dev->msi_list, list)
455 msix_mask_irq(entry, entry->masked); 481 msix_mask_irq(entry, entry->masked);
456 }
457 482
458 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0); 483 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
459} 484}
@@ -497,9 +522,8 @@ static int populate_msi_sysfs(struct pci_dev *pdev)
497 int count = 0; 522 int count = 0;
498 523
499 /* Determine how many msi entries we have */ 524 /* Determine how many msi entries we have */
500 list_for_each_entry(entry, &pdev->msi_list, list) { 525 list_for_each_entry(entry, &pdev->msi_list, list)
501 ++num_msi; 526 ++num_msi;
502 }
503 if (!num_msi) 527 if (!num_msi)
504 return 0; 528 return 0;
505 529
@@ -559,7 +583,7 @@ error_attrs:
559 return ret; 583 return ret;
560} 584}
561 585
562static struct msi_desc *msi_setup_entry(struct pci_dev *dev) 586static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec)
563{ 587{
564 u16 control; 588 u16 control;
565 struct msi_desc *entry; 589 struct msi_desc *entry;
@@ -577,6 +601,8 @@ static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
577 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT); 601 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
578 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ 602 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
579 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1; 603 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
604 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
605 entry->nvec_used = nvec;
580 606
581 if (control & PCI_MSI_FLAGS_64BIT) 607 if (control & PCI_MSI_FLAGS_64BIT)
582 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64; 608 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
@@ -623,7 +649,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
623 649
624 msi_set_enable(dev, 0); /* Disable MSI during set up */ 650 msi_set_enable(dev, 0); /* Disable MSI during set up */
625 651
626 entry = msi_setup_entry(dev); 652 entry = msi_setup_entry(dev, nvec);
627 if (!entry) 653 if (!entry)
628 return -ENOMEM; 654 return -ENOMEM;
629 655
@@ -634,7 +660,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
634 list_add_tail(&entry->list, &dev->msi_list); 660 list_add_tail(&entry->list, &dev->msi_list);
635 661
636 /* Configure MSI capability structure */ 662 /* Configure MSI capability structure */
637 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); 663 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
638 if (ret) { 664 if (ret) {
639 msi_mask_irq(entry, mask, ~mask); 665 msi_mask_irq(entry, mask, ~mask);
640 free_msi_irqs(dev); 666 free_msi_irqs(dev);
@@ -701,6 +727,7 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
701 entry->msi_attrib.entry_nr = entries[i].entry; 727 entry->msi_attrib.entry_nr = entries[i].entry;
702 entry->msi_attrib.default_irq = dev->irq; 728 entry->msi_attrib.default_irq = dev->irq;
703 entry->mask_base = base; 729 entry->mask_base = base;
730 entry->nvec_used = 1;
704 731
705 list_add_tail(&entry->list, &dev->msi_list); 732 list_add_tail(&entry->list, &dev->msi_list);
706 } 733 }
@@ -719,7 +746,6 @@ static void msix_program_entries(struct pci_dev *dev,
719 PCI_MSIX_ENTRY_VECTOR_CTRL; 746 PCI_MSIX_ENTRY_VECTOR_CTRL;
720 747
721 entries[i].vector = entry->irq; 748 entries[i].vector = entry->irq;
722 irq_set_msi_desc(entry->irq, entry);
723 entry->masked = readl(entry->mask_base + offset); 749 entry->masked = readl(entry->mask_base + offset);
724 msix_mask_irq(entry, 1); 750 msix_mask_irq(entry, 1);
725 i++; 751 i++;
@@ -756,7 +782,7 @@ static int msix_capability_init(struct pci_dev *dev,
756 if (ret) 782 if (ret)
757 return ret; 783 return ret;
758 784
759 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); 785 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
760 if (ret) 786 if (ret)
761 goto out_avail; 787 goto out_avail;
762 788
@@ -895,7 +921,7 @@ void pci_msi_shutdown(struct pci_dev *dev)
895 /* Return the device with MSI unmasked as initial states */ 921 /* Return the device with MSI unmasked as initial states */
896 mask = msi_mask(desc->msi_attrib.multi_cap); 922 mask = msi_mask(desc->msi_attrib.multi_cap);
897 /* Keep cached state to be restored */ 923 /* Keep cached state to be restored */
898 arch_msi_mask_irq(desc, mask, ~mask); 924 __pci_msi_desc_mask_irq(desc, mask, ~mask);
899 925
900 /* Restore dev->irq to its default pin-assertion irq */ 926 /* Restore dev->irq to its default pin-assertion irq */
901 dev->irq = desc->msi_attrib.default_irq; 927 dev->irq = desc->msi_attrib.default_irq;
@@ -993,7 +1019,7 @@ void pci_msix_shutdown(struct pci_dev *dev)
993 /* Return the device with MSI-X masked as initial states */ 1019 /* Return the device with MSI-X masked as initial states */
994 list_for_each_entry(entry, &dev->msi_list, list) { 1020 list_for_each_entry(entry, &dev->msi_list, list) {
995 /* Keep cached states to be restored */ 1021 /* Keep cached states to be restored */
996 arch_msix_mask_irq(entry, 1); 1022 __pci_msix_desc_mask_irq(entry, 1);
997 } 1023 }
998 1024
999 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); 1025 msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
@@ -1138,3 +1164,197 @@ int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
1138 return nvec; 1164 return nvec;
1139} 1165}
1140EXPORT_SYMBOL(pci_enable_msix_range); 1166EXPORT_SYMBOL(pci_enable_msix_range);
1167
1168#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1169/**
1170 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1171 * @irq_data: Pointer to interrupt data of the MSI interrupt
1172 * @msg: Pointer to the message
1173 */
1174void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
1175{
1176 struct msi_desc *desc = irq_data->msi_desc;
1177
1178 /*
1179 * For MSI-X desc->irq is always equal to irq_data->irq. For
1180 * MSI only the first interrupt of MULTI MSI passes the test.
1181 */
1182 if (desc->irq == irq_data->irq)
1183 __pci_write_msi_msg(desc, msg);
1184}
1185
1186/**
1187 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1188 * @dev: Pointer to the PCI device
1189 * @desc: Pointer to the msi descriptor
1190 *
1191 * The ID number is only used within the irqdomain.
1192 */
1193irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
1194 struct msi_desc *desc)
1195{
1196 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1197 PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1198 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
1199}
1200
1201static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
1202{
1203 return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
1204}
1205
1206/**
1207 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
1208 * @domain: The interrupt domain to check
1209 * @info: The domain info for verification
1210 * @dev: The device to check
1211 *
1212 * Returns:
1213 * 0 if the functionality is supported
1214 * 1 if Multi MSI is requested, but the domain does not support it
1215 * -ENOTSUPP otherwise
1216 */
1217int pci_msi_domain_check_cap(struct irq_domain *domain,
1218 struct msi_domain_info *info, struct device *dev)
1219{
1220 struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
1221
1222 /* Special handling to support pci_enable_msi_range() */
1223 if (pci_msi_desc_is_multi_msi(desc) &&
1224 !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
1225 return 1;
1226 else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
1227 return -ENOTSUPP;
1228
1229 return 0;
1230}
1231
1232static int pci_msi_domain_handle_error(struct irq_domain *domain,
1233 struct msi_desc *desc, int error)
1234{
1235 /* Special handling to support pci_enable_msi_range() */
1236 if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
1237 return 1;
1238
1239 return error;
1240}
1241
1242#ifdef GENERIC_MSI_DOMAIN_OPS
1243static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
1244 struct msi_desc *desc)
1245{
1246 arg->desc = desc;
1247 arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
1248 desc);
1249}
1250#else
1251#define pci_msi_domain_set_desc NULL
1252#endif
1253
1254static struct msi_domain_ops pci_msi_domain_ops_default = {
1255 .set_desc = pci_msi_domain_set_desc,
1256 .msi_check = pci_msi_domain_check_cap,
1257 .handle_error = pci_msi_domain_handle_error,
1258};
1259
1260static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
1261{
1262 struct msi_domain_ops *ops = info->ops;
1263
1264 if (ops == NULL) {
1265 info->ops = &pci_msi_domain_ops_default;
1266 } else {
1267 if (ops->set_desc == NULL)
1268 ops->set_desc = pci_msi_domain_set_desc;
1269 if (ops->msi_check == NULL)
1270 ops->msi_check = pci_msi_domain_check_cap;
1271 if (ops->handle_error == NULL)
1272 ops->handle_error = pci_msi_domain_handle_error;
1273 }
1274}
1275
1276static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
1277{
1278 struct irq_chip *chip = info->chip;
1279
1280 BUG_ON(!chip);
1281 if (!chip->irq_write_msi_msg)
1282 chip->irq_write_msi_msg = pci_msi_domain_write_msg;
1283}
1284
1285/**
1286 * pci_msi_create_irq_domain - Creat a MSI interrupt domain
1287 * @node: Optional device-tree node of the interrupt controller
1288 * @info: MSI domain info
1289 * @parent: Parent irq domain
1290 *
1291 * Updates the domain and chip ops and creates a MSI interrupt domain.
1292 *
1293 * Returns:
1294 * A domain pointer or NULL in case of failure.
1295 */
1296struct irq_domain *pci_msi_create_irq_domain(struct device_node *node,
1297 struct msi_domain_info *info,
1298 struct irq_domain *parent)
1299{
1300 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
1301 pci_msi_domain_update_dom_ops(info);
1302 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
1303 pci_msi_domain_update_chip_ops(info);
1304
1305 return msi_create_irq_domain(node, info, parent);
1306}
1307
1308/**
1309 * pci_msi_domain_alloc_irqs - Allocate interrupts for @dev in @domain
1310 * @domain: The interrupt domain to allocate from
1311 * @dev: The device for which to allocate
1312 * @nvec: The number of interrupts to allocate
1313 * @type: Unused to allow simpler migration from the arch_XXX interfaces
1314 *
1315 * Returns:
1316 * A virtual interrupt number or an error code in case of failure
1317 */
1318int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
1319 int nvec, int type)
1320{
1321 return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
1322}
1323
1324/**
1325 * pci_msi_domain_free_irqs - Free interrupts for @dev in @domain
1326 * @domain: The interrupt domain
1327 * @dev: The device for which to free interrupts
1328 */
1329void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev)
1330{
1331 msi_domain_free_irqs(domain, &dev->dev);
1332}
1333
1334/**
1335 * pci_msi_create_default_irq_domain - Create a default MSI interrupt domain
1336 * @node: Optional device-tree node of the interrupt controller
1337 * @info: MSI domain info
1338 * @parent: Parent irq domain
1339 *
1340 * Returns: A domain pointer or NULL in case of failure. If successful
1341 * the default PCI/MSI irqdomain pointer is updated.
1342 */
1343struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node,
1344 struct msi_domain_info *info, struct irq_domain *parent)
1345{
1346 struct irq_domain *domain;
1347
1348 mutex_lock(&pci_msi_domain_lock);
1349 if (pci_msi_default_domain) {
1350 pr_err("PCI: default irq domain for PCI MSI has already been created.\n");
1351 domain = NULL;
1352 } else {
1353 domain = pci_msi_create_irq_domain(node, info, parent);
1354 pci_msi_default_domain = domain;
1355 }
1356 mutex_unlock(&pci_msi_domain_lock);
1357
1358 return domain;
1359}
1360#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c
index 553212f037c3..e8d695b3f54e 100644
--- a/drivers/vfio/pci/vfio_pci_intrs.c
+++ b/drivers/vfio/pci/vfio_pci_intrs.c
@@ -560,7 +560,7 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev,
560 struct msi_msg msg; 560 struct msi_msg msg;
561 561
562 get_cached_msi_msg(irq, &msg); 562 get_cached_msi_msg(irq, &msg);
563 write_msi_msg(irq, &msg); 563 pci_write_msi_msg(irq, &msg);
564 } 564 }
565 565
566 ret = request_irq(irq, vfio_msihandler, 0, 566 ret = request_irq(irq, vfio_msihandler, 0,