diff options
author | Keith Packard <keithp@keithp.com> | 2011-11-02 16:03:47 -0400 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-11-16 23:26:27 -0500 |
commit | 9a10f401a401ca69c6537641c8fc0d6b57b5aee8 (patch) | |
tree | 1efc8b3a22ea2a725d2eec2c66a69790a7b0e677 /drivers | |
parent | b34f1f0931575bf1e1483472a5202b8247fa9b10 (diff) |
drm/i915: Use DPCD value for max DP lanes.
The BIOS VBT value for an eDP panel has been shown to be incorrect on
one machine, and we haven't found any machines where the DPCD value
was wrong, so we'll use the DPCD value everywhere.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 23 |
1 files changed, 9 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 8c3819b02a7f..ec28aebf5147 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -154,16 +154,12 @@ intel_edp_link_config(struct intel_encoder *intel_encoder, | |||
154 | static int | 154 | static int |
155 | intel_dp_max_lane_count(struct intel_dp *intel_dp) | 155 | intel_dp_max_lane_count(struct intel_dp *intel_dp) |
156 | { | 156 | { |
157 | int max_lane_count = 4; | 157 | int max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; |
158 | 158 | switch (max_lane_count) { | |
159 | if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { | 159 | case 1: case 2: case 4: |
160 | max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; | 160 | break; |
161 | switch (max_lane_count) { | 161 | default: |
162 | case 1: case 2: case 4: | 162 | max_lane_count = 4; |
163 | break; | ||
164 | default: | ||
165 | max_lane_count = 4; | ||
166 | } | ||
167 | } | 163 | } |
168 | return max_lane_count; | 164 | return max_lane_count; |
169 | } | 165 | } |
@@ -765,12 +761,11 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
765 | continue; | 761 | continue; |
766 | 762 | ||
767 | intel_dp = enc_to_intel_dp(encoder); | 763 | intel_dp = enc_to_intel_dp(encoder); |
768 | if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT || is_pch_edp(intel_dp)) { | 764 | if (intel_dp->base.type == INTEL_OUTPUT_DISPLAYPORT || |
765 | intel_dp->base.type == INTEL_OUTPUT_EDP) | ||
766 | { | ||
769 | lane_count = intel_dp->lane_count; | 767 | lane_count = intel_dp->lane_count; |
770 | break; | 768 | break; |
771 | } else if (is_cpu_edp(intel_dp)) { | ||
772 | lane_count = dev_priv->edp.lanes; | ||
773 | break; | ||
774 | } | 769 | } |
775 | } | 770 | } |
776 | 771 | ||