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authorMikael Pettersson <mikpe@it.uu.se>2007-01-09 04:51:46 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-09 17:39:29 -0500
commit95006188cb1399f1358330503906e5891c129a10 (patch)
treeaf4547ba4e845207567584b55e8940269ada4972 /drivers
parent870ae337d568e8633ec30ca6f6afb7b58a558ba3 (diff)
sata_promise: ATAPI support
This patch adds ATAPI support to the sata_promise driver. This has been tested on both first- and second-generation chips (20378 and 20575), and with both SATAPI and PATAPI devices. CD-writing works. SATAPI DMA works on second-generation chips, but on first-generation chips SATAPI is limited to PIO due to what appears to be HW limitations. PATAPI DMA works on both first- and second-generation chips, but requires the separate PATA support patch before it can be used on TX2plus chips. The functional changes to the driver are: - remove ATA_FLAG_NO_ATAPI from PDC_COMMON_FLAGS - add ->check_atapi_dma() operation to enable DMA for bulk data transfers but force PIO for other ATAPI commands; this filter is from Promise's driver and largely matches pata_pdc207x.c - use a more restrictive ->check_atapi_dma() on first-generation chips to force SATAPI to always use PIO - add handling of ATAPI protocols to pdc_qc_prep(), pdc_host_intr(), and pdc_qc_issue_prot(): ATAPI_DMA is handled by the driver while non-DMA protocols are handed over to libata generic code - add pdc_issue_atapi_pkt_cmd() to handle the initial steps in issuing ATAPI DMA commands before sending the actual CDB; this procedure was ported from Promise's driver Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/sata_promise.c222
1 files changed, 215 insertions, 7 deletions
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index 6ab057417386..9bd195fbd884 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -39,6 +39,7 @@
39#include <linux/interrupt.h> 39#include <linux/interrupt.h>
40#include <linux/sched.h> 40#include <linux/sched.h>
41#include <linux/device.h> 41#include <linux/device.h>
42#include <scsi/scsi.h>
42#include <scsi/scsi_host.h> 43#include <scsi/scsi_host.h>
43#include <scsi/scsi_cmnd.h> 44#include <scsi/scsi_cmnd.h>
44#include <linux/libata.h> 45#include <linux/libata.h>
@@ -50,6 +51,14 @@
50 51
51 52
52enum { 53enum {
54 /* register offsets */
55 PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */
56 PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */
57 PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */
58 PDC_CYLINDER_LOW = 0x10, /* Cylinder low reg (per port) */
59 PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */
60 PDC_DEVICE = 0x18, /* Device/Head reg (per port) */
61 PDC_COMMAND = 0x1C, /* Command/status reg (per port) */
53 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ 62 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
54 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ 63 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
55 PDC_FLASH_CTL = 0x44, /* Flash control register */ 64 PDC_FLASH_CTL = 0x44, /* Flash control register */
@@ -71,13 +80,23 @@ enum {
71 80
72 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */ 81 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
73 82
83 /* Sequence counter control registers bit definitions */
84 PDC_SEQCNTRL_INT_MASK = (1 << 5), /* Sequence Interrupt Mask */
85
86 /* Feature register values */
87 PDC_FEATURE_ATAPI_PIO = 0x00, /* ATAPI data xfer by PIO */
88 PDC_FEATURE_ATAPI_DMA = 0x01, /* ATAPI data xfer by DMA */
89
90 /* Device/Head register values */
91 PDC_DEVICE_SATA = 0xE0, /* Device/Head value for SATA devices */
92
74 /* PDC_CTLSTAT bit definitions */ 93 /* PDC_CTLSTAT bit definitions */
75 PDC_DMA_ENABLE = (1 << 7), 94 PDC_DMA_ENABLE = (1 << 7),
76 PDC_IRQ_DISABLE = (1 << 10), 95 PDC_IRQ_DISABLE = (1 << 10),
77 PDC_RESET = (1 << 11), /* HDMA reset */ 96 PDC_RESET = (1 << 11), /* HDMA reset */
78 97
79 PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | 98 PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY |
80 ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI | 99 ATA_FLAG_MMIO |
81 ATA_FLAG_PIO_POLLING, 100 ATA_FLAG_PIO_POLLING,
82 101
83 /* hp->flags bits */ 102 /* hp->flags bits */
@@ -106,6 +125,8 @@ static void pdc_pata_phy_reset(struct ata_port *ap);
106static void pdc_qc_prep(struct ata_queued_cmd *qc); 125static void pdc_qc_prep(struct ata_queued_cmd *qc);
107static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); 126static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
108static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); 127static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
128static int pdc_check_atapi_dma(struct ata_queued_cmd *qc);
129static int pdc_old_check_atapi_dma(struct ata_queued_cmd *qc);
109static void pdc_irq_clear(struct ata_port *ap); 130static void pdc_irq_clear(struct ata_port *ap);
110static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc); 131static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc);
111static void pdc_host_stop(struct ata_host *host); 132static void pdc_host_stop(struct ata_host *host);
@@ -140,6 +161,34 @@ static const struct ata_port_operations pdc_sata_ops = {
140 .check_status = ata_check_status, 161 .check_status = ata_check_status,
141 .exec_command = pdc_exec_command_mmio, 162 .exec_command = pdc_exec_command_mmio,
142 .dev_select = ata_std_dev_select, 163 .dev_select = ata_std_dev_select,
164 .check_atapi_dma = pdc_check_atapi_dma,
165
166 .qc_prep = pdc_qc_prep,
167 .qc_issue = pdc_qc_issue_prot,
168 .freeze = pdc_freeze,
169 .thaw = pdc_thaw,
170 .error_handler = pdc_error_handler,
171 .post_internal_cmd = pdc_post_internal_cmd,
172 .data_xfer = ata_mmio_data_xfer,
173 .irq_handler = pdc_interrupt,
174 .irq_clear = pdc_irq_clear,
175
176 .scr_read = pdc_sata_scr_read,
177 .scr_write = pdc_sata_scr_write,
178 .port_start = pdc_port_start,
179 .port_stop = pdc_port_stop,
180 .host_stop = pdc_host_stop,
181};
182
183/* First-generation chips need a more restrictive ->check_atapi_dma op */
184static const struct ata_port_operations pdc_old_sata_ops = {
185 .port_disable = ata_port_disable,
186 .tf_load = pdc_tf_load_mmio,
187 .tf_read = ata_tf_read,
188 .check_status = ata_check_status,
189 .exec_command = pdc_exec_command_mmio,
190 .dev_select = ata_std_dev_select,
191 .check_atapi_dma = pdc_old_check_atapi_dma,
143 192
144 .qc_prep = pdc_qc_prep, 193 .qc_prep = pdc_qc_prep,
145 .qc_issue = pdc_qc_issue_prot, 194 .qc_issue = pdc_qc_issue_prot,
@@ -165,6 +214,7 @@ static const struct ata_port_operations pdc_pata_ops = {
165 .check_status = ata_check_status, 214 .check_status = ata_check_status,
166 .exec_command = pdc_exec_command_mmio, 215 .exec_command = pdc_exec_command_mmio,
167 .dev_select = ata_std_dev_select, 216 .dev_select = ata_std_dev_select,
217 .check_atapi_dma = pdc_check_atapi_dma,
168 218
169 .phy_reset = pdc_pata_phy_reset, 219 .phy_reset = pdc_pata_phy_reset,
170 220
@@ -188,7 +238,7 @@ static const struct ata_port_info pdc_port_info[] = {
188 .pio_mask = 0x1f, /* pio0-4 */ 238 .pio_mask = 0x1f, /* pio0-4 */
189 .mwdma_mask = 0x07, /* mwdma0-2 */ 239 .mwdma_mask = 0x07, /* mwdma0-2 */
190 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 240 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
191 .port_ops = &pdc_sata_ops, 241 .port_ops = &pdc_old_sata_ops,
192 }, 242 },
193 243
194 /* board_20319 */ 244 /* board_20319 */
@@ -198,7 +248,7 @@ static const struct ata_port_info pdc_port_info[] = {
198 .pio_mask = 0x1f, /* pio0-4 */ 248 .pio_mask = 0x1f, /* pio0-4 */
199 .mwdma_mask = 0x07, /* mwdma0-2 */ 249 .mwdma_mask = 0x07, /* mwdma0-2 */
200 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 250 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
201 .port_ops = &pdc_sata_ops, 251 .port_ops = &pdc_old_sata_ops,
202 }, 252 },
203 253
204 /* board_20619 */ 254 /* board_20619 */
@@ -397,6 +447,30 @@ static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
397 writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4)); 447 writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
398} 448}
399 449
450static void pdc_atapi_dma_pkt(struct ata_taskfile *tf,
451 dma_addr_t sg_table,
452 unsigned int cdb_len, u8 *cdb,
453 u8 *buf)
454{
455 u32 *buf32 = (u32 *) buf;
456
457 /* set control bits (byte 0), zero delay seq id (byte 3),
458 * and seq id (byte 2)
459 */
460 if (!(tf->flags & ATA_TFLAG_WRITE))
461 buf32[0] = cpu_to_le32(PDC_PKT_READ);
462 else
463 buf32[0] = 0;
464 buf32[1] = cpu_to_le32(sg_table); /* S/G table addr */
465 buf32[2] = 0; /* no next-packet */
466
467 /* we can represent cdb lengths 2/4/6/8/10/12/14/16 */
468 BUG_ON(cdb_len & ~0x1E);
469
470 buf[12] = (((cdb_len >> 1) & 7) << 5) | ATA_REG_DATA | PDC_LAST_REG;
471 memcpy(buf+13, cdb, cdb_len);
472}
473
400static void pdc_qc_prep(struct ata_queued_cmd *qc) 474static void pdc_qc_prep(struct ata_queued_cmd *qc)
401{ 475{
402 struct pdc_port_priv *pp = qc->ap->private_data; 476 struct pdc_port_priv *pp = qc->ap->private_data;
@@ -421,6 +495,16 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc)
421 pdc_pkt_footer(&qc->tf, pp->pkt, i); 495 pdc_pkt_footer(&qc->tf, pp->pkt, i);
422 break; 496 break;
423 497
498 case ATA_PROT_ATAPI:
499 case ATA_PROT_ATAPI_NODATA:
500 ata_qc_prep(qc);
501 break;
502
503 case ATA_PROT_ATAPI_DMA:
504 ata_qc_prep(qc);
505 pdc_atapi_dma_pkt(&qc->tf, qc->ap->prd_dma, qc->dev->cdb_len, qc->cdb, pp->pkt);
506 break;
507
424 default: 508 default:
425 break; 509 break;
426 } 510 }
@@ -534,6 +618,7 @@ static inline unsigned int pdc_host_intr( struct ata_port *ap,
534 switch (qc->tf.protocol) { 618 switch (qc->tf.protocol) {
535 case ATA_PROT_DMA: 619 case ATA_PROT_DMA:
536 case ATA_PROT_NODATA: 620 case ATA_PROT_NODATA:
621 case ATA_PROT_ATAPI_DMA:
537 qc->err_mask |= ac_err_mask(ata_wait_idle(ap)); 622 qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
538 ata_qc_complete(qc); 623 ata_qc_complete(qc);
539 handled = 1; 624 handled = 1;
@@ -630,18 +715,105 @@ static inline void pdc_packet_start(struct ata_queued_cmd *qc)
630 readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */ 715 readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */
631} 716}
632 717
718static unsigned int pdc_wait_for_drq(struct ata_port *ap)
719{
720 void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
721 unsigned int i;
722 unsigned int status;
723
724 /* Following pdc-ultra's WaitForDrq() we loop here until BSY
725 * is clear and DRQ is set in altstatus. We could possibly call
726 * ata_busy_wait() and loop until DRQ is set, but since we don't
727 * know how much time a call to ata_busy_wait() took, we don't
728 * know when to time out the outer loop.
729 */
730 for(i = 0; i < 1000; ++i) {
731 status = readb(port_mmio + 0x38); /* altstatus */
732 if (status == 0xFF)
733 break;
734 if (status & ATA_BUSY)
735 ;
736 else if (status & (ATA_DRQ | ATA_ERR))
737 break;
738 mdelay(1);
739 }
740 if (i >= 1000)
741 ata_port_printk(ap, KERN_WARNING, "%s timed out", __FUNCTION__);
742 return status;
743}
744
745static void pdc_issue_atapi_pkt_cmd(struct ata_queued_cmd *qc)
746{
747 struct ata_port *ap = qc->ap;
748 void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
749 void __iomem *host_mmio = ap->host->mmio_base;
750 unsigned int nbytes;
751 unsigned int tmp;
752
753 writeb(0x00, port_mmio + PDC_CTLSTAT); /* route drive INT to SEQ 0 */
754 writeb(PDC_SEQCNTRL_INT_MASK, host_mmio + 0); /* but mask SEQ 0 INT */
755
756 /* select drive */
757 if (sata_scr_valid(ap)) {
758 tmp = PDC_DEVICE_SATA;
759 } else {
760 tmp = ATA_DEVICE_OBS;
761 if (qc->dev->devno != 0)
762 tmp |= ATA_DEV1;
763 }
764 writeb(tmp, port_mmio + PDC_DEVICE);
765 ata_busy_wait(ap, ATA_BUSY, 1000);
766
767 writeb(0x00, port_mmio + PDC_SECTOR_COUNT);
768 writeb(0x00, port_mmio + PDC_SECTOR_NUMBER);
769
770 /* set feature and byte counter registers */
771 if (qc->tf.protocol != ATA_PROT_ATAPI_DMA) {
772 tmp = PDC_FEATURE_ATAPI_PIO;
773 /* set byte counter register to real transfer byte count */
774 nbytes = qc->nbytes;
775 if (!nbytes)
776 nbytes = qc->nsect << 9;
777 if (nbytes > 0xffff)
778 nbytes = 0xffff;
779 } else {
780 tmp = PDC_FEATURE_ATAPI_DMA;
781 /* set byte counter register to 0 */
782 nbytes = 0;
783 }
784 writeb(tmp, port_mmio + PDC_FEATURE);
785 writeb(nbytes & 0xFF, port_mmio + PDC_CYLINDER_LOW);
786 writeb((nbytes >> 8) & 0xFF, port_mmio + PDC_CYLINDER_HIGH);
787
788 /* send ATAPI packet command 0xA0 */
789 writeb(ATA_CMD_PACKET, port_mmio + PDC_COMMAND);
790
791 /*
792 * At this point in the issuing of a packet command, the Promise
793 * driver busy-waits for INT (CTLSTAT bit 27) if it detected
794 * (at port init time) that the device interrupts with assertion
795 * of DRQ after receiving a packet command.
796 *
797 * XXX: Do we need to handle this case as well? Does libata detect
798 * this case for us, or do we have to do our own per-port init?
799 */
800
801 pdc_wait_for_drq(ap);
802
803 /* now the device only waits for the CDB */
804}
805
633static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc) 806static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
634{ 807{
635 switch (qc->tf.protocol) { 808 switch (qc->tf.protocol) {
809 case ATA_PROT_ATAPI_DMA:
810 pdc_issue_atapi_pkt_cmd(qc);
811 /*FALLTHROUGH*/
636 case ATA_PROT_DMA: 812 case ATA_PROT_DMA:
637 case ATA_PROT_NODATA: 813 case ATA_PROT_NODATA:
638 pdc_packet_start(qc); 814 pdc_packet_start(qc);
639 return 0; 815 return 0;
640 816
641 case ATA_PROT_ATAPI_DMA:
642 BUG();
643 break;
644
645 default: 817 default:
646 break; 818 break;
647 } 819 }
@@ -664,6 +836,42 @@ static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile
664 ata_exec_command(ap, tf); 836 ata_exec_command(ap, tf);
665} 837}
666 838
839static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
840{
841 u8 *scsicmd = qc->scsicmd->cmnd;
842 int pio = 1; /* atapi dma off by default */
843
844 /* Whitelist commands that may use DMA. */
845 switch (scsicmd[0]) {
846 case WRITE_12:
847 case WRITE_10:
848 case WRITE_6:
849 case READ_12:
850 case READ_10:
851 case READ_6:
852 case 0xad: /* READ_DVD_STRUCTURE */
853 case 0xbe: /* READ_CD */
854 pio = 0;
855 }
856 /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */
857 if (scsicmd[0] == WRITE_10) {
858 unsigned int lba;
859 lba = (scsicmd[2] << 24) | (scsicmd[3] << 16) | (scsicmd[4] << 8) | scsicmd[5];
860 if (lba >= 0xFFFF4FA2)
861 pio = 1;
862 }
863 return pio;
864}
865
866static int pdc_old_check_atapi_dma(struct ata_queued_cmd *qc)
867{
868 struct ata_port *ap = qc->ap;
869
870 /* First generation chips cannot use ATAPI DMA on SATA ports */
871 if (sata_scr_valid(ap))
872 return 1;
873 return pdc_check_atapi_dma(qc);
874}
667 875
668static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base) 876static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base)
669{ 877{