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authorBen Skeggs <bskeggs@redhat.com>2011-07-27 20:40:48 -0400
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 04:01:09 -0500
commit9232969e19ae7251a93ab72e405cf71e5109ec05 (patch)
tree5393c4c6fa317e5ea229c1a9eb69e7c6847753f6 /drivers
parent0c101461e267850925218d6a6872c379f2498b16 (diff)
drm/nv40/pm: implement first type of pwm fanspeed funcs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_pm.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c9
-rw-r--r--drivers/gpu/drm/nouveau/nv40_pm.c26
3 files changed, 37 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.h b/drivers/gpu/drm/nouveau/nouveau_pm.h
index 8ac02cdd03a1..bbab7013aed1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_pm.h
+++ b/drivers/gpu/drm/nouveau/nouveau_pm.h
@@ -56,6 +56,8 @@ void nv04_pm_clock_set(struct drm_device *, void *);
56int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *); 56int nv40_pm_clocks_get(struct drm_device *, struct nouveau_pm_level *);
57void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *); 57void *nv40_pm_clocks_pre(struct drm_device *, struct nouveau_pm_level *);
58void nv40_pm_clocks_set(struct drm_device *, void *); 58void nv40_pm_clocks_set(struct drm_device *, void *);
59int nv40_pm_fanspeed_get(struct drm_device *);
60int nv40_pm_fanspeed_set(struct drm_device *, int percent);
59 61
60/* nv50_pm.c */ 62/* nv50_pm.c */
61int nv50_pm_clock_get(struct drm_device *, u32 id); 63int nv50_pm_clock_get(struct drm_device *, u32 id);
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index d8831ab42bb9..06664e779792 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -292,6 +292,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
292 engine->pm.voltage_get = nouveau_voltage_gpio_get; 292 engine->pm.voltage_get = nouveau_voltage_gpio_get;
293 engine->pm.voltage_set = nouveau_voltage_gpio_set; 293 engine->pm.voltage_set = nouveau_voltage_gpio_set;
294 engine->pm.temp_get = nv40_temp_get; 294 engine->pm.temp_get = nv40_temp_get;
295 switch (dev_priv->chipset) {
296 case 0x40:
297 case 0x49:
298 engine->pm.fanspeed_get = nv40_pm_fanspeed_get;
299 engine->pm.fanspeed_set = nv40_pm_fanspeed_set;
300 break;
301 default:
302 break;
303 }
295 engine->vram.init = nouveau_mem_detect; 304 engine->vram.init = nouveau_mem_detect;
296 engine->vram.takedown = nouveau_stub_takedown; 305 engine->vram.takedown = nouveau_stub_takedown;
297 engine->vram.flags_valid = nouveau_mem_flags_valid; 306 engine->vram.flags_valid = nouveau_mem_flags_valid;
diff --git a/drivers/gpu/drm/nouveau/nv40_pm.c b/drivers/gpu/drm/nouveau/nv40_pm.c
index e676b0d53478..c969bcbab547 100644
--- a/drivers/gpu/drm/nouveau/nv40_pm.c
+++ b/drivers/gpu/drm/nouveau/nv40_pm.c
@@ -346,3 +346,29 @@ resume:
346 346
347 kfree(info); 347 kfree(info);
348} 348}
349
350int
351nv40_pm_fanspeed_get(struct drm_device *dev)
352{
353 u32 reg = nv_rd32(dev, 0x0010f0);
354 if (reg & 0x80000000) {
355 u32 duty = (reg & 0x7fff0000) >> 16;
356 u32 divs = (reg & 0x00007fff);
357 if (divs && divs >= duty)
358 return ((divs - duty) * 100) / divs;
359 }
360
361 return 100;
362}
363
364int
365nv40_pm_fanspeed_set(struct drm_device *dev, int percent)
366{
367 struct drm_nouveau_private *dev_priv = dev->dev_private;
368 struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
369 u32 divs = pm->pwm_divisor;
370 u32 duty = ((100 - percent) * divs) / 100;
371
372 nv_wr32(dev, 0x0010f0, 0x80000000 | (duty << 16) | divs);
373 return 0;
374}